Digital Controller Design Research Articles

Digital PI-PD controller design for arbitrary order systems: Dominant pole placement approach

In this paper, a digital PI-PD controller design method is proposed for arbitrary order systems with or without time-delay to achieve desired transient response in the closed-loop via dominant pole placement approach. The digital PI-PD controller design problem is solved by converting the original problem to the digital PID controller design problem. Firstly, parametrization of the digital PID controllers which assign dominant poles to desired location is done. After that the subset of digital PID controller parameters in which the remaining poles are located away from the dominant pole pair is found via Chebyshev polynomials. The obtained PID controller parameters are then transformed into the PI-PD controller parameters by considering the closed-loop controller zero and the design is completed. Success of the proposed design method is firstly demonstrated on an example transfer function and compared with the well-known PID controller methods from the literature through simulations. After that the design method is implemented on the fan and plate laboratory system in a real environment.

AN APPROACH TO DESIGN OF DC-DC BOOST CONVERTER WITH DIGITAL CONTROL

This paper deals with the design of digital controller for DC-DC boost converter. This controller is a combination of a generalized minimum variance control and one-step-delayed disturbance estimator. The generalized minimum variance control algorithm design is based on the input/output converter model. It should provide the output voltage stability, whereas the disturbance estimator increases the robustness and the steady-state accuracy of converter in the presence of input voltage and load resistance variations. With these control techniques, the converter can achieve better power efficiency. Finally, the effectiveness of the proposed design procedure is verified by a digital simulation, showing satisfactory DC-DC boost converter performances.

Design of Digital PID Controllers Relying on FPGA-based Techniques

A major challenge of higher education institutions is to prepare professionals capable of learning by building effective solutions that are able to integrate different disciplines and knowledge areas. With this in mind, academics and researchers from ESPOL university in Ecuador, have designed laboratory experiments for a digital control class that introduces students to a modular design of embedded feedback controllers using Field Programmable Gate Array (FPGA) technologies. The proposed experiment includes the design of direct discrete time PID controllers, for an existing speed control system with three different sampling times, to test and compare their performance. The obtained controllers are implemented using a prototyping strategy that relies on FPGA development boards. The prototype controller is tested using the experimental plant, and the system performance is contrasted with results from simulations under realistic conditions.

Design of Digital PID Controllers using Particle Swarm Optimization: A Video Based Teaching Experiment

The use of videos is a valuable and powerful tool which may significantly contribute to change and improve teaching and learning methods. Lecturers can made their own videos addressing specific topics suitable to fulfill their student’s needs. These videos can address control engineering syllabus as well as complementary topics. This paper proposes using video as a tool to introduce the particle swarm optimization algorithm to students within a digital PID control simulation experiment. The experience preliminary results and feedback received from students are quite positive.

Two Degree-of-Freedom Robust Digital Controller Design With Bouc-Wen Hysteresis Compensator for Piezoelectric Positioning Stage

The compensation of nonlinear hysteretic behavior is one of the mandatory requirements in order to achieve precise reference tracking performance from a piezoelectric positioning stage. A common practice of employing an inverse hysteresis model as a feed-forward compensator must deal with modeling complexity; consequently, real-time tracking performance suffers due to modeling errors. In this paper, a two degree-of-freedom robust digital feedback controller design scheme in the presence of a simple Bouc-Wen hysteresis feed-forward compensator is proposed to deal with the dual challenge of modeling complexity and modeling errors. The proposed control scheme takes into account the performance and robustness requirements simultaneously. The desired performance and robustness requirements are expressed by means of constraints on the shapes of closed-loop sensitivity functions (CLSFs). Then, pole placement with sensitivity function shaping methodology is adopted so that the CLSFs respect their respective constraints and the desired performance with robustness could be achieved. The presented experimental results verify the effectiveness of the proposed control scheme in achieving the peak-to-peak reference tracking error of 0.36% for the desired displacement of $12~\mu \text{m}$ with tracking frequency of 10 Hz, whereas the peak-to-peak tracking error of 4.33% is observed with a Bouc-Wen hysteresis feed-forward compensator (without the feedback controller). Overall, 91% improvement is achieved in reducing the reference tracking error with the proposed control scheme.

Embedded Signal Processing Module for Online Filtering in High-Event Rate Conditions

Online event detection (filtering) is required in communications, industry and electronic instrumentation systems. Those systems may comprise sequential decision levels. Eventually, decision to reject or accept an event may comprise fusion of different measured data. This work describes an embedded solution in field-programmable gate array (FPGA), which allows to combine information from two different sources for a decision. A matched filter discriminator was used to identify typical signatures of interest. The main focus is on both digital data control and packaging module design and implementation and optimization of the matched filter module in terms of FPGA occupation. The proposed digital electronic system is presented and simulation results are used to validate the design.

Digital control and sampling period assignment of multiple plants in networked control systems

This study investigates the problem of sampling period assignment and design of digital state feedback controllers for systems subject to time-varying sampling periods and uncertain delays. The system is controlled through a communication network, where the sampling period and the network-induced delay are bounded in a known interval. The sampled system is described by a linear parameter-varying discrete-time model obtained by means of the Cayley–Hamilton theorem. The proposed discretisation procedure improves the current approaches in the literature and allows the design of controllers that are robust to the delay and depending on the sampling period defined by a scheduling policy in a scenario with concurrent access to the communication network by multiple plants. The gain-scheduled linear quadratic controller is designed by means of linear matrix inequalities. The policy to access the network is dynamic and formulated as an optimisation problem. Numerical experiments illustrate the efficiency and the validity of the proposed approach.

Design of Digital PID Controller Based on FPGA

PID controller has been widely used in many different areas such as power systems, drives control, automotive mechatronics, aerospace, process control, and robotics. Recently, FPGA (field programmable gate array) has become an alternative solution for the realization of digital control algorithm systems. In this paper FPGA-based incremental PID (Proportional, Integral, Derivative) controller is designed and simulated. After the analysis of PID control algorithm, VerilogHDL language is used to design the software programs. Simulation results show the effectiveness and feasibility of the proposed method.

Robust digital pole-placer for electric drives based on uncertain diophantine equation and interval mathematics

In this paper, a novel robust digital controller design is proposed and implemented for induction motor speed control. The objective is to design a robust output feedback controller that places the closed-loop poles in a specified region in order to achieve the desired dynamic performance for a system with variable load. The design is carried out in the frequency domain by solving the uncertain Diophantine equation using interval mathematics and non-linear optimization method. In order to capture the load variations, the characteristic equation is relaxed and enlarged from a fixed-point to an interval set. A simple model-based design methodology is adopted in this work and implemented experimentally using a Hardware-in-the-Loop environment. The proposed design is simulated and then validated using real induction drive system. The proposed controller is compared with two other controllers: the auto tuned PID and a least-square-based robust controller. Experimental results show that the designed robust controller provides a better dynamic response than conventional controllers used in the industry when the motor’s load is varied. These results validate the proposed design as the plant’s output follows the reference signal with minimal overshoot and settling time.

Sliding mode control of continuous-time Markovian jump systems with digital data transmission

This paper investigates the design problem of sliding mode control for a class of continuous-time Markovian jump systems with digital communication constraints. Two types of classical quantization schemes, that is, dynamical uniform quantizer and static logarithmic quantizer, are employed to perform the design work, respectively. In this study, a novel quantized sliding mode control design method is developed to stabilize the closed-loop systems in the presence of both state and input quantization and unknown time-varying actuator faults. Under the proposed quantized control strategies, the quantization effects can be completely compensated via injecting quantizer parameters into the controller gains. Moreover, in both quantization cases, the proposed robust quantized sliding mode controllers can guarantee the state trajectories of the closed-loop systems to be mean-square stable, and ensure the reachability of the specified sliding surface with probability 1 at the same time. Finally, a numerical example with an F-404 aircraft engine system is provided to show the effectiveness of the proposed digital control design approach.

Design and experimental investigation of digital model predictive current controller for single phase grid integrated photovoltaic systems

Depletion of fossil fuel reserves has lead to identification of renewable sources of energy as alternative sources of energy for power generation. The photovoltaic plant is more prominent in present day scenario. The power electronic converters interfacing the photovoltaic generator with the grid gives rise to various power quality problems such as harmonics in current injected by the inverter into the grid and low output power factor. This paper focuses on the design, analysis and control of single phase grid integrated photovoltaic systems. In this paper a dual stage photovoltaic inverter system is simulated using MATLAB/SIMULINK software. A digital predictive current controller based on model predictive control theory with delay compensation technique is introduced for output current control of the single phase voltage source inverter integrating the photovoltaic generator with the grid. The proposed control strategy exhibits excellent steady state performance and attains a high output power factor. It also achieves very fast transient response during change in reactive power demands and grid voltage distortions. The efficacy of the proposed controller is validated by experimental implementation using low cost digital signal processor.

Educational framework for a motor drive control systems: Design and performance assessment

ABSTRACTIn this paper, an emulation based electrical drive laboratory for graduate and undergraduate power engineering students and practicing engineers is presented. The virtual laboratory is realized by means of Hardware‐In‐the‐Loop (HIL) system, which is increasingly recognized as an effective approach in the design of power electronics control. Control of induction motor, as the most widely used machine including main and side effects is examined. In order to perform experiments gradually, software development framework which provides modular and incremental DSP programming possibilities (from basic to advanced levels) is given. Digital controller design procedure combined with appropriate emulated power stage, and followed by experimental results is presented in detail. In addition to conventional test procedure, scripting method implemented through Application Programming Interface (API) is shown. The benefits of remote laboratory approach is described in the case of collaboration of multiple teams. The proposed approach can be used as additional or completely self‐contained tool for research and education of electrical drive control. © 2017 Wiley Periodicals, Inc. Comput Appl Eng Educ 25:264–276, 2017; View this article online at wileyonlinelibrary.com/journal/cae; DOI 10.1002/cae.21795

Discretization of Fractional Order Differentiator and Integrator with Different Fractional Orders

This paper is concerned with the discretization of the fractional-order differentiator and integrator, which is the foundation of the digital realization of fractional order controller. Firstly, the parameterized Al-Alaoui transform is presented as a general generating function with one variable parameter, which can be adjusted to obtain the commonly used generating functions (e.g. Euler operator, Tustin operator and Al-Alaoui operator). However, the following simulation results show that the optimal variable parameters are different for different fractional orders. Then the weighted square integral index about the magtitude and phase is defined as the objective functions to achieve the optimal variable parameter for different fractional orders. Finally, the simulation results demonstrate that there are great differences on the optimal variable parameter for differential and integral operators with different fractional orders, which should be attracting more attentions in the design of digital fractional order controller.

Robust digital deadbeat control design technique for 3 phase VSI with disturbance observer

Robust digital deadbeat control design technique for 3 phase VSI with disturbance observer

Синтез цифровых регуляторов гироскопических командных приборов

Синтез цифровых регуляторов гироскопических командных приборов

Event‐Triggered Iterative Learning Control for Multi‐Agent Systems with Quantization

AbstractThe emergence of networked control systems urges the digital control design to integrate communication constraints efficiently. In order to accommodate this requirement, this paper investigates the joint design of tracking problem for multi‐agent system (MAS) in the presence of resource‐limited communication channel and quantization. An event‐triggered robust learning control with quantization is firstly proposed and employed for MAS in this paper. The new event‐triggered distributed robust learning control system with the introduction of logarithmic quantization guarantees the asymptotic tracking property on the finite interval. Convergence analysis is given based on the Lyapunov direct method. Finally, numerical simulations are given to illustrate the efficacy of the event‐triggered approach compared with time‐triggered controllers.

A Novel Controller Design for the Next Generation Space Electrostatic Accelerometer Based on Disturbance Observation and Rejection.

The state-of-the-art accelerometer technology has been widely applied in space missions. The performance of the next generation accelerometer in future geodesic satellites is pushed to , which is close to the hardware fundamental limit. According to the instrument noise budget, the geodesic test mass must be kept in the center of the accelerometer within the bounds of 56 by the feedback controller. The unprecedented control requirements and necessity for the integration of calibration functions calls for a new type of control scheme with more flexibility and robustness. A novel digital controller design for the next generation electrostatic accelerometers based on disturbance observation and rejection with the well-studied Embedded Model Control (EMC) methodology is presented. The parameters are optimized automatically using a non-smooth optimization toolbox and setting a weighted H-infinity norm as the target. The precise frequency performance requirement of the accelerometer is well met during the batch auto-tuning, and a series of controllers for multiple working modes is generated. Simulation results show that the novel controller could obtain not only better disturbance rejection performance than the traditional Proportional Integral Derivative (PID) controllers, but also new instrument functions, including: easier tuning procedure, separation of measurement and control bandwidth and smooth control parameter switching.

Digital Controller Design Based on Active Damping Method of Capacitor Current Feedback for Auxiliary Resonant Snubber Inverter with LC Filter

In some high-performance applications, an LC filter must be added to the auxiliary resonant snubber inverter (ARSI) to reduce the output current ripple. However, resonance occurs due to the additional LC filter, which makes the traditional closed-loop control not suitable to be used directly. Therefore, this paper presents a double-loop digital control based on the active damping method of capacitor current feedback to stabilize the system. Most of the studies on active damping methods are focused on the grid in consideration of zero resistance. However, the load resistance should not be neglected in the drive system. Therefore, the load resistance and digital control delays are considered in this paper. Moreover, an improved loading method is proposed to improve the duty ratio range. In order to verify the effectiveness of the controller, a prototype was developed. The simulation and experimental results demonstrate that soft-switching can be realized for the entire load range. The maximum duty ratio is improved by 0.01 by using the proposed loading method. The resonance can be eliminated by using the proposed control method.

Digital Design of Robust Fractional PID Controller for Uncertain Systems

This paper deals with digital fractional order PID controller design. A numerical constrained optimization and a bilinear transform to convert continuous-time system to discrete-time system and vice-versa are used in this design method. To obtain the fractional controller parameters a design approach uses bilinear transforminstead of analog design. Then to discrete the controller a simple substitution is used.By considering explicitly the parameters uncertainties, the proposed method offers more robustness for digital control system. A numerical example and an application to the liquid carbon monoxide level control are considered to show the efficiency of theproposed methodespecially in term of robustness and in calculation time by the use of higher sampling period.

Design and implementation of a new digital automatic gain control

A new design method of an all-digital automatic gain control easy to implement is described and tested. The discretisation of the instantaneous gain provides a recursive form that merges the exponential function with the level detection. The first proposed circuit is well adapted for a software implementation. It comprises a simple control loop and two multipliers. It does neither contain digital filter nor divider and its setting only requires a loop gain parameter. Some tests were conducted on real digital audio signals with a dynamic range of 80 dB and they validate this approach. Under some conditions, the second circuit can even be simpler since it requires only one multiplier. It is well adapted to an field programmable gate array (FPGA) implementation for high speed signal processing.