Diffused Pn Junction Research Articles

Carrier selective metal-oxides for self-doped silicon nanowire solar cells

Selection of a material that serves multiple purposes is always beneficial for any electronic device including solar cells. This study investigates nickel oxide (NiO) as a multipurpose material to overcome the potential issues observed in traditional solar cells. A proof-of concept device is fabricated to understand the efficient hole transport from NiO while blocking electrons as determined by I-V measurements showing suppression of dark current and enhancement in the power conversion from the solar cell. Enhanced surface defects in the silicon nanowires (SiNWs) leading to the poor carrier collection is possible to be improved by the selection of wide bandgap metal-oxides that show high band offset for one carrier (electron/hole) while negligible band offset for another carrier (hole/electron) is discussed. Furthermore, Fermi level de-pinning for NiO sandwiched between different metal electrodes and SiNWs, signifying that the selection of appropriate metal electrodes is another key factor in improving the efficiency of solar cells; which is experimentally studied in this work. As fabricated solar cells in this work do not use high temperature diffused PN junction to separate the charge carriers neither toxic gases for doping SiNWs.

Dual Functional Electron‐Selective Contacts Based on Silicon Oxide/Magnesium: Tailoring Heterointerface Band Structures while Maintaining Surface Passivation

AbstractSilicon (Si)‐based dopant‐free heterojunction solar cells (SCs) featuring carrier‐selective contacts (CSCs) have attracted considerable interest due to the extreme simplifications in their device structure and manufacturing procedure. However, these SCs are limited by the unsatisfactory contact properties on both sides of the junction, and their efficiencies are not comparable with those of commercially available Si SCs. In this report, a high‐performance silicon‐oxide/magnesium (SiOx/Mg) electron‐selective contact (ESC) design is described. Combining an ultrathin SiOx and a low work function Mg layer, the novel ESC simultaneously yields low recombinative and resistive losses. In addition, deposition of Mg on SiOx relaxes the restriction on the threshold thickness of the SiOx for electron tunneling and therefore broadens the optimization space for rear‐sided passivation. Meanwhile, hole‐selective contact with boosted light harvesting and suppressed interfacial recombination is achieved by forming a fully conformal contact between the conducting poly(3,4‐ethylene dioxythiophene): poly(styrenesulfonate) (PEDOT: PSS) and periodic Si pyramid arrays. With the double‐sided carrier‐selective contact designs, PEDOT: PSS/Si/SiOx/Mg SCs with efficiency of 15% are finally obtained via a totally dopant‐free processing. Subsequent calculations further indicate a pathway for the improvement of these contacts toward an efficiency that is competitive with conventionally diffused pn junction SCs.

Principles of dopant-free electron-selective contacts based on tunnel oxide/low work-function metal stacks and their applications in heterojunction solar cells

Dopant-free carrier-selective contacts (CSCs) are considerably attractive on highly efficient crystalline silicon (c-Si) based heterojunction solar cells (HSCs) owing to their combined advantages of low thermal budget, ease of processing and simplicity of the device architecture. However, due to inferior passivation property and relatively high resistivity, the silicon oxide (SiOx) thin film is always ruled out as a viable interfacial layer in a CSC. Here, we demonstrate that the functionalization of nanoscale SiOx films with low work-function metals (WFMs) can simultaneously achieve moderate-level passivation and low contact resistivity on lightly doped n-type c-Si. Simulation results on the CSC comprising SiOx/low-WFM reveal that the tunnel SiOx layer alleviates Fermi-level pinning, and the low WFM helps to reduce the effective barrier height and contact resistivity. This kind of bi-functional electron-selective design possesses high tolerance to the surface state density on the c-Si surface as well as the SiOx layer thickness, as experimentally confirmed by the SiOx/Mg stack achieving an implied open-circuit voltage of 661 mV and a contact resistivity of 35.2 mΩ·cm2 for a SiOx film thickness up to 1.7 nm. A comprehensive assessment suggests that this kind of rear electron transport layer (ETL) enables a theoretical power conversion efficiency (PCE) up to 27.4% if assuming an ideal front junction. Ultimately, a fully dopant-free c-Si HSC featuring a SiOx/low-WFM electron-selective contact and a MoOx hole-selective contact was proposed, yielding a PCE of 21.8%. The relatively high performance and facile integration with c-Si substrates enabled by the SiOx/low-WFM contact may open up new possibilities in designing and fabricating low-cost dopant-free SCs toward high efficiencies competitive with conventionally diffused pn junction SCs.

Electric field distribution and voltage breakdown modeling for any PN junction

Purpose – Scientists and engineers have been solving Poisson’s equation in PN junctions following two approaches: analytical solving or numerical methods. Although several efforts have been accomplished to offer accurate and fast analyses of the electric field distribution as a function of voltage bias and doping profiles, so far none achieved an analytic or semi-analytic solution to describe neither a double diffused PN junction nor a general case for any doping profile. The paper aims to discuss these issues. Design/methodology/approach – In this work, a double Gaussian doping distribution is first considered. However, such a doping profile leads to an implicit problem where Poisson’s equation cannot be solved analytically. A method is introduced and successfully applied, and compared to a finite element analysis. The approach is then generalized, where any doping profile can be considered. 2D and 3D extensions are also presented, when symmetries occur for the doping profile. Findings – These results and the approach here presented offer an efficient and accurate alternative to numerical methods for the modeling and simulation of mathematical equations arising in physics of semiconductor devices. Research limitations/implications – A general 3D extension in the case where no symmetry exists can be considered for further developments. Practical implications – The paper strongly simplify and ease the optimization and design of any PN junction. Originality/value – This paper provides a novel method for electric field distribution analysis.

Improved High Efficiency Stacked Microstructured Neutron Detectors Backfilled With Nanoparticle $^{6}$LiF

Silicon diodes with large aspect ratio trenched microstructures, backfilled with <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">6</sup> LiF, show a dramatic increase in thermal neutron detection efficiency beyond that of conventional thin-film coated planar devices. Described in this work are advancements in the technology using detector stacking methods to increase thermal neutron detection efficiency, along with the current process to backfill <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">6</sup> LiF into the silicon microstructures. The highest detection efficiency realized thus far is over 42% intrinsic thermal neutron detection efficiency by device-stacking methods. The detectors operate as conformally diffused pn junction diodes each having 1 cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> area. Two individual devices were mounted back-to-back with counting electronics coupling the detectors together into a single dual-detector device. The solid-state silicon device was operated at 3 V and utilized simple signal amplification and counting electronic components that have been adjusted from previous work for slow charge integration time. The intrinsic detection efficiency for normal-incident 0.0253 eV neutrons was found by calibrating against a <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sup> He proportional counter.

Pixelized M-π-n CdTe detector coupled to Medipix2 readout chip

We have realized a simple method for patterning an M-π-n CdTe diode with a deeply diffused pn-junction, such as indium anode on CdTe. The method relies on removing the semiconductor material on the anode-side of the diode until the physical junction has been reached. The pixelization of the p-type CdTe diode with an indium anode has been demonstrated by patterning perpendicular trenches with a high precision diamond blade and pulsed laser. Pixelization or microstrip pattering can be done on both sides of the diode, also on the cathode-side to realize double sided detector configuration.The article compares the patterning quality of the diamond blade process, pulsed pico-second and femto-second lasers processes. Leakage currents and inter-strip resistance have been measured and are used as the basis of the comparison. Secondary ion mass spectrometry (SIMS) characterization has been done for a diode to define the pn-junction depth and to see the effect of the thermal loads of the flip-chip bonding process. The anode and cathode-sides of a 6 × 6 mm2 diodes were patterned with a diamond blade and flip-chip bonded to the Medipix2 readout chips. First imaging results with an X-ray source show reduced polarization effect and edgeless detector behavior for the anode-side patterned detector.

Enhanced variant designs and characteristics of the microstructured solid-state neutron detector

Silicon diodes with large aspect ratio perforated microstructures backfilled with 6 LiF show a dramatic increase in neutron detection efficiency beyond that of conventional thin-film coated planar devices. Described in this work are advancements in the technology with increased microstructure depths and detector stacking methods to increase thermal neutron detection efficiency. The highest efficiency devices thus far have delivered over 37% intrinsic thermal neutron detection efficiency by device-coupling stacking methods. The detectors operate as conformally diffused pn junction diodes with 1 cm 2 square-area. Two individual devices were mounted back-to-back with counting electronics coupling the detectors together into a single dual-detector device. The solid-state silicon device operated at 3 V and utilized simple signal amplification and counting electronic components. The intrinsic detection efficiency for normal-incident 0.0253 eV neutrons was found by calibrating against a 3 He proportional counter and a 6 LiF thin-film planar semiconductor device. This work is a part of on-going research to develop solid-state semiconductor neutron detectors with high detection efficiencies and uniform angular responses.

Recombination properties of a diffused PN junction determined by spectral response measurements: M. Conti, P. Ferrari and A. Modelli. Solid-St. Electron.24 (9), 879 (1981)

We discuss the characteristic lineshape of the optical absorption of the novel “narrow-gap” InN in terms of the single-particle band structure and two-particle Coulomb interactions. More precisely, we explain the plateau in the imaginary part of the dielectric function, that follows the steep absorption onset, by the strong nonparabolicity of the conduction and light-hole bands near the zone center. The frequency range above 4.5 eV is dominated by higher optical interband transitions. The Coulomb attraction of optically excited electrons and holes leads to large redshifts of the spectral features and a strong coupling of the interband transitions.

Recombination properties of a diffused pn junction determined by spectral response measurements

The theoretical spectral responsivity of a diffused pn junction is computed in the case of a silicon n +p junction which employes a rather deep (4, 7 μ) and lightly doped N + front region. Comparing experimental results with theoretical predictions the diffusion length L and surface recombination velocity S 0 can be determined. Several cases are examined: the influence of an oxide layer on the front and of gettering processes on L and S 0 are presented and the overall sensitivity of the method is discussed.

100-ns electronically variable semiconductor memory using two diodes per memory cell

A read-write memory cell consisting of a high-barrier Schottky diode with a diffused guard ring connected in series with a diffused PN junction diode will be presented. One layer metallization connects the pairs of diodes in an array which can be accessed in random.

A High Frequency Germanium Drift Transistor by Post Alloy Diffusion

ABSTRACT A new technique of Solid state diffusion, called here ‘ post alloy diffusion ’, is described with particular reference to the construction of a high frequency germanium drift transistor. In this post alloy diffusion technique two or more impurities of different conductivity type and alloyed into n-typo germanium to produce an alloyed pn junction. This structure is then modified by diffusion to produce a diffused pn junction, the graded n-typo region of which is suitable to act as the base and the p-type region the emitter of a drift transistor. The construction of a transistor made by this method is described and some of the design variables are discussed. Transistors with alpha cut-off frequency in excess of 200 Me/s, collector capacitance of 1·5 pF-and base resistance of 50 ohms, have been made