Voltage Differencing Amplifier Research Articles

Synthesis of electronically tunable multifunction biquad filter using voltage differencing differential input buffered amplifiers

AbstractBiquad filters are commonly used in analog circuits for various purposes in signal processing and communication applications. We synthesize an analog active biquad filter with five types of voltage‐mode filtering functions. The filter is synthesized using a parallel passive resistor‐inductor‐capacitor (RLC) network and unity‐gain voltage differencing amplifier. A voltage differencing differential input buffered amplifier (VD‐DIBA) is the main active component, and the biquad filter has a three‐input single‐output (TISO) topology. By replacing the passive inductor and resistor with VD‐DIBA‐based inductance and resistance simulators with a subtractor, the TISO voltage‐mode versatile filter is obtained from two VD‐DIBAs, one resistor, and two capacitors connected to the ground. The proposed filter can provide five types of voltage‐mode filtering functions: inverting bandpass and lowpass responses as well as noninverting band‐stop, high‐pass, and all‐pass responses. The all‐pass filter requires no additional active components. The three input voltage nodes have high impedance, and a low‐impedance output voltage node facilitates cascade connections without using additional voltage buffers. In addition, the natural frequency and quality factor can be electronically tuned. The quality factor is controlled without disturbing the passband gain and natural frequency. The proposed filter is simulated and verified experimentally in the Personal Simulation Program with Integrated Circuit Emphasis (PSPICE) and through laboratory tests employing VD‐DIBAs implemented using commercially available components.

A Differential Voltage Amplifier Scheme for Enhanced Sensitivity and SNR for Remote Piezopolymer-Based Sensor Systems

A Differential Voltage Amplifier Scheme for Enhanced Sensitivity and SNR for Remote Piezopolymer-Based Sensor Systems

Fabrication, Characterization, and Signal Processing Optimization of Flexible and Wearable Piezoelectric Tactile Sensors

Piezoelectric microelectromechanical systems (MEMS) meet the growing demand for sensors with small sizes and low power consumption. For tactile applications and pressure measurements, they are applied in various fields from robotics to healthcare. In this context, flexible devices are very important for their high responsivity and ability to conform to the analyzed surface. This work reports on miniaturized flexible and compliant piezoelectric devices to increase the number of integrable sensors for detecting and discriminating localized pressures and contacts per unit area with minimal crosstalk. For this purpose, a series of Aluminium Nitride-based (AlN) piezoelectric sensors with different diameters (from 5 μm to 500 μm) was realized and the generated electrical signal by sensor deformation was amplified by a differential voltage amplifier circuit. By the analysis of the shape of the piezoelectric signal as a function of the applied pressure, oscillations due to piezoelectric deformations, superimposed on the initial peak signal corresponding to the touch event, have been observed. The integral of the electrical signal was calculated for the most accurate representation to describe the sensor’s response. The best responsivity was obtained in samples with diameters of 200 μm and 500 μm. Furthermore, it was also found that the minimum distance between the edges of closed sensors, observing crosstalk below -20 dB, was around 500 μm.

Front-End Amplifiers for Tuning Forks in Quartz Enhanced PhotoAcoustic Spectroscopy

A study of the front-end electronics for quartz tuning forks (QTFs) employed as optoacoustic transducers in quartz-enhanced photoacoustic spectroscopy (QEPAS) sensing is reported. Voltage amplifier-based electronics is proposed as an alternative to the transimpedance amplifier commonly employed in QEPAS experiments. The possibility to use differential input/output configurations with respect to a single-ended configuration has also been investigated. Four different architectures have been realized and tested: a single-ended transimpedance amplifier, a differential output transimpedance amplifier, a differential input voltage amplifier and a fully differential voltage amplifier. All of these amplifiers were implemented in a QEPAS sensor operating in the mid-IR spectral range. Water vapor in ambient air has been selected as the target gas species for the amplifiers testing and validation. The signal-to-noise ratio (SNR) measured for the different configurations has been used to compare the performances of the proposed architectures. We demonstrated that the fully differential voltage amplifier allows for a nearly doubled SNR with respect to the typically used single-ended transimpedance amplifier.

An 18 nW −47/−40 dBm Sensitivity 3/100 kbps MEMS-Assisted CMOS Wake-Up Receiver

This work demonstrates a low-power wake-up receiver utilizing a MEMS resonant device followed by CMOS demodulator and rectifying trigger circuits. The MEMS device is a Lamb wave piezoelectric-based acoustic resonator utilizing a thin film of lithium niobate (LN) which possess the largest reported electromechanical coupling factors ( ${k} _{t}^{2}$ ). This parameter, in conjunction with the high Q, is of paramount importance in providing for passive voltage amplification and filtering of the input signal. The CMOS demodulator is a 9-stage differential cross-coupled passive rectifier circuit designed with a differential output. It demodulates the signal from the MEMS resonator with the same gain as that could be achieved by a single-ended rectifier, but with half the charging time for double the single-ended bit-rate. The rectifier’s output is AC-coupled and fed to a two-stage differential voltage amplifier. Finally, an active latch rectifier is used to trigger a wake-up signal. The wake-up receiver is tested with an on-off keying modulated signal with carrier frequency around 400 MHz achieving a bit rate up to 100 kbps. This newly proposed system exhibits a sensitivity of −47 dBm at 3 kbps while consuming a total power of 18 nW.

A Multi-Channel Low-Noise Analog Front End Circuit for Linear LADAR

In this brief, a 32-channel analog front end circuit featured with high gain, high bandwidth, and low noise characteristics is designed. The proposed three-stage analog front end (TS-AFE) includes a variable gain transimpedance amplifier, a differential voltage amplifier, and an analog equalizer. The first stage adopts the shunt-feedback topology to optimize the overall noise, the second stage helps to enlarge the input dynamic range further, and the last stage boosts the channel bandwidth. Furthermore, a 6-bit current digital-to-analog converter (DAC) is integrated in the equalizer to produce a built-in threshold voltage. The 32-channel TS-AFE chip is fabricated with 0.18-μm CMOS technology. The measurement results show that with the highest gain configuration, the circuit realizes 101.6 dB transimpedance gain, 190 MHz bandwidth, and 2.6 pA/sqrt(Hz) input noise current spectral density, respectively. The minimum detectable current achieves 0.4 μA with SNR = 10. The maximum output voltage swing is greater than 1000 mV, and the linear dynamic range reaches 64 dB. The power consumption per channel is as low as 37 mW from a single 3.3 V supply.

On the Effect of Body Capacitance to Ground in Tetrapolar Bioimpedance Measurements

Tetrapolar bioimpedance measurements on subjects have long been suspected of being affected by stray capacitance between the subjects' body and ground. This paper provides a circuit model to analyze that effect in the frequency range from 100Hz to 1MHz in order to identify the relevant parameters when impedance is measured by applying a voltage and measuring both the resulting current and the potential difference between two points on the surface of the volume conductor. The proposed model includes the impedance of each electrode and the input impedance of the differential voltage amplifier. When common values for the circuit parameters are assumed, the simplified model predicts: 1) a frequency-independent gain (scale factor) error; 2) inductive artifacts, that is, the measured impedance increases with increasing frequency and may include positive angle phases; and 3) resonance that can affect well below 1MHz. In addition to the stray capacitance to ground, relevant parameters that determine those errors are the capacitance of the "low-current" electrode and the input capacitance of the differential voltage amplifier. Experimental results confirm those theoretical predictions and show effects from several additional resonances above 1MHz that also depend on body capacitance to ground.

Design and assessment of a robust voltage amplifier with 2.5 GHz GBW and >100 kGy total dose tolerance

A differential voltage amplifier with a gain-bandwidth product of 2.5Ghz and using adaptive biasing has been designed in a standard CMOS technology and assessed under radiation and temperature variations. The principle used in this ASIC will be employed in the design of a Gbps TIA with improved tolerance for γ-irradiation and temperature for an optical instrumentation (LIDAR) receiver aiming at operation in harsh environments. The voltage amplifier was tested under gamma radiation and features a gain degradation of merely 4.5% up to a total dose of 100kGy. In order to verify the radiation effects on the IC, the threshold voltage shift of the separate transistors has been investigated. Temperature characterization has shown that the amplifier features a reduction of the voltage gain by only 5.6% for a temperature range of -40 till 130 °C.

Fully-Integrated 6H-SiC JFET Amplifiers for High-Temperature Sensing

Fully monolithic, transimpedance and differential voltage amplifiers are reported in this paper based on 6H-SiC, n-channel, depletion-mode JFETs. The single-stage transimpedance amplifier has a low-frequency gain of ~222 kΩ at room temperature, with ~2% gain matching for copies on a 6-mm x 6-mm die. The transimpedance gain is set by an integrated resistor and is ~1.1 MΩ at 450oC. The single-stage, differential voltage amplifier has a typical gain-bandwidth of ~2.8 MHz at 600oC and a typical open-loop voltage gain of ~35.8 dB at 25oC, with less than 1-dB gain variation from 25-600oC.

An Inexpensive, Low‐Maintenance, Precision Amplifier, Dissolved Oxygen Sensor, and Miniature Data Logger System Designed for Long‐Term Deployment in Riverine Systems

AbstractThe dissolved oxygen (DO) concentration is a dynamic water quality variable that is critical to fisheries. To obtain simultaneous DO data at 15‐min intervals over long periods (i.e., months) at a number of points along a river, a simple, inexpensive (<US$40) differential voltage amplifier circuit was developed to provide an interface between a galvanic DO probe and a miniature data logger. The circuit is designed around precision, micropower, single‐voltage supply operational amplifiers and consumes less than 3 W while isolating and amplifying the output of a galvanic DO probe. The circuit is efficient and rapid enough to be powered by the data logger's 2.5‐V, 1‐mA, 18‐ms‐read sensor trigger signal. The complete unit, including the enclosure and floats, was constructed for less than $700. Fourteen were deployed in the upper portion of the St. Johns River, Florida, over an 18‐month period. The units remained continuously deployed for 4‐ to 6‐month periods 82% of the time, and 93% of the collected data passed quality assurance tests.

A novel structure of the fully differential CMOS amplifier with symmetric active load

In this article, we propose a novel general structure of a linear symmetric fully differential voltage amplifier with a symmetric output. It is applicable to all sets of complementary component pairs such as BJT, JFET and MOSFET. We demonstrate the superiority of the proposed circuit in comparison with the state-of-the-art solutions. The characteristics are illustrated in both frequency and time domains, and a comparison is given between the proposed amplifier and the traditional differential amplifier with a current mirror as an active load for the same set of complementary components in CMOS equally sized W/L = 150/3 technology. The static voltage transfer characteristic of the proposed amplifier has an extremely small linearity error. The deviation from the linear characteristics is less than 0.018 mV for the amplitude of the output differential voltage of 1 Vpp. The common-mode gain by symmetric output is negligible because the proposed structure is fully symmetric. The simulation results demonstrate the efficiency of the proposed amplifier.

Automated Design of Analog Circuits Accelerated by Use of Simplified MOS Model and Reuse of Genetic Operations

This paper presents an automated design of linear and non-linear differential analog circuits accelerated by reuse of genetic operations. The system first synthesizes circuits using pairs of simplified MOSFET model. During the evolutionary process, genetic operations that improve circuit characteristics are stored in a database and reused to effectively obtain a better circuit. Simplified elements in a generated circuit are replaced by MOSFETs and optimization of the transistor size is performed using an optimizer available in market if necessary. The capability of this method is demonstrated through experiments of synthesis of a differential voltage amplifier, a circuit having cube-law characteristic in differential mode and square-law characteristic in common-mode, and a dB-linear VGA (Variable Gain Amplifier). The results show the reuse of genetic operations accelerates the synthesis and success rate becomes 100%.

Coupled single-electron transistors as a differential voltage amplifier

We have investigated a possible application of single-electron transistor (SET) devices for use as a differential voltage amplifier. The device consists of a box-SET and probe-SET coupled with each other through a tunnel junction, with the gate electrodes of the two SETs acting as differential signal inputs. The voltage across the probe-SET at a fixed bias current provides information about the charge states of both the probe-SET and the box-SET, which was confirmed by simulations based on the orthodox theory of single-electron tunnelling. When operated as a differential amplifier, the output probe-SET voltage signal was measured as a function of the two gate input signals. While the output signal was found to be proportional to the difference in the two input signals, it remained unchanged for input signals of the same amplitude (referred to as the common mode signal), and the common-mode rejection ratio was found to be 27.5 dB.

Fast device for large transport critical current measurements

In this work we describe some modifications that improve an equipment for the fast measurement of transport critical currents in superconducting materials having a critical current of hundreds of amperes. It is based on the appliance of an electrical current for a very short period of time, rapid enough to preserve the integrity of the current leads and minimize the Joule effect. Power is applied to the wire-sample ensemble and the voltage drop is measured within seconds, with a resolution that can reach the order of 10 nV. The hardware is composed of three parts: the current pulse generator, a low noise-quick response differential voltage amplifier and a PC with a digital to analog converter—analog to digital converter card. The data acquisition is achieved via an Assembler program.

Noise characteristic design of CMOS source follower and voltage amplifier for active semiconductor micro-electrodes for neural signal recording.

A noise performance design method for the pre-amplifiers of an active neural probe is given. The on-chip circuitry of the active neural probe consists of CMOS devices that show high-/low-frequency noise, so that the device noise can become dominant. Analysis of the signal-to-device-noise ratio (SDNR) for the CMOS source follower buffer and two-stage differential voltage amplifier is given. Closed-form expressions for the output noise power are derived and exploited to tailor the parameters that are controllable during circuit design. The output SDNR is calculated considering the real extracellular action potentials, the electrode-electrolyte interface and the noise spectrum of CMOS devices from typical foundries. It is shown that the output device noise power can be much higher than the output signal power if the devices at the input stage of the pre-amplifier are made as small as given fabrication technology permits. Quantitative information of the circuit parameters to achieve an SDNR higher than 5 for neural spikes with 60 microV amplitude are provided for both pre-amplifier types.

New BiFET composite unit and its applications

Abstract A new BiFET composite unit comprising two BJT's, one JFET and two passive resistors is described and, as a unit, shown to exhibit FET-like characteristics with much improvement in thermal stability and transfer curve linearity over a wide range of input bipolar voltage and temperature variations. The forward transfer admittance of the unit may easily be adjusted over a wide range. A differential voltage amplifier using the proposed unit is also described. A computer simulation as well as experimental results are given to validate the analytical conclusions.

New charge-differencing technique for c.c.d. transversal filters

A new charge-differencing technique for use with c.c.d. transversal filters employing charge sensing is described. The method eliminates the need for a voltage-differencing amplifier and requires the addition of one extra matched capacitor.