Hardware Trojan Detection Research Articles

An Enhanced Detection Method of Hardware Trojan Based on CNN- Attention-LSTM

The security issues caused by the insertion of hardware Trojans seriously threaten the security and reliability of the entire hardware device. This article constructs a detection model that combines convolutional neural networks (CNN) and long short-term memory networks (LSTM), and introduces attention mechanism to enhance the model's ability to recognize complex circuits. This method can automatically learn and optimize feature extraction and classification models, reduce reliance on manual experience through training on large amounts of data, and improve the intelligence level of detection. Especially, by combining attention mechanisms and LSTM models, it is possible to more effectively capture small anomalies in circuit design and improve the accuracy and efficiency of hardware Trojan detection. The experimental results show that the proposed CNN-Attention-LSTM model exhibits superior Trojan detection performance and good generalization ability on different datasets, with an precision of 96.3%, a recall rate of 94.7%, and an F1 score of 95.5%.

A fast modularity hardware Trojan detection technique for large scale gate-level netlists

Hardware Trojans (HTs) are a kind of malicious circuit implanted by adversaries and induce malfunction under rare situations. Attackers may insert HTs into untrusted third-party intellectual properties (3PIPs), thus severely threatening the hardware security of ICs. To overcome this issue, state-of-art HT detection techniques are proposed based on feature extraction of gate-level netlists (GLNs). However, these techniques may take a long time to extract HT signals for large scale GLNs. In this paper, we propose a fast modularity HT detection (FMTD) method for large scale GLNs. The GLN modularity algorithm can divide the whole GLN into several small modules with the boundaries of D flip-flops (DFFs) of each module. By analyzing the transition rate of critical signals, preserving suspicious DFFs, and repairing the ring circuit, we can ensure the integrity of HT circuits during the GLN modularity process. Then, the calculation of the testability of each module is conducted in parallel with our self-designed tool. In the self-designed tool, we repair the ring circuit, calculate the testability values, and calibrate the testability values of module boundary signals. Compared with the EDA tools, our self-designed tool has no upper limit of testability values. Then, the testability values are sent to the unsupervised K-means clustering simultaneously to diagnose the HT signals. Facilitated by the modularity of the GLN, the detection time of 105 order signals sample is reduced by up to 90 % when compared to the traditional COTD method, while our MFTD method shows a similar HT detection performance to that of the traditional COTD method. For all 20 kinds of GLN samples in Trust-hub, our FMTD method can obtain a detection accuracy of 100 %, and signal diagnosis precision of more than 93 % with a diagnosis false positive rate lower than 1 %.

Natural Language Processing for Hardware Security: Case of Hardware Trojan Detection in FPGAs

Natural Language Processing for Hardware Security: Case of Hardware Trojan Detection in FPGAs

Towards the Detection of Hardware Trojans with Cost Effective Test Vectors using Genetic Algorithm

Towards the Detection of Hardware Trojans with Cost Effective Test Vectors using Genetic Algorithm

A Hardware Trojan Diagnosis Method for Gate-Level Netlists Based on Graph Theory

With the increasing complexity of integrated circuit design, the threat of a hardware Trojan (HT) is becoming more and more prominent. At present, the research mainly focuses on the detection of HTs, but the amount of research on the diagnosis of HTs is very small. The number of existing HT diagnosis methods is generally completed by detecting the HT nodes in the netlist. The main reason is the lack of consideration of the integrity of HTs, so the diagnosis accuracy is low. Based on the above reason, this paper proposes two implanted node search algorithms named layer-by-layer difference search (LDS) and layer-by-layer grouping difference search (LGDS). The LDS algorithm can greatly reduce the search time, and the LGDS algorithm can solve the problem of input node disorder. The two methods greatly reduce the number of nodes sorting and comparing, and therefore the time complexity is lower. Moreover, the relevance between implanted nodes is taken into account to improve the diagnosis rate. We completed experiments on an HT diagnosis; the HT implantation example is from Trust-Hub. The experimental results are shown as follows: (1) The average true positive rate (TPR) of the diagnosis using KNN, RF, or SVM with the LDS or LGDS algorithm is more than 93%, and the average true negative rate (TNR) is 100%. (2) The average proportion of implanted nodes obtained by the LDS or LGDS algorithm is more than 97%. The proposed method has a lower time complexity compared with other existing diagnosis methods, and the diagnosis time is shortened by nearly 75%.

A Siamese deep learning framework for efficient hardware Trojan detection using power side-channel data

Hardware Trojans (HTs) are hidden threats embedded in the circuitry of integrated circuits (ICs), enabling unauthorized access, data theft, operational disruptions, or even physical harm. Detecting Hardware Trojans (HTD) is paramount for ensuring IC security. This paper introduces a novel Siamese neural network (SNN) framework for non-destructive HTD. The proposed framework can detect HTs by processing power side-channel signals without the need for a golden model of the IC. To obtain the best results, different neural network models such as Convolutional Neural Network (CNN), Gated Recurrent Unit (GRU), and Long Short-Term Memory (LSTM) are integrated individually with SNN. These models are trained on the extracted features from the Trojan Power & EM Side-Channel dataset. The results show that the Siamese LSTM model achieved the highest accuracy of 86.78%, followed by the Siamese GRU model with 83.59% accuracy and the Siamese CNN model with 73.54% accuracy. The comparison shows that of the proposed Siamese LSTM is a promising new approach for HTD and outperform the state-of-the-art methods.

Hardware Trojan Detection Method Against Balanced Controllability Trigger Design

Hardware Trojan Detection Method Against Balanced Controllability Trigger Design

Register transfer level hardware design information flow modeling and security verification method

Information flow analysis can effectively model the security behavior and security properties of hardware design. However, the existing gate level information flow analysis methods cannot deal with large-scale designs due to computing power and verification effectiveness, and the register transfer level (RTL) information flow analysis methods require formal languages to rewrite hardware designs. This paper proposes a RTL hardware design information flow modeling and security verification method. Based on the RTL functional model, this method develops an information flow tracking logical model to model security behavior and security properties of RTL hardware designs from the perspective of information flow. This method can be integrated into EDA flows and uses EDA testing and verification tools to capture security property violations and detect security vulnerabilities based on non-interference security policy. The results on experiments with Trust-Hub hardware Trojan benchmarks show that the proposed method can effectively detect hardware Trojans.

Hardware Trojans Detection and Prevention Techniques Review

Hardware Trojans Detection and Prevention Techniques Review

A Side-Channel Hardware Trojan Detection Method Based on Fuzzy C-Means Clustering and Fusion Distance Algorithms

A Side-Channel Hardware Trojan Detection Method Based on Fuzzy C-Means Clustering and Fusion Distance Algorithms

A neural network framework based on ConvNeXt for side‐channel hardware Trojan detection

AbstractResearchers in the field of hardware security have been dedicated to the study of hardware Trojan detection. Among the various approaches, side‐channel detection methods are widely used because of their high detection accuracy and fewer constraints. However, most side‐channel detection methods cannot make full use of side‐channel information. In this paper, we propose a framework that utilizes the continuous wavelet transform to convert time‐series information and employs an improved ConvNeXt network to detect hardware Trojans. This detection framework first converts one‐dimensional time‐series information into a two‐dimensional time–frequency map using the continuous wavelet transform to leverage frequency information in electromagnetic side‐channel signals. Then, the two‐dimensional time–frequency map is fed into the improved ConvNeXt network, which increases the weight of the informative parts in the two‐dimensional time–frequency map and enhances detection efficiency. The results indicate that the method proposed in this paper significantly improves the accuracy of hardware Trojan detection.

Heat Transfer-Inspired Network for Image Super-Resolution Reconstruction.

Image super-resolution (SR) is a critical image preprocessing task for many applications. How to recover features as accurately as possible is the focus of SR algorithms. Most existing SR methods tend to guide the image reconstruction process with gradient maps, frequency perception modules, etc. and improve the quality of recovered images from the perspective of enhancing edges, but rarely optimize the neural network structure from the system level. In this article, we conduct an in- depth exploration for the inner nature of the SR network structure. In light of the consistency between thermal particles in the thermal field and pixels in the image domain, we propose a novel heat-transfer-inspired network (HTI-Net) for image SR reconstruction based on the theoretical basis of heat transfer. With the finite difference theory, we use a second-order mixed-difference equation to redesign the residual network (ResNet), which can fully integrate multiple information to achieve better feature reuse. In addition, according to the thermal conduction differential equation (TCDE) in the thermal field, the pixel value flow equation (PVFE) in the image domain is derived to mine deep potential feature information. The experimental results on multiple standard databases demonstrate that the proposed HTI-Net has superior edge detail reconstruction effect and parameter performance compared with the existing SR methods. The experimental results on the microscope chip image (MCI) database consisting of realistic low-resolution (LR) and high-resolution (HR) images show that the proposed HTI-Net for image SR reconstruction can improve the effectiveness of the hardware Trojan detection system.

Hardware-Trojan Detection at Gate-Level Netlists Using a Gradient Boosting Decision Tree Model and Its Extension Using Trojan Probability Propagation

Hardware-Trojan Detection at Gate-Level Netlists Using a Gradient Boosting Decision Tree Model and Its Extension Using Trojan Probability Propagation

AI Trojan Attack for Evading Machine Learning-based Detection of Hardware Trojans

The globalized semiconductor supply chain significantly increases the risk of exposing System-on-Chip (SoC) designs to hardware Trojans. While machine learning (ML) based Trojan detection approaches are promising due to their scalability as well as detection accuracy, ML-based methods themselves are vulnerable from Trojan attacks. In this paper, we propose a robust backdoor attack on ML-based Trojan detection algorithms to demonstrate this serious vulnerability. The proposed framework is able to design an AI Trojan and implant it inside the ML model that can be triggered by specific inputs. Experimental results demonstrate that the proposed AI Trojans can bypass state-of-the-art defense algorithms. Moreover, our approach provides a fast and cost-effective solution in achieving 100% attack success rate that outperforms state-of-the art methods based on adversarial attacks.

Node-wise Hardware Trojan Detection Based on Graph Learning

Node-wise Hardware Trojan Detection Based on Graph Learning

Robust Hardware Trojan Detection Method by Unsupervised Learning of Electromagnetic Signals

Robust Hardware Trojan Detection Method by Unsupervised Learning of Electromagnetic Signals

FP-GNN: A Graph Neural Network for Hardware Trojan Detection in Gate-Level Netlist

FP-GNN: A Graph Neural Network for Hardware Trojan Detection in Gate-Level Netlist

Hardware Trojan Detection using Graph Neural Networks

The globalization of the Integrated Circuit (IC) supply chain has moved most of the design, fabrication, and testing process from a single trusted entity to various untrusted third party entities around the world. The risk of using untrusted third-Party Intellectual Property (3PIP) is the possibility for adversaries to insert malicious modifications known as Hardware Trojans (HTs). These HTs can compromise the integrity, deteriorate the performance, and deny the functionality of the intended design. Various HT detection methods have been proposed in the literature; however, many fall short due to their reliance on a golden reference circuit, a limited detection scope, the need for manual code review, or the inability to scale with large modern designs. We propose a novel golden reference-free HT detection method for both Register Transfer Level (RTL) and gate-level netlists by leveraging Graph Neural Networks (GNNs) to learn the behavior of the circuit through a Data Flow Graph (DFG) representation of the hardware design. We evaluate our model on a custom dataset by expanding the Trusthub HT benchmarks trusthub1. The results demonstrate that our approach detects unknown HTs with 97% recall (true positive rate) very fast in 21.1ms for RTL and 84% recall in 13.42s for Gate-Level Netlist.

A Hardware Trojan Detection and Diagnosis Method for Gate-Level Netlists Based on Machine Learning and Graph Theory

The integrated circuit (IC) supply chain has become globalized, thereby inevitably introducing hardware Trojan (HT) threats during the design stage. To safeguard the integrity and security of ICs, many machine learning (ML)-based solutions have been proposed. However, most existing methods lack consideration of the integrity of HTs, thereby resulting in lower true negative rates (TNR) and true positive rate (TPRs). Therefore, to solve these problems, this paper presents a HT detection and diagnosis method for gate-level netlists (GLNs) based on ML and graph theory (GT). In this method, to address the issue of nonuniqueness in submodule partition schemes, the concept of “Maximum Single-Output Submodule (MSOS)” and a partition algorithm are introduced. In addition, to enhance the accuracy of HT diagnosis, we design an implant node search method named breadth-first comparison (BFC). With the support of the aforementioned techniques, we have completed experiments on HT detection and diagnosis. The HT implantation examples selected in this article are sourced from Trust-Hub. The experimental results demostrate the following: (1) The detection method proposed in this article, when detecting gate-level hardware trojans (GLHTs), achieves a TPR exceeding 95%, a TNR exceeding 37%, and F1 values exceeding 97%. Compared to existing methods, this method has improved the TNR for GLHTs by at least 25%. (2) The TPR for diagnosing GLHTs is consistently above 93%, and the TNR is 100%. Compared to existing methods, this method has achieved approximately a 4% improvement in the TPR and a 15% improvement in the TNR for GLHT diagnosis.

A Pre-Silicon Detection Based on Deep Learning Model for Hardware Trojans

Several hardware Trojan (HT) detection techniques are available today to ensure the security of hardware systems. However, the existing pre-silicon HT detection techniques have problems such as difficulties in capturing HT path features and poor applicability. To address these challenges, this paper proposes a gate-level HT detection scheme based on a deep learning model. We parse the circuit gate-level netlist and develop an algorithm to extract circuit path sentences based on the signal propagation rule. Path sentences consisting of gate names are extracted as experimental datasets. We apply the theory of natural language processing (NLP) to the task of HT detection and use three neural networks to filter the length of path sentences. Then, based on the deep learning model text convolutional neural network (TextCNN), we propose PS-TextCNN for HT detection. Our approach is verified on seven benchmark circuits of the RS232-series and eight benchmark circuits of the s-series. We achieve an average true positive rate (TPR) of 88.9%. The TPR of the RS232-series reaches a high score of 99.5%. The TPR of the s-series is 79.5%, which is significantly higher than that of the existing gate-level HT detection techniques.