Circuit Design Parameters Research Articles

Research on Wireless Charging System Based on Photovoltaic Power Supply

Given the popularity of mobile devices and rapid advances in wireless technology, it is impossible to overlook how important charging methods should be as convenient and environmentally sustainable. This paper investigates the PV power supply integration in their wireless charging systems, which aligns well with developing an environmentally safe and renewable alternative for recharging that would alleviate pressure on conventional harvesting of electricity, while also improving ecological conservation and reducing carbon emissions following earlier interests. Firstly, based on the PV battery model modeling methods and fully considering light intensity conditions at various temperatures throughout a year-long experimental validation of the electrical output characteristics of these PV panels. Second, it adapts and optimizes DC-DC converters to the output of PV panels for higher energy conversion efficiency by stabilizing energy outputs due to weathering issues. Additional area for research includes the choice and tuning of Maximum Power Point Tracking (MPPT) algorithms that will enable this system to follow maximum power point under diverse weather and light conditions in order to maximize energy harvesting. Moreover, the paper also performs an in-depth study of coupling transformer design and optimization of main circuit parameters for better energy transmission efficiency and System stability. The feasibility and effectiveness of the PV-powered wireless charging systems are validated by simulation verification as well as experimental testing in this paper.

A Novel Single-Stage Boost Single-Phase Inverter and Its Composite Control Strategy to Suppress Low-Frequency Input Ripples

Low-frequency pulsating ripples exist on the input side of a single-phase inverter, which bring some adverse effects and harm to the inverter and photovoltaic power generation system. In order to suppress the low-frequency pulsating ripple and reduce the filter circuit parameters, a novel single-stage boost single-phase inverter is proposed, which can suppress low-frequency ripple. And a three-closed-loop compound control strategy that can suppress input low-frequency ripples under the limitation of an energy storage inductor current and buffer capacitor voltage is proposed. The circuit topology, control strategy, key circuit parameters design, system modeling, and simulation of the inverters are deeply analyzed and studied. Simulation and experimental results show that the inverter has a good ability to suppress input low-frequency ripples.

Accelerating multilayer frequency selective surface absorber design by combining equivalent circuit models with machine learning

Designing high-performance electromagnetic functional materials and artificial structures is of great significance for electromagnetic wave modulation applications. Optimizing performance in the high-dimensional parameter space of electromagnetic functional materials has posed a challenging problem. This paper proposes the use of reinforcement and transfer learning methods to facilitate the quick and accurate design of wideband circuit analog absorbers (CAA). A trained reinforcement learning network is utilized to comprehend the relationship between reflectivity performance and changes in impedance parameter. Furthermore, the transfer learning method is applied to accelerate the training process, leading in a 20-fold reduction in the number of simulations. To validate the effectiveness of this approach, a double-layer absorber aiming for reflectivity less than −20 dB at 3–10 GHz is designed, requiring only 50 simulations. This demonstrates that the proposed method provides a flexible strategy for the interactive design of equivalent circuit and electromagnetic structural parameters. Moreover, it presents a novel and efficient solution for microwave absorber design, with potential applications across various microwave design fields.

Controllability, reachability, observability performance analysis of ultra‐high voltage converter cascaded systems based on switched linear system model

SummaryUltra‐high voltage converters are usually employed to transform low voltage to high voltage in microgrids to produce renewable energy. However, it is challenging to develop control techniques due to the complicated structure of ultra‐high voltage converters and the numerous power switches and circuit components, which leads to poor dynamic characteristics of the system and a marked increase in fault rates. In order to understand the control theoretical characteristics of the ultra‐high voltage converter and provide a theoretical basis for circuit parameter analysis and control strategy design, this paper takes the boost converter cascaded system as an example to establish an accurate switching linear system model, discusses the control theoretical characteristics of the ultra‐high voltage converter in detail, and uses the decision theorem to draw the conclusion that the system is structurally controllable, reachable, and observable, simplifying the difficulty of analysis. The simulation and experimental findings show that the conclusion was drawn correctly. The research findings will give the boost converter cascaded systems modulation approach and circuit parameter design a theoretical foundation.

Optimization and Design of Circuit Parameters of Aircraft Engine Speed Acquisition System

Rotating speed is an important parameter to reflect the running condition of the engine, and its real-time measurement and accuracy are directly related to the control accuracy of the engine. In this paper, according to the actual demand for the measurement of engine speed, a system architecture and a hardware design scheme of frequency acquisition circuits are proposed. The overall simulation is carried out by Saber. According to technical requirements, the transfer function of the band-pass filter network and the hysteresis threshold are analyzed and calculated theoretically. By adjusting the RC value of the low-pass filter and introducing the reference voltage to reduce the hysteresis threshold, the acquisition failure caused by the low output excitation when the engine is running at low speed is solved. The high-precision acquisition in the full speed range is realized, with ideal simulation.

Analytical models of the crosstalk voltage in SiC MOSFETs under different loads

AbstractDue to the higher switching speed and lower threshold voltage of SiC MOSFET, its crosstalk issue is more serious than that of Si devices. Firstly, the mechanism and process of crosstalk under resistive load and inductive load are compared and analyzed. Then, a parameter decoupling method based on energy conservation is proposed, and an analytical model of the crosstalk voltage under resistive load is established. Moreover, an analytical model of the crosstalk voltage under inductive load with only device and circuit parameters is introduced. Furthermore, the influence of the drive resistance and the common source inductance on the crosstalk voltage under different loads is evaluated through the analytical model. Finally, a double pulse test is carried out to verify the validity of the analysis. The results presented here can provide guidance for the design of gate circuit parameters to regulate the crosstalk issue of SiC MOSFETs under different loads.

A Time-Domain Analysis Model for Modular-Multilevel-Based Grid-Forming Converters in Isolated Power Supply

The modular multilevel based grid-forming converter (MMGC) is considered to be a viable solution in isolated island power supply. However, the existing analysis model cannot meet the requirement of its performance evaluation and circuit parameters design. This paper proposes a high-accurate time-domain steady-state analysis model for MMGC, where the coupled relationships among the load, the MMGC, and the dc-side system can be fully reflected; the amplitudes and phase angles of electrical quantities, including their harmonic components, can be directly calculated. Then, the influence of <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">LC</i> filters on submodule capacitor are studied. The study found that the submodule capacitance is highly correlated to the filter capacitance and almost uncorrelated to the filter inductance. It is also found that the filter capacitance selection should consider the load characteristic; a larger filter capacitance is required in the inductive load supply scenario. Finally, the studies are verified by both simulation and experiment.

A reduced‐switch‐count two‐phase interleaved switch‐control‐capacitor LLC converter with accurate current balancing

AbstractIn this paper, a reduced‐switch‐count two‐phase interleaved LLC converter with precise current balancing is proposed by using switching‐control‐capacitor (SCC) technology. Compared with the conventional SCC‐LLC converter, the proposed two‐phase SCC‐LLC converter reduces the switch count with the SCC circuits, and achieves excellent current sharing under all the tolerance conditions between the two‐phase resonant elements. In the proposed converter, the SCC circuit is only used in the first phase. The design of the SCC circuit parameters is analyzed to reduce the voltage stress of the SCC circuit and to ensure that two‐phase currents are balancing with large tolerance of resonant elements. A 2.16‐kW GaN‐based two‐phase interleaved SCC‐LLC converter prototype is established for data center application, and the experimental results show that the 98.1% peak efficiency, the 97.6% full load efficiency, and higher than 96% efficiency at the wide range from 3‐A to 40‐A load current are achieved. The precise current sharing lower than 1% is achieved by using a cheap ceramic capacitor with high tolerance, which validates the performance of the converter.

Efficient design and analysis of secure CMOS logic through logic encryption

Untrusted third parties and untrustworthy foundries highlighted the significance of hardware security in the present-day world. Because of the globalization of integrated circuit (IC) design flow in the semiconductor industry, hardware security issues must be taken to prevent intellectual property (IP) piracy. Logic encryption is an efficient method to protect circuits from IP piracy, reverse engineering, and malicious tampering of IC for Trojan insertion. Researchers have proposed many logic encryption methods, which lead to overhead in circuit design parameters such as area, power, and performance. This paper aims to bring a trade-off between these parameters, with security being the main key factor, and ensure the design metrics by proposing a novel transistor-level method of logic encryption for CMOS gates. Experimental results show that, on the usage of proposed encrypted key gates, the design overheads such as area, power, delay, and energy are reduced by an average of 42.94%, 37.37%, 26.79%, and 50.96%, respectively, over the existing logic encryption-based topologies.

A Lossless Soft-Switching Boost Converter with Passive Auxiliary Circuit

Based on boost topology, a lossless soft-switching passive circuit with a single switch is proposed in this paper. The proposed circuit's power switch achieves approximately zero voltage switching (ZVS) and zero current switching (ZCS) without increasing the number of switches. Due to an auxiliary inductor, the reverse recovery loss of the rectifier diode is significantly reduced. Besides, all auxiliary circuit energy is returned to the power supply without additional energy consumption. Therefore, by using a traditional control method, simple design, and appropriate auxiliary circuit parameters, soft-switching can be realized in a wide voltage and full load range. Moreover, the number of components used in the auxiliary circuit is minimal. This method makes circuit design more manageable and achieves 95.39% high efficiency since the increase of voltage stress is relatively small.

MODELING AND CHARACTERISTIC ANALYSIS OF FRACTIONAL-ORDER BOOST CONVERTER BASED ON THE CAPUTO–FABRIZIO FRACTIONAL DERIVATIVES

This paper presents a novel approach for modeling Boost converters using the Caputo–Fabrizio (C-F) definition-based fractional-order model to address singular characteristics in fractional-order definitions and enhance model accuracy. A small signal modeling method is proposed to improve the accuracy of circuit parameter design and to derive state-averaged models, state-space equations, and transfer functions. The influence of capacitor and inductor orders on steady-state characteristics is analyzed and the influence of fractional-order on ripple characteristics is investigated through simulation. When the fractional-order approaches 1, the output voltage increases and the inductance current decreases, with waveform jitter mitigation. Moreover, boundary conditions for continuous conduction mode operation are established based on ripple characteristics. The numerical and circuit-oriented simulations verify the correctness of the proposed model. Finally, the orders and accurate parameters of capacitors and inductors based on the C-F definition are determined and the experiments are conducted. The comparison between the experimental and simulation results demonstrates that the proposed model can accurately describe the steady-state characteristics of the practical circuit systems, which further validates the accuracy of the proposed method.

A Highly Accurate Mathematical Model for Analyzing Modular Multilevel Converters in Transformer-Less Applications

Transformer-less connection schemes can provide a feasible solution for lowering the economic cost, occupied space, and device weight of modular multilevel converter (MMC) systems. However, due to the reduction in the converter transformer, the current flow loop is changed; as a result, the existing MMC model is not suitable. In this paper, the ac- and dc-side equivalent circuit models of the MMC system using a transformer-less connection scheme are established in both a–b–c stationary and d–q rotating coordinate systems. Then, a highly accurate mathematical analysis model is proposed, in which the interactions among the electrical quantities can be fully seen. The mathematical model is established in the time domain, and hence the amplitude and phase angle of every harmonic component in each quantity can be directly obtained. The proposed model is verified under various typical situations by comparing the calculated values with the actual waveforms. The comparison results prove that the calculation error is small enough to be negligible. The mathematical model in this paper can provide a powerful tool in terms of the performance analysis and the main circuit parameter design for MMCs in transformer-less applications.

Artificial-Intelligence-Based Design for Circuit Parameters of Power Converters

Parameter design is significant in ensuring a satisfactory holistic performance of power converters. Generally, circuit parameter design for power converters consists of two processes: analysis and deduction process and optimization process. The existing approaches for parameter design consist of two types: traditional approach and computer-aided optimization (CAO) approach. In the traditional approaches, heavy human-dependence is required. Even though the emerging CAO approaches automate the optimization process, they still require manual analysis and deduction process. To mitigate human-dependence for the sake of high accuracy and easy implementation, an artificial-intelligence-based design (AI-D) approach is proposed in this article for the parameter design of power converters. In the proposed AI-D approach, to achieve automation in the analysis and deduction process, simulation tools and batch-normalization neural network (BN-NN) are adopted to build data-driven models for the optimization objectives and design constraints. Besides, to achieve automation in the optimization process, genetic algorithm is used to search for optimal design results. The proposed AI-D approach is validated in the circuit parameter design of the synchronous buck converter in the 48 to 12 V accessory-load power supply system in electric vehicle. The design case of an efficiency-optimal synchronous buck converter with constraints in volume, voltage ripple, and current ripple is provided. In the end of this article, feasibility and accuracy of the proposed AI-D approach have been validated by hardware experiments.

A Hybrid Modular Interline Current Flow Controller for Meshed HVDC Grids

In meshed high-voltage direct current (HVdc) grid, the current flows through the lines cannot be controlled with sufficient freedom without additional power electronics-based devices, namely current flow controller (CFC). In this article, a novel hybrid modular interline CFC is proposed based on H-bridge submodules and thyristor valves. Due to its modularity, the proposed CFC is particularly suitable for applications requiring high voltage and large power capacity. The circuit structure, operation principle, and parameter design are presented. In addition, a control strategy is developed for the proposed CFC. Simulations are carried out using a four-terminal meshed HVdc grid to verify the effectiveness of the topology and its control strategy. A downscaled prototype is built, which further validates the proposed CFC.

A Modified Interleaved Capacitor Clamped DC–DC Converter With Non-Resonant Soft Switching

Since the solar panels and fuel cells have low output voltage, which need to be converted to the 400 V or higher dc bus voltage in the renewable energy power generation systems, where, the high gain dc–dc converter plays a key role. Furthermore, with the requirement of the converter in low cost and high efficiency, the soft-switching interleaved boost-type converters based on switched-capacitor and voltage multiplier cell as the high gain dc–dc converters have been widely applied. However, the above-mentioned soft-switching interleaved boost-type converters in literature have resonant spikes on the switches or there are coupled inductors, which will cause the high cost due to the large stresses of the switches or low efficiency due to the high core losses of the coupled inductors. To solve the above-mentioned problems, a modified interleaved capacitor clamped (MICC) dc–dc converter with non-resonant soft-switching (NRSS) is proposed, in which only an auxiliary inductor operating in discontinuous conduction mode with few μH is used to achieve the zero-current-switching for all switches and diodes. Furthermore, the operating principle of the proposed converter is given, the interleaved boost structure is used as the front stage of the proposed converter to reduce the input current ripple and lighten the current stress on all switches and magnetic components, the MICC structure with NRSS as the output stage is proposed as a voltage multiplier module to achieve the high voltage gain. Then, the circuit parameter design for this converter is presented. Finally, a 400 W experimental prototype is built to verify the correctness and the effectiveness of the proposed topology.

Silicon Photomultiplier-A High Dynamic Range, High Sensitivity Sensor for Bio-Photonics Applications.

This work is an overview of silicon photomultipliers (SiPMs) with a view to defining their importance for bio-photonic and clinical applications. SiPMs are benchmarked against other common photodetectors, namely, PIN diodes and avalanche photodetectors (APDs) and are compared with respect to important circuit design parameters. It will be shown that careful selection of the design bias voltage, overvoltage, gain defining components and device integration to micro-optics can allow SiPM detectors to achieve considerable sensitivity for auto-fluorescence (AF) detection and a wide dynamic range at low optical powers (~1 pW to ~4 μW). The SiPM has a manageable bias voltage (~25 V to ~30 V DC) for systems integration, and with optimised sensitivity it will enhance bio-photonic research in the area of AF to detect intraoperatively, for example, brain tumour margins.

Optimum Transistor Sizing of CMOS Differential Amplifier Using Tunicate Swarm Algorithm

In this paper, optimum transistor sizing of CMOS differential amplifier using tunicate swarm algorithm (TSA) is proposed. The designing of CMOS differential amplifier is activated to determine the best feasible design parameter values. This work proposes the optimized values of various parameters of a CMOS differential amplifier for better performance. TSA is chosen to optimize the circuit area. TSA has the ability to solve complex functions, like MOS transistor size and bias current. TSA is employed to optimize the parameters of circuit design, like area, power dissipation MOS transistor size, and also used to enhance other circuit specifications, while fulfilling circuit design criteria. The design objectives of CMOS differential amplifier are considered the fitness function of TSA algorithm. Then, weight parameters of CMOS differential amplifier design are optimized using TSA. By CMOS differential amplifier using TSA algorithm, we can optimize circuit design parameters with higher probability of yielding optimal results regarding circuit area lessening, lesser power dissipation and MOS transistor sizes. The proposed method is implemented in the MATLAB platform. The proposed CMOS-DA-TSA method attains 52.01%, 50.29% and 44.30% minimum slew rate, 64.61%, 75.30% and 55.92% minimum power dissipation compared to the existing methods like CMOS-ACD-SOA, CMOS-PAI-FOPSO and CMOS-PSO-MOL, respectively.

Capacitive Power Transfer System With Integrated Wide Bandwidth Communication

This letter proposed a novel method for compensation network design used in capacitive power transfer (CPT) systems to achieve simultaneous power and data delivery. The proposed method combines both ladder filter and resonant circuit designs, allowing the existing double-sided CL compensation topology to exhibit different characteristics under the power channel and the communication channel. The proposed system significantly reduces the design complexity and increases the bandwidth for data transfer while maintaining the circuit resonance at the wireless power transfer frequency. The system is compatible with both amplitude shift keying (ASK) and frequency shift keying (FSK) modulation methods, passing the high-frequency data carrier with an approximately unity gain. Detailed circuit parameter design and system performance analysis are presented, and a new metric power to signal is introduced to analyze the effect of the data communication on the power transfer. A prototype CPT system rated at 10 W is built, which demonstrates a 81.2% dc–ac efficiency and a data transfer rate of 10 kbps by using either ASK or FSK modulation techniques.

Dynamic fault reconfiguration of multiport active bridge converter for reliable bipolar DC system

A dynamic fault reconfiguration method is proposed for dual-transformer series-connected active bridge converter with interconnected dc bus and integrated energy storage devices applied in shipboard bipolar DC system. The proposed converter can achieve both short-circuit fault-clearing at the source port and the load ports, thus effectively improving its reliability under complicated conditions. If short-circuit occurs on one of the output terminals connected with bipolar dc bus, the proposed fault reconfiguration method will enable the faulty terminal to be isolated to maintain the constant power transmission between storage devices and healthy terminal under monopolar mode. While if short-circuit occurs on input terminal connected with storage devices, the proposed fault reconfiguration method will ensure the supported power feasibly exchanges between two terminals connected the bipolar dc bus under the source-port fault mode so as to maintain the constant output power of certain terminals. Based on all of the operation modes, power transmission model and zero voltage switch (ZVS) operation boundaries of all switches are analysed for circuit parameters design. Besides, the control strategies under bipolar mode, monopolar mode and source-port fault mode are analysed respectfully according to the dynamic characteristics. Finally, performance of the proposed fault reconfiguration method has been tested in Matlab/PLECS environment, in verification of the converter reliability and flexibility.

Study and Optimization of Transmission Characteristics of the Magnetically Coupled Resonant Wireless Transmission System

The topology and parameter characteristics of the wireless energy transmission system are the main factors affecting the system’s performance. A series–parallel–series–parallel (spsp) topology for magnetically coupled wireless energy transmission is proposed to address the problems of low efficiency and low output power when transmitting electrical energy in the conventional magnetically coupled topology. The spsp topology is compared with the conventional topology based on circuit theory, and the two structures are modeled, characterized, and verified in detail. Simulations and tests are performed for the transmission conditions, an improved Gray Wolf optimization algorithm is proposed, and a physical system is built. Experiments show that the spsp structure is superior near the designed circuit parameters when the network works in a resonant state. The improved Gray Wolf optimization algorithm is then used to find the optimal parameters, and the transmission efficiency reaches 90.53%, which effectively improves the transmission performance of the system. The established physical system utilizes the optimized parameters for coil structure and coil offset experiments, and the average transmission efficiency is 83.75%, with an error of 6.78% calculated by data measurement. The rationality of the proposed structure and the correctness of the simulation parameter design method are verified, and it is hoped that the proposed system and circuit structure in this paper will provide a reference for the design of a magnetically coupled wireless energy transmission system.