Dependence Of Leakage Current Research Articles

Correlation of microscopic and macroscopic electrical characteristics of high-k ZrSixO2−x thin films using tunneling atomic force microscopy

Tunneling atomic force microscopy (TUNA) is used to identify leakage current characteristics in SiO2 doped ZrO2 thin films within the nanometer scale. TUNA current maps and local TUNA I-V curves provide similar tendencies such as conventional macroscopic I-V curves concerning the dependence of leakage current on thickness and doping level. However, microscopic data additionally visualize the influence of minimal deviations in composition or morphology on the electrical film homogeneity not observable by macroscopic techniques. Therefore, optimization of the SiO2 dopant concentration in ZrO2 is possible. Additionally, information regarding the nonuniformity of charge trapping can be obtained out of local TUNA I-V curves implying the broad potential of TUNA.

Changes in the Electrical Conduction Mechanism with the Electrical Degradation of BaTiO<sub>3</sub>-Based Ceramics

The electrical degradation mechanisms of BaTiO3-based ceramics were investigated by measuring the dependence of leakage current on high electric fields. Before the degradation, the leakage current predominately obeyed Ohm’s law and Poole-Frenkel relation. As the degradation progressed, the Poole-Frenkel emission current increased. Moreover, the total current at the high electric fields also comprised Schottky emissions between cathodes and dielectric layers.

Leakage currents and dielectric breakdown of Si 1− x− yGe xC y thermal oxides

A detailed study of the leakage currents and dielectric wear-out of thermal oxides grown on Si 1− x Ge x , Si 1− y C y and Si 1− x− y Ge x C y epilayers to determine their quality and reliability for Si 1− x− y Ge x C y MOS technology is presented. After applying electrical stress to the samples, we have determined the conduction mechanisms and the dependence of leakage currents upon epilayer composition (Ge and C content). Conduction takes place mainly via Fowler–Nordheim tunneling injection. Ge and C introduce traps in the oxide which assist injection and thus lower the effective height of the tunneling barrier. We have also monitored the oxide reliability, focusing on time-dependent dielectric breakdown (TDDB). The nature of trapped charge in the oxide depends on the initial epilayer composition. We have found that the formation of defects induced by the presence of C leads to extrinsic oxide failure. While the presence of Ge in the oxide does not seem to introduce significant differences with respect to Si breakdown statistics, C in the oxide truly modifies the statistical profile.

Performance Evaluation of Insulating Links Used for Worker Protection in Cranes

Insulating links are used to protect crane workers from accidentally contacting a transmission line. This paper presents the results of laboratory tests that determined the leakage current produced by sudden energization of polluted and wet insulating links. Two different manufacturers' links were tested at heavy and light pollution. The results show that the short duration transient or the root mean square (rms) leakage current is the measure of the ability of the links to provide protection. The leakage current can endanger the life of a crane worker before flashover occurs. The dependence of leakage current on test voltage under heavy and light pollution conditions was determined. Obtained leakage current data was compared with IEC 479-1 standard, that provides health effect data. The link protects the crane worker, if the line voltage is less than the maximum voltage determined from the correlated test results. The results were used to assess the efficiency of worker protection.

Leakage Current Model of Polycrystalline Silicon Thin-Film Transistors for Device Characterization and Circuit Simulation

Carrier emission due to trap states is considered to be the most important factor influencing the leakage generation of polycrystalline silicon thin-film transistors (poly-Si TFTs). An analytical relation between the field enhanced emission rate ratio and electric field is proposed, which accounts for the Poole–Frenkel effect. The proposed relation needs no numerical integration, and both the relation and its first derivative are continuous, which are critical in circuit simulation. The maximum electric field near the drain is calculated taking density of trap states into account. The leakage current is studied. And its variations with gate and drain voltages are compared with available experimental data. The temperature dependence of leakage current is also shown. The results show an excellent agreement with experimental data.

The Reduction of the Dependence of Leakage Current on Gate Bias in Metal-Induced Laterally Crystallized p-Channel Polycrystalline-Silicon Thin-Film Transistors by Electrical Stressing

The high dependence of the leakage current on the gate bias that is normally observed in metal-induced laterally crystallized polycrystalline-silicon (poly-Si) thin-film transistors (TFTs) can be reduced effectively by electrical stressing. This brief examined the mechanism for the decrease in the high dependence of the leakage current on the gate bias in p-channel poly-Si TFTs by electrical stressing. This effect increased with increasing stress bias that is applied to the gate or drain. The effective decrease in leakage current dependence on the gate bias was attributed to electron trapping in the gate oxide during electrical stressing. It was found that this trapping occurred near the drain junction, and electron detrapping (or trap site regeneration) was also observed after annealing at temperatures above 350degC, resulting in an increase in leakage current. This brief proposes a device structure with a low dependence of the leakage current on the gate bias through light doping at the drain region.

Physical and Electrical Properties of Yttrium Oxide Gate Dielectrics on Si Substrate with NH3 Plasma Treatment

We report on the physical properties and electrical characteristics of gate oxides grown on silicon substrates with plasma treatment by reactive radio-frequency sputtering. The interfacial chemistry of the high-k gate dielectric has been investigated on nitrided and un-nitrided Si using X-ray photoelectron spectroscopy. We found that the gate film having -based interface layer is very effective in reducing equivalent oxide thickness and leakage current as well as improving film qualities. This -nitrided layer is suggested to minimize interfacial formation by limiting the amount of Si available to interact with the layer. These gate dielectrics exhibit excellent frequency dependence and weak temperature dependence of leakage current. They also show negligible charge trapping at high electric field stress.

Current transport mechanisms in (HfO 2) x(SiO 2) 1−x/SiO 2gate stacks

This paper investigates current transport mechanisms in MOCVD grown (HfO 2) x(SiO 2) 1−x/SiO 2 (0.3 ⩽ x ⩽ 1) gate stacks using the temperature dependence of leakage current. The dominant mechanisms under gate injection are found to be direct tunnelling and trap-assisted tunnelling for low-temperature region and trap-assisted tunnelling for high-temperature region (above ∼370 K) for all Hf/Si ratios studied. Under substrate injection and low fields (<1.5 MV/cm), Poole-Frenkel conduction dominates the response for Hf-silicates. This study confirms a deep trap level at 1.6 eV (O 0/O − defects) below the HfO 2 conduction band and shallow trap levels at 0.5-0.6 eV (oxygen vacancies related) below the Hf-silicate conduction band.

Charge Trapping at Deep States in Hf–Silicate Based High- κ Gate Dielectrics

We have observed charge trapping during constant voltage stress in Hf-based high-κ dielectrics at deep traps as well as at the shallow traps. and leakage current dependence on these deep traps further suggest that trapping at deep levels inhibits fast recovery. The earlier findings where charge trapping seemed to be very transient due to the presence of a large number of shallow traps and trapped charge could be eliminated by applying a reverse direction electric field may no longer be valid. The experimentally observed trap energy levels from low-temperature measurements establish a relationship between the origin of the deep traps and their dependence on O vacancy formation in Hf–silicate-based films. Substrate hot electron injection gives rise to significant electron trapping and slow post-stress recovery under negative bias conditions, which confirms that O-vacancy-induced deep defects determine the transient behavior in Hf–silicate-based high-κ gate dielectrics. It is further shown that negative-U transition to deep defects is responsible for trap-assisted tunneling under substrate injection. A fraction of the injected electrons remains trapped at the deep defects and gives rise to significant . This has the potential to be the ultimate limiting factor for the long-term reliability of Hf-based high-κ gate dielectrics.

Analytical yield prediction considering leakage/performance correlation

In addition to traditional constraints on frequency, leakage current has emerged as a stringent constraint in modern processor designs. Since leakage current exhibits a strong inverse correlation with circuit delay, effective parametric yield prediction must consider the dependence of leakage current on frequency. In this paper, a new chip-level statistical method to estimate the total leakage current in the presence of within-die and die-to-die variability is presented. A closed-form equation for total chip leakage that models the dependence of the leakage current distribution on different process parameters is developed. The proposed analytical expression is obtained directly from pertinent design information and includes both subthreshold and gate leakage currents. Using this model, an integrated approach to accurately estimate the yield loss when both frequency and power limits are imposed on a design is then presented. The proposed method demonstrates the importance of considering both these limiting factors while calculating the yield of a lot

Charge Trapping in High-k Gate Dielectrics: A Recent Understanding

Charge trapping in Hf-based high-k dielectrics, used in MOS transistor gate stacks, causes threshold voltage shift during constant voltage stress (CVS). It seemed to be very transient due to the presence of a large number of shallow traps and can be eliminated by applying a reverse direction electric field. Recent findings, however, suggest that deep traps significantly contribute to the reliability of various Hf- based high-k gate stacks. The origin of the deep traps and their dependence on O vacancy formation during dielectric deposition is discussed. Flatband shift and leakage current dependence on these deep traps is also outlined. We have experimentally observed trap levels from low temperature measurements assuring the presence of O vacancies in Hf- silicate based films. It is further shown that negative-U transition to deep defects is responsible for trap assisted tunneling under substrate injection. This has the potential to be the ultimate limiting factor for the long-term reliability of Hf-based high-k gate dielectrics.

Wafer level reliability and leakage current modeling of PZT capacitors

Over the last few years, thin films of PbZr x Ti 1− x O 3 (PZT) have been the focus of extensive researches for high-k capacitor applications. However, some electrical properties such as leakage current conduction and degradation mechanisms need to be better understood. From Constant Voltage Stress experiments, we identified two distinct failure mechanisms depending on the applied voltage levels. The existence of these two failure mechanisms makes it impossible to extrapolate lifetime results from high voltage to low voltage. Since the typical operating voltage for decoupling capacitors is around 3 V the reliability study has to be focused on the low voltage breakdown. A good opportunity to learn about the low voltage failure mechanisms is to investigate the characteristics of leakage current. The time evolution of leakage current is mainly controlled by the resistance degradation phenomenon. A quantitative analytical model has already been developed to account for this effect. We propose a more complete model that also includes dielectric relaxation and trapping effects. The resulting model is combined to a charge-influenced thermoionic emission model that fits fairly well the voltage and temperature dependence of leakage current. The static and dynamic parts of our model are found to be consistent, especially in terms of barrier lowering effect induced by the resistance degradation process. We believe that the low voltage breakdown is related to a trapping-induced creation of defects in the film.

Metal–Oxide–Semiconductor-Diode Characteristics with SiO2 Films Formed by Oxidation and Sputtering Using Electron-Cyclotron-Resonance-Plasma Stream

The characteristics of oxidation using an electron-cyclotron-resonance (ECR)-plasma stream and metal–oxide–semiconductor (MOS) diodes were studied. Single-layer SiO2 films and stacked SiO2/SiO2 films were formed by oxidation and sputtering. The ECR-plasma stream was extracted using a divergent magnetic field and had ion energies of 10–30 eV. The oxidation of single-crystal Si substrates by the ECR-plasma stream provided a large SiO2 growth rate at the initial growth stage (>6 nm/min) with a very small activation energy of 0.02 eV. SiO2 film was sputter-deposited in the metal mode of reactive ECR sputtering on the SiO2 film previously formed by oxidation. The MOS diodes with the single-layer and stacked SiO2 films had high-quality SiO2/Si interfaces with interface-trap densities of 2×1010–3×1010 cm-2 eV-1, which were obtained by postdeposition annealing at 400°C in hydrogen-gas atmosphere. The SiO2 films formed by oxidation and the stacked SiO2 films provided breakdown fields greater than 11 MV/cm. The dependence of leakage current on measuring temperature was not observed for the stacked SiO2 films, indicating that the dominant conduction was Fowler–Nordheim tunneling.

Electrical and optical properties of sol–gel derived Ca-modified PbTiO 3 thin films

Calcium modified lead titanate (Pb 0.76Ca 0.24TiO 3)(PCT76/24) sol–gel derived thin films have been prepared on ITO coated glass and quartz substrates by spin coating method. The films on quartz substrates have been used to study the optical properties and those on ITO coated glass substrates to study the electrical properties by preparing ferroelectric capacitors (MIM structures). The microstructure and surface morphologies of the films annealed at 650 °C have been studied by X-ray diffraction and atomic force microscope (AFM). Electrical measurements of metal-ferroelectric-metal type capacitor reveal the ferroelectric domain switching in the films. Also dependence of leakage current on applied voltage has been studied. The dependence of dielectric constant on temperature and hysteresis behavior have also been investigated and presented in this paper. The wavelength dispersion curve of thin films has been obtained from a transmission spectrum recorded by Cary spectrophotometer.

Dependence of leakage current on dislocations in GaN-based light-emitting diodes

The reverse bias current-voltage (I–V) characteristics of GaN-based light-emitting diodes (LEDs) were investigated. The leakage current exhibits exponential dependence on the bias voltage with different exponents for various voltage ranges. The leakage current is closely related to the density of dislocations. The number of dislocations in GaN was determined by atomic force microscopy combined with hot H3PO4 etching. Dislocations with a screw component in the GaN films were found to have a strong influence on the reverse leakage current of LEDs. The dislocation electrical activity in GaN grown on c-plane sapphire is different from that in GaN grown on a-plane sapphire.

Electrical and optical properties of sol–gel derived La modified PbTiO3 thin films

Lanthanum modified lead titanate (Pb1−xLaxTi1−x/4O3) PLTx (x=0.08 i.e. PLT8) sol–gel derived thin films have been prepared on indium tin oxide (ITO) coated glass and quartz substrates using lead acetate trihydrate, lanthanum acetate hydrate and titanium isopropoxide as precursors along with 2-methoxyethanol as solvent and acetic acid as catalyst by spin coating method. The microstructure and surface morphology of the films annealed at 650°C have been studied by X-ray diffraction technique and atomic force microscope (AFM). XRD has shown a single phase with tetragonal structure and AFM images have confirmed a smooth and crack-free surface with low surface roughness. The dependence of leakage current on applied voltage show ohmic behavior at low field region with a space charge conduction mechanism at high fields. The wavelength dispersion curve of thin films obtained from the transmission spectrum of thin films show that the films have high optical transparency in the visible region.

Current Mode Techniques for Sub-pico-Ampere Circuit Design

In this paper we explore the low current limit that standard CMOS technologies offer for current mode based VLSI designs. We show and validate a reliable circuit design technique for current mode signal processing down to fempto-amperes. We will take advantage of specific-current extractors and logarithmic current splitters to obtain on-chip sub-pA currents. Then we will use a special on-chip saw-tooth oscillator to monitor and measure currents down to a few fempto-amps. This way, sub-pA currents are characterized without driving them off-chip, nor requiring expensive instrumentation with complicated low leakage setups. A special current mirror is also introduced for reliably replicating such low currents. As an example, a simple log-domain first-order low-pass filter is implemented that uses a 100 fF capacitor and a 3.5 fA bias current to achieve a cut-off frequency of 0.5 Hz and using an area of 12 × 24.35 μm2 in a standard 0.35 μm CMOS process. A technique for characterizing noise at these currents is described and verified. Also, temperature dependence of leakage currents is measured as well.

Thickness dependence of leakage currents in high-permittivity thin films

The leakage current through high-permittivity perovskite thin films in the nanometer range is of great technological interest because of the possible applications of these insulating films in future submicroelectronic devices such as dielectrics in Gbit dynamic random access memories or gate oxides in metal–oxide–semiconductor field-effect transistors. The experimental result of decreasing leakage current with decreasing thickness of the dielectric for the same externally applied field can be described by using a model combining thermionic emission at the electrode/dielectric interface and a low-mobility, high-permittivity dielectric with low-permittivity layers at the interfaces, the so-called dead layers.

Electrical properties of chemical-solution-derived Bi3.54Nd0.46Ti3O12 ferroelectric thin films

Bi 3.54 Nd 0.46 Ti 3 O 12 (BNdT) thin films were prepared on Pt/TiO2/SiO2/Si substrates by chemical solution deposition. X-ray diffraction measurement indicated the polycrystalline nature of these films. Ferroelectric, dielectric, and leakage current characteristics of Pt/BNdT/Pt capacitors were studied. The remanent polarization and coercive field were 8.5 μC/cm2 and 47 kV/cm, respectively, at 5 V stimulative voltage. The relative permittivity and dissipation factor at 100 kHz were around 510 and below 0.02, respectively. Fatigue free behavior of BNdT thin films was confirmed by essentially constant polarizations during 100 kHz bipolar switching up to 1.4×1010 switches. The dependence of leakage current on dc voltage suggested Schottky and Poole-Frenkel emission behavior below 100 kV/cm, followed by dielectric breakdown.

Electrical Transport Phenomena in Aromatic Hydrocarbon Polymer

Electrical transport mechanisms in a low-permittivity aromatic hydrocarbon SiLK have been characterized using metal/SiLK/Si capacitors under both thermal and electric field stressing. Two distinct transport mechanisms dominate the leakage behavior of the polymer SiLK with Al and Cu electrodes, respectively. Al-electrode capacitors show Schottky-emission (SE)-type leakage behavior while Poole-Frenkel (PF) conduction resulted from trap generation in the SiLK polymer is responsible for the leakage of Cu-electrode capacitors. The trap barrier height has been extracted from the temperature dependence of leakage current. Copper penetration into the SiLK polymer leads to the generation of trap centers and seriously deteriorates dielectric characteristics. The transition of leakage conduction from SE to PF will exponentially lead to the insulating failure of the SiLK polymer. © 2003 The Electrochemical Society. All rights reserved.