Tapped Delay Research Articles

Measurement-Based Tapped Delay Line Channel Modeling for Fixed-Wing Unmanned Aerial Vehicle Air-to-Ground Communications at S-Band

Fixed-wing unmanned aerial vehicles (UAVs) are widely considered as a vital candidate of aerial base station in beyond Fifth Generation (B5G) systems. Accurate knowledge of air-to-ground (A2G) wireless propagation is important for A2G communication system development and testing where, however, there is still a lack of A2G wideband channel models for such a purpose. In this paper, we present a wideband fixed-wing UAV-based A2G channel measurement campaign at 2.7 GHz, and consider typical flight phases, based on which a wide-sense stationary uncorrelated scattering (WSSUS)-based tapped delay line (TDL) wideband channel model is proposed. Parameters of individual channel taps are analyzed in terms of gain, amplitude distribution, Rice factor and delay-Doppler spectrum. It is shown that UAV flight phases significantly influence the channel tap parameters. Particularly, the “Bell”-type spectrum is found to be the most suitable model for the delay-Doppler spectrum under various flight scenarios for A2G propagation. The proposed channel model can provide valuable assistance and guidance for UAV communication system evaluation and network planning.

Kintex ultrascale’s multi-segment digital tapped delay lines with controlled characteristics for precise time-to-digital conversion

This paper describes an efficient method of designing and implementing in FPGA devices complex tapped delay lines (CTDL) with pico and sub-picosecond resolution. Achieving a higher resolution and better linearity is possible by appropriate selection of single time coding tapped delay lines (TDL) involved in creation of CDTL. The proposed TDL selection algorithm significantly optimizes the size of the device’s logical resources required to implement CDTL with assumed parameters and provides a proper selection scenario. Ultimately, the presented solution allows to create CTDLs with different user-defined configurations based on a fixed set of available logical resources. Therefore, it is particularly recommended for prototyping in smaller FPGA devices. In this work, we investigate how the order of line selection influences the increase of the multiple time coding lines resolution. Furthermore, we determine the relation between the equivalent resolution value and the number of TDLs involved. Obtained results allow to estimate the upper limit of resolution that can be achieved using a given technology. In addition, the ranges of resolutions achievable with a fixed number of lines is also examined. The presented research results have been performed on a Kintex UltraScale FPGA chip, manufactured by Xilinx in the 20-nm CMOS process.

Design of a high-precision time-to-digital converter in an Elitestek Ti60 field-programmable-gate-array.

The time-to-digital converter (TDC) implemented in a field-programmable-gate-array has garnered widespread attention due to its flexibility and high-performance capabilities. However, issues such as non-uniformity, the bubble in the tapped delay line, and the presence of certain ultra-wide delay units can significantly compromise the precision and nonlinearity of the TDC. In this paper, we propose a high-precision TDC in an Elitestek Ti60 FPGA, effectively eliminating the adverse effects of non-uniformity, the bubble, and certain ultra-wide delay units. The TDC is constructed with a 318-stage delay chain and operates at a low system clock frequency of 150MHz. The least significant bit (LSB) of the TDC is 21.92ps. The differential nonlinearity (DNL) is between (-0.976, 1.615) LSB and the integral nonlinearity (INL) is between (-1.446, 2.678) LSB. The TDC achieves a root-mean-square error of 14.783ps when utilized for measuring various time intervals.

A sampled-data feedforward programmable time-mode comb filter

In this work, a sampled-data feedforward comb filter suitable for time-mode signal processing (TMSP) is proposed. In the proposed system the input voltage is sampled and converted to a pulse-width (PWM); the pulse width is proportional to the input amplitude. The pulse width is the quantity which is being processed by the time-mode feedforward comb filter. Both input and output are synchronous with the sampling clock. The benefits of the proposed filter topology are (a) the modular and (b) hierarchical design which can be dealt with as a pure digital comb filter implementation counterpart. The frequency response of the proposed filter is digitally programmable. As a result, this filter can be used as building block for the implementation of higher-order time-mode systems. The comb filter was designed and verified through post-layout simulations in TSMC 65 nm technology process. The sampling rate was 5 MHz, the voltage supply was 1.2 V, consuming 540 μW for the use of 9-unit delay tap network and occupying a total area of 254 μm × 160 μm.

Analysis of potential 5G transmission methods concerning Bit Error Rate

Fifth-generation wireless (5G) significantly impacts individuals' lives and work and is expected to increase. Although OFDM has been used in previous generation technologies (4G), it has limitations in meeting specific criteria such as data. Issues like better power consumption and Bit Error Rate make this technology unsuitable for meeting current needs such as the Internet of Things and user-based processing. This research aims to test the BER success of the transmission technique proposed as a candidate for the 5G communication system. Performance analysis is carried out considering the Tapped Delay Line (TDL-A) channel model, which is recommended for 5G research. Various scenarios, including situations where the transmitter/receiver is fixed or mobile, are considered to provide a more comprehensive evaluation. Evaluations were also carried out on various channel delay distribution profiles to expand the scope of analysis. The research results show that in channel conditions with high delay distribution and mobility, the communication system that uses the FBMC transmission technique shows better and more stable performance compared to OFMD, F-OFMD, WOLA, UFMC systems, it has an SNR of about 36 dB to achieve a BER of approx 10-3 under 10 ns delay spreading conditions, demonstrating the superiority of FBMC in difficult channel conditions These findings emphasize the importance of considering BER and system complexity in the design of future communications systems. Thus, this research provides a significant original contribution to the understanding and developing 5G communication systems.

High-Performance Wave Union Time-to-Digital Converter Implementation Based on Routing Path Delays of FPGA

Time-to-digital converters (TDCs) with superior performance are in high demand in application domains like light detection and ranging (LIDAR), nuclear physics, and time interval counters. One of the interesting architectures for field-programmable gate array (FPGA)-based TDCs is the tapped delay line (TDL) approach with carry chains as delay elements. However, the resolution of TDL-TDCs is limited, and linearity is weakened by the ultra-wide bins that correspond to the FPGA’s long routing wires crossing into another clock area. This paper presents wave union TDC using FPGA internal routing wires as delay elements to subdivide ultra-wide bins. The Zynq Evaluation and Development (ZED) board is used to implement and test the wave union types: A (WU-A) and B (WU-B) TDCs. According to experimental data, the WU-A TDC based on an 8 × 128 matrix of counters has a resolution of 5.7 ps, an integral nonlinearity (INL) of 1.1170 LSB (RMS), and a differential nonlinearity of 0.329 LSB (RMS). WU-A TDC improves DNL and INL by 19% and 57%, respectively, over ordinary TDC. The WU-B TDC uses an average of sixteen different time measurements, resulting in an effective resolution of up to 0.356 ps, a DNL of 0.60 LSB (RMS), and an INL of 1.04 LSB (RMS). These characteristics make the TDC suitable for time-of-flight applications such as LIDAR and for other general-purpose scientific instruments.

Design of multi-channel electronic prototype for 101Sn energy level lifetime measurement

In this study, a 32-channel front-end data acquisition unit (DAQU) with high temporal resolution and count rate was developed at the Heavy Ion Research Facility in Lanzhou (HIRFL), China, to measure the lifetime of 101Sn on the Spectrometer for Heavy Atoms and Nuclear Structure. The DAQU data analysis module uses a field programmable gate array (FPGA) to implement and time stamp extraction through an FPGA-based tapped delay line (TDL) time-to-digital converter. The energy measurements were implemented using a trapezoidal algorithm and a sliding baseline averaging method. The DAQU was tested and calibrated using a pulse generator and cosmic rays. The results show that the system had a dead time of less than 500 ns, a dynamic range of “0” to “500” mV, and an energy resolution of better than 4.8‰ (full width at the half-maximum, FWHM). In addition, the single-channel temporal resolution under multi-channel settings surpasses 111.2 ps (FWHM), satisfying the experiment's requirements for the electronics system.

On the Impact of CDL and TDL Augmentation for RF Fingerprinting Under Impaired Channels

Cyber-physical systems have recently been used in several areas (such as connected and autonomous vehicles) due to their high maneuverability. On the other hand, they are susceptible to cyber-attacks. Radio frequency (RF) fingerprinting emerges as a promising approach. This work aims to analyze the impact of decoupling tapped delay line and clustered delay line (TDL+CDL) augmentation-driven deep learning (DL) on transmitter-specific fingerprints to discriminate malicious users from legitimate ones. This work also considers 5G-only-CDL, WiFi-only-TDL augmentation approaches. RF fingerprinting models are sensitive to changing channels and environmental conditions. For this reason, they should be considered during the deployment of a DL model. Data acquisition can be another option. Nonetheless, gathering samples under various conditions for a train set formation may be quite hard. Consequently, data acquisition may not be feasible. This work uses a dataset that includes 5G, 4G, and WiFi samples, and it empowers a CDL+TDL based augmentation technique in order to boost the learning performance of the DL model. Numerical results show that CDL+TDL, 5G-only-CDL, and WiFi-only-TDL augmentation approaches achieve 87.59%, 81.63%, 79.21% accuracy on unobserved data while TDL/CDL augmentation technique and no augmentation approach result in 77.81% and 74.84% accuracy on unobserved data, respectively.

Estimation of Dispersive High-Doppler Channels in the RIS-Aided mmWave Internet of Vehicles

Reconfigurable intelligent surfaces (RISs) have emerged as a promising candidate for improving the spectral-and energy-efficiency of millimeter-wave (mmWave) Internet of vehicles (IoV) communications, but the conception of their accurate channel estimation poses. Hence the existing estimation methods mainly focus on time-invariant channels, while ignoring the Doppler effect induced by the high-velocity vehicles, which will lead to significant performance degradation. In this paper, we investigate the problem of channel estimation in RIS-aided mmWave IoV systems considering the deleterious Doppler effect. Firstly, we derive the expression of the time-varying cascaded two-hop multiple-path channels, where each delay tap is subject to multiple paths instead of having a simple one-to-one correspondence. In order to decouple the paths, the problem is formulated in the delay-domain by a series of transformations and the cascaded two-hop channel can be estimated at each delay tap. Then we propose a pair of estimation strategies by considering different hardware constraints depending on the number of receiver antennas at the base station (BS). When a large receiver array is employed at the BS, we can exploit its high angular selectivity for distinguishing each resolvable path at a certain delay tap because they arrive from different directions. However, this cannot be achieved for small arrays, given their more limited angular resolution. Thus, the RIS reflection patterns are delicately designed for distinguishing multiple resolvable paths. After separating the paths, Doppler estimation can be performed by calculating the phase difference of the adjacent symbols. Our simulation results demonstrate the superior performance of the proposed methods within a wide range of Doppler shifts.

Experimental results on nonlinear distortion compensation using photonic reservoir computing with a single set of weights for different wavelengths

Photonics-based computing approaches in combination with wavelength division multiplexing offer a potential solution to modern data and bandwidth needs. This paper experimentally takes an important step towards wavelength division multiplexing in an integrated waveguide-based photonic reservoir computing platform by using a single set of readout weights for up to at least 3 ITU-T channels to efficiently scale the data bandwidth when processing a nonlinear signal equalization task on a 28 Gbps modulated on-off keying signal. Using multiple-wavelength training, we obtain bit error rates well below that of the 1.5×10-2\\documentclass[12pt]{minimal} \\usepackage{amsmath} \\usepackage{wasysym} \\usepackage{amsfonts} \\usepackage{amssymb} \\usepackage{amsbsy} \\usepackage{mathrsfs} \\usepackage{upgreek} \\setlength{\\oddsidemargin}{-69pt} \\begin{document}$$1.5 \ imes \\,10^{-2}$$\\end{document} forward error correction limit at high fiber input powers of 18 dBm, which result in high nonlinear distortion. The results of the reservoir chip are compared to a tapped delay line filter and clearly show that the system performs nonlinear equalization. This was achieved using only limited post processing which in future work can be implemented in optical hardware as well.

Channel Estimation in MIMO OFDM Systems with Tapped Delay Line Model

The continuous increase in the user demands fornew-generation communication systems, is making the wireless channel more complex and challenging for estimation, developing a simulation model for the channel,and evaluating the performance of different MIMO systems. In this work, a simulation model for multipath fading channels in wireless communication is performed. The model includes a selection of typical Tapped-Delay-Line channel models that can be implemented to reproduce the effects of representative channel distortion and interference. Based on the simulation results, the proposed method exhibits accurate channel estimation performance for frequency-selective fading channels. The proposed work employed LS, MMSE, and ML methods for channel estimation, using 16 and 32 pilots and fixed pilot locations in each frame. Results are obtained for 4x4, 8x8, 16x16, 16x8, and 16x4 MIMO systems and tapped delay line systems.

Relative Jitter Measurement Methodology and Comparison of Clocking Resources Jitter in Artix 7 FPGA

Phase jitter is one of the crucial factors in modern digital electronics, determining the reliability of a design. This paper presents a novel approach to designing a jitter comparison system and methodology for FPGA chips using a Tapped Delay Line (TDL)—commonly used to implement a Time-to-Digital Converter (TDC). The design and its revision utilizing latches replacing some of the flip-flops are presented and discussed, with potential further improvements. A minimal temperature influence is verified and presented. The methodology of automated relative jitter measurements is discussed. Multiple different FPGA clock signal path configurations are measured, and the results are presented. The influence of clock routing is identified as critical when MMCM or PLL modules are omitted. It is demonstrated that with careful resource and routing allocation, the clock signal’s jitter performance does not have to be deteriorated by the absence of jitter filtering blocks. The proposed technique was implemented and verified and relative jitter performance was measured in the AMD/Xilinx Artix 7 35T FPGA platform.

Adaptive interference mitigation space‐time array reconfiguration by joint selection of antenna and delay tap

AbstractSpace‐time adaptive processing (STAP) array has found extensive use in the global navigation satellite system for interference suppression. Nevertheless, the conventional space‐time array necessitates multiple antennas and time delay taps, resulting in a heavy burden on both hardware and computation resources. Thus, lowering the cost and complexity of STAP becomes a considerable problem demanding prompt solutions. This work designs a space‐time array reconfiguration scheme based on the joint selection strategy of the antenna and delay tap to address this problem. The reconstructed array can induce a high signal to interference plus noise power ratio (SINR) when using fewer antennas and delay taps. The space‐time correlation coefficient (STCC) is first presented to manifest the influence of reconfiguration on output SINR. Then, we formulate the space‐time array reconfiguration mathematical model, aiming to minimise STCC. Two reconfiguration methods are provided to solve the optimal array configuration of antennas and delay taps that can reach the minimum STCC and maximum SINR. The optimal antenna‐delay tap pairs are finally selected to comprise the reconstructed array. Substantial simulation experiments verify that the presented scheme and strategy are effective and reliable in space‐time array reconfiguration.

Iterative channel estimation and data detection algorithm for MIMO-OTFS systems

Channel estimation in high-mobility environments is a challenging problem for advanced mobile communication systems (5G and beyond). In this manuscript, we first propose an iterative algorithm for channel estimation and data detection in the delay-Doppler domain for multiple-input multiple-output orthogonal time frequency space system. Then, in order to increase the spectral efficiency of the system, we use a superimposed pilot pattern. The proposed algorithm takes advantage from the sparse nature of the channel in the delay-Doppler domain and iterates between message passing-aided data detection and data-aided channel estimation. For channel estimation, we propose two algorithms. The first one consists in estimating all channel parameters, including the number of path gains, delay taps, Doppler taps, and channel gains by using a mean-field approximation and the variational Bayesian expectation maximization algorithm. The second one, based on the fact that delay and Doppler taps remain unchanged for a rather long period of time, uses an MMSE approach combined with Cholesky decomposition to only estimate channel gains in each transmitted frame. For data detection, we adapt the message-passing algorithm proposed in the literature. We also derive a lower bound on the signal-to-interference-plus-noise ratio of the proposed scheme, and maximize it by optimally allocating power between pilots and data symbols. Finally, we compare the complexity and the performance in terms of normalized mean square error, bit error rate, and spectral efficiency against existing methods. Simulation results, conducted in high-mobility scenarios show that the proposed algorithm achieves a good compromise between complexity and performance.

Characteristics of Channel Spreading Function and Performance of OTFS in High-Speed Railway

Orthogonal time frequency space (OTFS) modulation is an emerging technology to tackle time-frequency (TF) selective channel in high mobility scenarios. In OTFS, resource is multiplexed in the delay-Doppler (DD) domain. Based on the potential sparsity, separability, stability and compactness of the channel spreading function, OTFS is able to realize lower complexity of channel estimation, higher diversity and higher reliability compared with orthogonal frequency division multiplexing (OFDM). However, the channel spreading function for practical communication systems is rarely considered in the current OTFS-related literature. High-speed railway (HSR) is a typical high mobility scenario with trains travelling at over 200km/h, which has the potential to employ OTFS. To this end, the HSR channel spreading function is characterized and the performance of OTFS in HSR is evaluated based on the realistic channel measurement in this article. Firstly, the HSR channel in TF domain is measured based on the long term evolution railway (LTE-R) network. Then, the characteristics of the channel spreading function are analyzed. In particular, the impact of time domain channel fading on the spreading function is investigated. The characteristics of the measured spreading function are analyzed with the proposed metrics in railway viaduct and tunnel scenarios. Based on the above analysis, an algorithm for generating the channel spreading function is proposed. Feasibility of the proposed DD domain channel generation algorithm is verified through comparing metrics of which to those of the measured channel. By simulating the bit error rate (BER) and mean square channel estimation error performances of OTFS modulation in the practical band-limited systems, it is shown that the impacts of Doppler shift, delay, SFFT and time domain channel fading need be considered for the application of OTFS modulation, in contrast to the state-of-art DD domain channel generation scheme based on tap delay link (TDL) model. For example, compared to OTFS modulation under the ideal channel spreading function, OTFS modulation requires a signal gain greater than 5 dB under the practical channel spreading function affected by above factors, to achieve the same BER less than 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-2</sup> under the parameters and algorithms given in section V.

A Study on the Effect of Temperature Variations on FPGA-Based Multi-Channel Time-to-Digital Converters.

We describe a study on the effect of temperature variations on multi-channel time-to-digital converters (TDCs). The objective is to study the impact of ambient thermal variations on the performance of field-programmable gate array (FPGA)-based tapped delay line (TDL) TDC systems while simultaneously meeting the requirements of high-precision time measurement, low-cost implementation, small size, and low power consumption. For our study, we chose two devices, Artix-7 and ProASIC3L, manufactured by Xilinx and Microsemi, respectively. The radiation-tolerant ProASIC3L device offers better stability in terms of thermal sensitivity and power consumption compared to the Artix-7. To assess the performance of the TDCs under varying thermal conditions, a laboratory thermal chamber was utilized to maintain ambient temperatures ranging from -75 to 80 °C. This analysis ensured a comprehensive evaluation of the TDCs' performance across a wide operational range. By utilizing the Artix-7 and ProASIC3L devices, we achieved root mean square (RMS) resolution of 24.7 and 554.59 picoseconds, respectively. Total on-chip power of 0.968 W was achieved using Artix-7, while 1.997 mW of power consumption was achieved using the ProASIC3L device. We worked to determine the temperature sensitivity for both FPGA devices, which could help in the design and optimization of FPGA-based TDCs for many applications.

Tapped delay line for compact time-to-digital converter on UltraScale FPGA and its coding method

The time-to-digital converter (TDC) is the primary instrument for measuring time intervals. A common solution for FPGA-based TDCs is to construct a tapped delay line (TDL) for time interpolation to produce a sub-clock time resolution. The jitter and quantization, granularity and uniformity of the delay cells, and so on in TDL, determine the achievable TDC time resolution and linearity. To achieve higher linearity, a TDL and its encoding method for compact TDC on the UltraScale FPGA is proposed in this paper. A dual-sampling method with TDL is adopted, which improves precision and efficiency by directly encoding the state of the delay line, allowing further subdivision of the delay unit in combination with wave union. The bin width of the TDL obtained based on our method is measured here using the code density calibration method and draw the integral nonlinearity and differential nonlinearity. Based on the chain structure and encoding method proposed in this article, the TDL and encoding layout have been optimized to achieve a more compatible UltraScale FPGA and can also be further applied to multi-channel TDC.

Bi‐directional LSTM based channel estimation in 5G massive MIMO OFDM systems over TDL‐C model with Rayleigh fading distribution

SummaryIn this work, a deep learning (DL)‐based massive multiple‐input multiple‐output (mMIMO) orthogonal frequency division multiplexing (OFDM) system is investigated over the tapped delay line type C (TDL‐C) model with a Rayleigh fading distribution at frequencies ranging from 0.5 to 100 GHz. The proposed bi‐directional long short‐term memory (Bi‐LSTM) channel state information (CSI) estimator uses online learning during training and offline learning during the practical implementation phase. The design of the estimator takes into account situations in which prior knowledge of channel statistics is limited and targets excellent performance, even with limited pilot symbols (PS). Three separate loss functions (mean square logarithmic error [MSLE], Huber, and Kullback–Leibler Distance [KLD]) are assessed in three classification layers. The symbol error rate (SER) and outage probability performance of the proposed estimator are evaluated using a number of optimization techniques, such as stochastic gradient descent (SGD), momentum, and the adaptive gradient (AdaGrad) algorithm. The Bi‐LSTM‐based CSI estimator is trained considering a specific number of PS. It can be readily seen that by incorporating a cyclic prefix (CP), the system becomes more resilient to channel impairments, resulting in a lower SER. Simulations show that the SGD optimization approach and Huber loss function‐trained Bi‐LSTM‐based CSI estimator have the lowest SER and very high estimation accuracy. By using deep neural networks (DNNs), the Bi‐LSTM method for CSI estimation achieves a superior channel capacity (in bps/Hz) at 10 dB than long short‐term memory (LSTM) and other conventional CSI estimators, such as minimum mean square error (MMSE) and least squares (LS). The simulation results validate the analytical results in the study.

Low-Rank Matrix Sensing-Based Channel Estimation for mmWave and THz Hybrid MIMO Systems

This paper studies the channel estimation for wideband multiple-input multiple-output (MIMO) systems equipped with hybrid analog/digital transceivers operating in the millimeter-wave (mmWave) or terahertz (THz) bands. By exploiting the low-rank property of the concatenated channel matrix of the delay taps, we formulate the channel estimation problem as a low-rank matrix sensing (LRMS) problem and solve it using a low-complexity generalized conditional gradient-alternating minimization (GCG-ALTMIN) algorithm. This LRMS-based solution can accommodate different precoder/combiner and training structures. In addition, it does not require knowledge about the array responses at the transceivers, in contrast to most existing solutions allowing low training overhead. Furthermore, a preconditioned conjugate gradient (PCG) algorithm-based implementation and a low-rank matrix completion (LRMC) formulation are proposed to further reduce the computational complexity. In order to enhance the channel estimation performance for fat and tall channel matrices, we introduce a matrix reshaping approach that can preserve the channel rank by exploiting the shift-invariance property of uniform arrays. We also introduce a spectrum denoising (SD) approach for further improving the performance when the array responses are known and the number of paths is small. These approaches can effectively enhance the performance at a given training overhead. Simulation results suggest that the proposed solutions can achieve higher channel estimation accuracy and reduce the computational complexity as compared to several representative channel estimation schemes.

Measurement Based Tapped Delay Line Model for Train-to-Train Communications

Train-to-train (T2T) communication is proposed as an auxiliary safety-guaranteed measure for railway communications. Vehicular communication standards have been supporting railway use cases and T2T communications. It is essential to consider the propagation characteristics of railway environments with dedicated T2T channel models for simulation and testing of vehicular communication standards. In this paper, we propose six tapped delay line (TDL) channel models for T2T communications in Hilly Terrain and Railway Station. The measurement based proposed channel models consider different T2T distances and relative speeds of up to 50 km/h with trains moving in an approaching maneuver. Also, a study about the Doppler-delay behavior in the considered scenarios is presented using the scattering function. The proposed TDL channel models as well as the measured propagation characteristics are used in a 802.11bd simulation framework. Both simulation results, which are based on the TDL channel models or on the measurements, are compared to each other. The results show a very good match between the TDL channel models and the measurement data and indicate a good accuracy of the theoretical derivations and the simulation method.