Deep Reactive Etching Research Articles

Formation of Armored Silicon Nanowires Array via High-Repetition-Rate Femtosecond Laser Oxidation for Robust Surface-Enhanced Raman Scattering Detection.

Superhydrophobic nanostructures with dense hotspots and high concentration efficiency are of paramount importance for highly sensitive surface-enhanced Raman scattering (SERS) detection. However, their low mechanical strength makes them susceptible to damage from external interferences, leading to hotspot loss and superhydrophobicity failure. In this study, robust SERS detection is achieved using an armored superhydrophobic silicon nanowires array. A micro/nanocross-scale oxide mask is created through high-repetition-rate femtosecond laser oxidation to fabricate the armored nanowires array. The underlying mechanisms of the nanoparticle layer serving as a mask in deep reactive ion etching (DRIE) are analyzed to elucidate the formation of the silicon nanowires. The armored nanowires array SERS substrate exhibits a high contact angle of 158°, demonstrating exceptional analyte enrichment capability. Combined with the dense hotspots provided by the high aspect ratio nanostructures, the detection limit for Rhodamine 6G is 10-13 M, and the enhancement factor (EF) is 4.35 × 109. After undergoing various mechanical tests, the substrate maintains its superhydrophobicity along with a stable Raman signal enhancement, demonstrating its resistance to potential external interference in SERS detection. The sensitive detection of various analytes highlights the promising applications of the armored nanowires substrate in diverse SERS scenarios.

Quantitative piezoelectric measurements of partially released Pb(Zr, Ti)O3 structures

The effective large signal longitudinal piezoelectric coefficient (d33,f∗) of piezoelectric thin films on rigid substrates has been widely investigated. Unclamped piezoelectric thin films are predicted to have a higher d33,f∗ coefficient due to reduced constraints on piezoelectric strain, domain reorientation, and domain wall motion, but quantitative measurements of this coefficient have been limited. This study uses microfabrication techniques along with double-beam laser interferometry (DBLI) to accurately determine the longitudinal piezoelectric coefficient of Pb(Zr,Ti)O3 thin films in partially released piezomicroelectromechanical structures. A two-step backside release process was used: first, deep reactive ion etching to create backside vias and second, wet etching of the ZnO sacrificial layer to release the area beneath the Pb(Zr,Ti)O3 thin films. Post wet etching, optical profilometry showed concavely deformed diaphragms resulting from asymmetrical stress profiles through the diaphragm thickness. DBLI was then used to examine diaphragm deflection under an applied unipolar voltage ranging from 0 to 10 V. Devices with 50% and 75% of the area beneath the top electrode released exhibited large signal d33,f∗ values of 410 ± 6 and 420 ± 8 pm/V, respectively, more than three times higher than the d33,f∗ value of the clamped samples: 126 ± 13 pm/V. The reasons contributing to the large d33,f∗ include (i) the change in stress levels due to the release process, (ii) the elimination of mechanical constraints from substrate clamping, and (iii) enhanced domain reorientation. These findings confirm that substrate declamping significantly boosts the piezoelectric coefficient, bringing d33,f∗ closer to the bulk longitudinal piezoelectric coefficient (d33).

Programmable Graphene e-Nose Sensor Arrays for Fast, Sensitive, and Label-Free Identification of Chemical Vapors

Conventional nanoelectronic chemical vapor sensors are mostly based on charge transfer mechanisms. The presence of vapor molecules interacts with the sensing material, resulting in changes in charge density in the channel; the resulting conductance change can subsequently be detected as changes in the current signals. This charge transfer-based mechanism naturally requires strong molecule-sensor interaction in order to achieve high sensitivity. However, the strong binding of analytes to the sensor surface will inevitably lead to slow response time and slow sensor recovery, making it unsuitable for applications requiring rapid monitoring of chemical vapors.To address this challenge, our groups previously demonstrated a new type of fast, sensitive, and broad-spectrum electronic vapor sensor by exploiting the fringing field capacitance effect in the graphene field-effect transistor (GFET). The typically trivial fringing field capacitance change due to analyte absorption is greatly amplified by both the graphene transistor and a micro-flow channel covering the surface of graphene. Different from the charge-transfer process in traditional sensors, when molecules of analytes flow through the surface of the graphene transistor, its local dielectric environment is altered which results in changes in the fringing capacitance. This molecular fringing gate effect can be amplified intrinsically by the large transconductance of the GFET. Instead of using AC spectroscopy, this capacitance change can be measured conveniently as a peak in DC current.1 In this work, a programmable graphene e-nose sensor array with electrical gates design and enhanced packaging will be demonstrated to achieve true label-free sensing and identification of chemical vapors. Individual graphene sensors within the 1D sensor array (up to 1 x 9) can be optimized to offer sensitive (down to picogram) and fast (sub-second) detection toward a variety of analytes. Figure 1 demonstrates the prototype of the graphene sensor array. Each sensor chip consists of two parts: an array of nine GFETs with a dimension of 15mm by 15mm (Figure 1(A)), and a 40cm long micro-column chip with a column width of 20-60 μm fabricated on a silicon wafer with 200nm of SiO2 by using DRIE (Deep Reactive Ion Etching) (Figure 1(B)). These two components were then bonded by epoxy and the assembled sensor chip is shown in Figure 1(C). The graphene transistor array was fabricated by transferring CVD graphene onto a silicon substrate with 200nm of thermally grown SiO2. Individual gold metal back gates were fabricated underneath the graphene film with 200nm Al2O3 deposited by ALD (atomic layer deposition) as the gate dielectric. Devices with single or multi-layer (up to 4 layers) graphene films were fabricated and tested.The fabricated graphene sensors have near-perfect device yield and a resistance range within 2 ~ 10 kΩ. Figure 1(D) and 1(E) shows the DC current signal changes of a typical sensor within the array when vapor-phase analytes of different masses were injected through a benchtop gas chromatography (GC) setup. 9 ng and 6 ng of Hexanal injection generated current peaks with peak heights of 0.8 μA and 0.5 μA, and peak width (full width at half maximum) of 1.8 seconds and 2 seconds, respectively. The high signal-to-noise ratio (~ 80 to 1) and the short response time demonstrate the high sensitivity and fast detection capability of the graphene sensor. Figure 1(E) shows a detailed sensitivity test from the injections of hexanal vapor of five different masses. The graphene sensor exhibits good linearity with a sensitivity of 79nA per nanogram of Hexanal and a 3σ detection limit of 380 picograms.We further tested the electrical gate tunability of the graphene sensor’s response. In order to eliminate the effect of graphene conductance modulation by the gate voltage, we normalize the peak height with the baseline current. As shown in Figure 1(F), when the gate voltage is programmed from -10V to +10V, the hexanal peak height is strengthened by approximately 30 percent. Similar gate voltage tuning is also observed on other analytes, such as acetone and hexanol.Our results clearly show the gate voltage tunability of the graphene sensor, suggesting a novel graphene sensor array using electrical programming rather than chemical functionalization to achieve selectivity. Combined with advanced data analysis tools, the graphene e-nose array has the potential to offer label-free chemical vapor sensing without the need to individually functionalize each sensor as in traditional e-nose devices. Furthermore, we will discuss the integration of the graphene e-nose sensor array with a micro-gas chromatography chip and a smartphone-sized custom PCB board for programming, readout, and Bluetooth data communication. W. Zang et al., Nano Lett., 21, 10301–10308 (2021). Figure 1

High-efficiency thermo-optic control of a longitudinal radiation angle in a silicon-based optical phased array by leveraging the backside air trench structure.

We proposed a 2D 1 × 64 silicon optical phased array with a backside silicon-etched structure to achieve high tuning efficiency and a wide longitudinal steering range. At the radiator array, the n-i-n heater was implemented to steer the light in a longitudinal direction through the thermo-optic effect. The deep reactive ion etching process was utilized to generate the 600 µm depth air trench with a 1.8 cm2 area from the backside of the radiator array. We achieved almost 100% increment in terms of tuning efficiency, which is 1.56°/W for the proposed structure and 0.78°/W for the conventional structure.

Cryogenic DRIE processes for high-precision silicon etching in MEMS applications

Cryogenic deep reactive ion etching (Cryo DRIE) of silicon has become an enticing but challenging process utilized in front-end fabrication for the semiconductor industry. This method, compared to the Bosch process, yields vertical etch profiles with smoother sidewalls not subjected to scalloping, which are desired for many microelectromechanical systems (MEMS) applications. Smoother sidewalls enhance electrical contact by ensuring more conformal and uniform sidewall coverage, thereby increasing the effective contact area without altering contact dimensions. The versatility of the Cryo DRIE process allows for customization of the etch profiles by adjusting key process parameters such as table temperature, O2 percentage of the total gas flow rate (O2 + SF6), RF bias power and process pressure. In this work, we undertake a comprehensive study of the effects of Cryo DRIE process parameters on the trench profiles in the structures used to define cantilevers in MEMS devices. Experiments were performed with an Oxford PlasmaPro 100 Estrelas ICP-RIE system using positive photoresist SPR-955 as a mask material. Our findings demonstrate significant influences on the sidewall angle, etch rate and trench shape due to these parameter modifications. Varying the table temperature between −80 °C and −120 °C under a constant process pressure of 10 mTorr changes the etch rate from 3 to 4 μm min−1, while sidewall angle changes by ∼2°, from positive (<90° relative to the Si surface) to negative (>90° relative to the Si surface) tapering. Altering the O2 flow rate with constant SF6 flow results in a notable 10° shift in sidewall tapering. Furthermore, SPR-955 photoresist masks provide selectivity of 46:1 with respect to Si and facilitates the fabrication of MEMS devices with precise dimension control ranging from 1 to 100 μm for etching depths up to 42 μm using Cryo DRIE. Understanding the influence of each parameter is crucial for optimizing MEMS device fabrication.

4H silicon carbide bulk acoustic wave gyroscope with ultra-high Q-factor for on-chip inertial navigation

Inertial navigation on a chip has long been constrained by the noise and stability issues of micromechanical Coriolis gyroscopes, as silicon, the dominant material for microelectromechanical system devices, has reached the physical limits of its material properties. To address these challenges, this study explores silicon carbide, specifically its monocrystalline 4H polytype, as a substrate to improve gyroscope performance due to its low phonon Akhiezer dissipation and its isotropic hexagonal crystal lattice. We report on low-noise electrostatic acoustic resonant gyroscopes with mechanical quality factors exceeding several millions, fabricated on bonded 4H silicon carbide-on-insulator wafers. These gyroscopes operate using megahertz frequency bulk acoustic wave modes for large open-loop bandwidth and are tuned electrostatically using capacitive transducers created by wafer-level deep reactive ion etching. Experimental results show these gyroscopes achieve superior performance under various conditions and demonstrate higher quality factors at increased temperatures, enabling enhanced performance in an ovenized or high-temperature stabilized configuration.

Seed-guided high-repetition-rate femtosecond laser oxidation for functional three-dimensional silicon structure fabrication

Laser oxidation provides a flexible maskless functional three-dimensional silicon structure fabrication strategy. Here, oxide layers are fabricated on silicon substrates by high-repetition-rate femtosecond laser irradiation. Formation mechanisms of the femtosecond laser oxidation are analyzed to tune the oxide layer morphology. When the laser fluence is high, the oxidation process is accompanied by laser ablation, so the oxide layer is always on top of laser ablated groove. To obtain the flat oxide layer, defect is firstly generated on silicon substrate by the laser irradiation at a high laser fluence of 126 mJ/cm2, function as a high optical absorption. It is called seed as it can assist to achieve lower fluence laser oxidation at 38 mJ/cm2 and result in a flat oxide layer. Full width at half-maximum of the oxide layer is also reduced. The laser fabricated oxide layers are used as etching masks. Three-dimensional silicon gratings are fabricated by deep reactive ion etching, which demonstrate desirable beam diffraction properties.

A High-Aspect-Ratio Deterministic Lateral Displacement Array for High-Throughput Fractionation.

Future industrial applications of microparticle fractionation with deterministic lateral displacement (DLD) devices are hindered by exceedingly low throughput rates. To enable the necessary high-volume flows, high flow velocities as well as high aspect ratios in DLD devices have to be investigated. However, no experimental studies have yet been conducted on the fractionation of bi-disperse suspensions containing particles below 10 µm with DLD at a Reynolds number (Re) above 60. Furthermore, devices with an aspect ratio of more than 4:1, which require advanced microfabrication, are not known in the DLD literature. Therefore, we developed a suitable process with deep reactive ion etching of silicon and anodic bonding of a glass lid to create pressure-resistant arrays. With a depth of 120 µm and a gap of 23 µm between posts, a high aspect ratio of 6:1 was realized, and devices were investigated using simulations and fractionation experiments. With the two-segmented array of 3° and 7° row shifts, critical diameters of 8 µm and 12 µm were calculated for low Re conditions, but it was already known that vortices behind the posts can shift these values to lower critical diameters. Suspensions with polystyrene particles in different combinations were injected with an overall flow rate of up to 15 mL/min, corresponding to Re values of up to 90. Suspensions containing particle combinations of 2 µm with 10 µm as well as 5 µm with 10 µm were successfully fractionated, even at the highest flow rate. Under these conditions, a slight widening of the displacement position was observed, but there was no further reduction in the critical size as it was for Re = 60. With an unprecedented fractionation throughput of nearly 1 L per hour, entirely new applications are being developed for chemical, pharmaceutical, and recycling technologies.

Fabricating process of thin‐strain sensor by utilizing wafer‐level‐packaging techniques

AbstractThis research has developed a fabricating process of thin‐strain sensor by utilizing wafer‐level‐packaging (WLP) techniques. The thickness of sensor makes thinner, its performance is able to highly increase. However, the thinner sensor was fragile, and so it was difficult to handle in post processes. Thus, a thin sensor with lid by utilizing WLP techniques, which is tough to break even when handled, is proposed in this research. More than 250‐µm‐deep grooves were fabricated around the lid by deep reactive ion etching. After the lid substrate was bonded on the sensor substrate with a resin, the sensor and lid substrates were respectively polished to 50 and 200 µm thickness. The lids were released along the grooves, and the 50‐µm‐thick strain sensors were able to be fabricated by utilizing WLP techniques. This sensor was used as a diaphragm to measure pressure. The sensors were assembled on a stainless steel housing without breakage. The performance of the developed sensor was almost showed with a conventional pressure sensor.

Fabrication of low-resonant-frequency inertial MEMS using through-silicon DRIE applied to silicon-on-glass

This paper reports on a fabrication process suitable for ultra-low resonant frequency inertial MEMS sensors. The low resonant frequency is achieved by electrically tunable springs and a heavy mass formed by through-silicon deep reactive-ion etching (DRIE) applied to a silicon-on-glass. A thermal issue of through-silicon DRIE (TSD) stemming from the low-resonant-frequency structure is circumvented by two methods: introducing cooling time between the DRIE steps, and adopting a metal hard mask. A blade dicing method suited for this process is also presented. To monitor the verticality of TSD, a non-destructive taper detection method that utilizes a capacitance–voltage (CV) curve is proposed and verified.

Voltage- and Metal-assisted Chemical Etching of Micro and Nano Structures in Silicon: A Comprehensive Review.

Sculpting silicon at the micro and nano scales has been game-changing to mold bulk silicon properties and expand, in turn, applications of silicon beyond electronics, namely, in photonics, sensing, medicine, and mechanics, to cite a few. Voltage- and metal-assisted chemical etching (ECE and MaCE, respectively) of silicon in acidic electrolytes have emerged over other micro and nanostructuring technologies thanks to their unique etching features. ECE and MaCE have enabled the fabrication of novel structures and devices not achievable otherwise, complementing those feasible with the deep reactive ion etching (DRIE) technology, the gold standard in silicon machining. Here, a comprehensive review of ECE and MaCE for silicon micro and nanomachining is provided. The chemistry and physics ruling the dissolution of silicon are dissected and similarities and differences between ECE and MaCE are discussed showing thattheyare the two sides of the same coin. The processes governing the anisotropic etching of designed silicon micro and nanostructures are analyzed, and the modulation of etching profile over depthis discussed. The preparation of micro- and nanostructures with tailored optical, mechanical, and thermo(electrical) properties is then addressed, and their applications in photonics, (bio)sensing, (nano)medicine, and micromechanical systems are surveyed. Eventually, ECE and MaCE are benchmarked against DRIE, and future perspectives are highlighted.

Deep-reactive ion etching of silicon nanowire arrays at cryogenic temperatures

The pursuit of sculpting materials at increasingly smaller and deeper scales remains a persistent subject in the field of micro- and nanofabrication. Anisotropic deep-reactive ion etching of silicon at cryogenic temperatures (cryo-DRIE) was investigated for fabricating arrays of vertically aligned Si nanowires (NWs) of a large range of dimensions from micrometers down to 30 nm in diameter, combined with commonly used wafer-scale lithography techniques based on optical, electron-beam, nanoimprint, and nanosphere/colloidal masking. Large selectivity of ∼100 to 120 and almost 700 was found with resists and chromium hard masks, respectively. This remarkable selectivity enables the successful transfer of patterned geometries while preserving spatial resolution to a significant extent. Depending on the requirements by applications, various shapes, profiles, and aspect ratios were achieved by varying process parameters synchronously or asynchronously. High aspect ratios of up to 100 comparable to the best result by metal-assisted wet-chemical etching and sub-μm trenches by DRIE were obtained with NW diameter of 200 nm, at an etch rate of ∼4 μm/min without being collapsed. At the same time, low surface roughness values were maintained on the NW top, sidewall, and bottom surface of ∼0.3, ∼13, and ∼2 nm, respectively, as well as high pattern fidelity and integrity, which were measured using angle-resolved Fourier microscopy, combined atomic force, and scanning electron microscopy on selected NWs. This work establishes the foundation in the controllable development of Si nanoarchitectures, especially at sub-100 nm structures, for energy-harvesting and storage, damage-free optoelectronics, quantum, photovoltaics, and biomedical devices.

Effect of Mold Materials Used During Hot Embossing on Feature Fidelity for Microfabrication in Cyclic Olefin Polymer (COP) Substrate

During the transition from research to market, the fabrication of microfluidic devices in thermoplastic substrates is inevitable. For short production runs of several hundred products, hot embossing is the typical method before moving on to a typically more expensive injection molding process for higher production volumes. In this work, we investigated the effect of mold material used during hot embossing on feature fidelity for microfabrication in cyclic olefin polymer (COP) substrate. Specifically, we designed a simple flow-focusing microfluidic device and fabricated three different molds using silicon wafer by deep reactive ion etching (DRIE), aluminum filled high temperature epoxy by soft lithography and aluminum by CNC milling. We performed hot embossing experiments with 2mm thick COP substrates and these three different molds using automatic bench top Carver hot press. Finally, we characterized the hot embossed substrates by optical and scanning electron microscopy. Fabrication results demonstrate that the mold material plays a big role in feature fidelity. Among the mold materials used, silicon substrate performed the worst based on defects after demolding. Epoxy and aluminum molds were similar in terms of microfabricated feature defects in the substrate which could be mostly attributed to their coefficient of thermal expansion (CTE). A mold material with a CTE closer to the thermoplastic will result in much better feature fidelity.

Wafer-scale silicon microfabrication technology toward realization of low-cost sub-THz waveguide devices

This paper presents a wafer-scale silicon microfabrication technology for the sub-terahertz (sub-THz) waveguide device mass production. Based on the effective scheme, a WR-5 (140–220 GHz) straight rectangular waveguide and a WR-2.8 (260–400 GHz) rectangular waveguide bandpass filter are implemented as demonstrated examples. The silicon deep reactive ion etching (DRIE) process is employed to etch through the total thickness of the silicon wafer and form the main waveguide channels. Then, a low-temperature thermal compression process is used to bond the trough-etched wafer with the top and bottom metallised silicon wafers to form the closed waveguide structures without any precise alignment process. The fabricated waveguide has the benefit of low transmission loss (0.03–0.05 dB mm−1) at the whole G band. Besides, to measure the fabricated WR-2.8 waveguide filter and solve the measuring equipment standard waveguide difference, silicon micromachined waveguide transitions are explored and fabricated to match two different frequency-band modules for measuring the waveguide filters in the desired full frequency band, which also has a potential application for the different size waveguide conversion. The measured results agree well with the simulated ones. The measured 3 dB bandwidth is 9.3%, with a central frequency of 343 GHz; the average insertion loss (IL) is about 1.6 dB in the pass band, including two extra straight waveguides of 8 mm length on input/output ends and two external waveguide-to-waveguide transitions. The proposed method provides a feasible and cost-effective solution for the mass production of high-performance waveguide devices and integrated systems in sub-THz frequency bands and beyond.

Scalable and efficient grating couplers on low-index photonic platforms enabled by cryogenic deep silicon etching

Efficient fiber-to-chip couplers for multi-port access to photonic integrated circuits are paramount for a broad class of applications, ranging, e.g., from telecommunication to photonic computing and quantum technologies. Grating-based approaches are often desirable for providing out-of-plane access to the photonic circuits. However, on photonic platforms characterized by a refractive index ≃ 2 at telecom wavelength, such as silicon nitride or thin-film lithium niobate, the limited scattering strength has thus far hindered the achievement of coupling efficiencies comparable to the ones attainable in silicon photonics. Here we present a flexible strategy for the realization of highly efficient grating couplers on such low-index photonic platforms. To simultaneously reach a high scattering efficiency and a near-unitary modal overlap with optical fibers, we make use of self-imaging gratings designed with a negative diffraction angle. To ensure high directionality of the diffracted light, we take advantage of a metal back-reflector patterned underneath the grating structure by cryogenic deep reactive ion etching of the silicon handle. Using silicon nitride as a testbed material, we experimentally demonstrate coupling efficiency up to − 0.55 dB in the telecom C-band with high chip-scale device yield.

Deep reinforcement learning-assisted extended state observer for run-to-run control in the semiconductor manufacturing process

In the semiconductor manufacturing process, extended state observer (ESO)-based run-to-run (RtR) control is an intriguing solution. Although an ESO-RtR control strategy can effectively compensate for the lumped disturbance, appropriate gains are required. In this article, a cutting-edge deep reinforcement learning (DRL) technique is integrated into ESO-RtR, and a composite control framework of DRL-ESO-RtR is developed. In particular, the well-trained DRL agent serves as an assisted controller, which produces appropriate gains of ESO. The optimized ESO then presents a preferable control recipe for the manufacturing process. Under the RtR framework, the gain adjustment problem of ESO is formulated as a Markov decision process. An efficient state space and reward function are wisely designed using the system’s observable information. Correspondingly, the gain of the ESO is adaptively adjusted to cope with changing environmental disturbances. Finally, a twin-delayed deep deterministic policy gradient algorithm is employed to implement the suggested scheme. The feasibility and superiority of the developed method are validated in a deep reactive ion etching process. Comparative results demonstrate that the presented scheme outperforms the ordinary ESO-RtR controller in terms of disturbance rejection.

Monolithic silicon microlens arrays for far-infrared astrophysics.

Future far-infrared astrophysics observatories will require focal plane arrays containing thousands of ultrasensitive, superconducting detectors, each of which require efficient optical coupling to the telescope fore-optics. At longer wavelengths, many approaches have been developed, including feedhorn arrays and macroscopic arrays of lenslets. However, with wavelengths as short as 25µm, optical coupling in the far infrared remains challenging. In this paper, we present an approach to fabricate far-infrared monolithic silicon microlens arrays using grayscale lithography and deep reactive ion etching. The fabricated microlens arrays presented here are designed for two different wavebands: 25-40µm and 135-240µm. The microlens arrays have sags as deep as 150µm, are hexagonally packed with a pixel pitch of 900µm, and have an overall size as large as 80 by 15mm. We compare an as-fabricated lens profile to the design profile and calculate that the fabricated lenses would achieve 84% encircled power for the designed detector, which is only 3% less than the designed performance. We also present methods developed for antireflection coating microlens arrays and for a silicon-to-silicon die bonding process to hybridize microlens arrays with detector arrays.

Nanoengineered micro-supercapacitors based on graphene nanowalls for self-powered wireless sensing system

This work presents a comprehensive investigation of micro-supercapacitors (MSCs) based on graphene nanowalls (GNWs), covering core material synthesis, device fabrication, evaluation, and application demonstrations. Three-dimensional hierarchical GNWs structures are grown successfully by a microwave plasma-enhanced chemical vapor deposition (MPECVD), with detailed descriptions of the synthesis process and underlying mechanisms. The structural and morphological properties of the GNWs are thoroughly analyzed. Several types of MSCs are reported, ranging from thin-film to three-dimensional (3D) MSCs, as well as symmetric to asymmetric MSCs. Thin-film MSC is developed by a novel micromachining process for one-step fabricating GNWs-Ni core-shell composite microstructures. A solid-state MSC utilizing 3D hierarchical electrode is created by a fully micro electro mechanical system (MEMS)-compatible process. This involves depositing GNWs-RuOx hybrid nanostructures onto microstructure scaffolds formed using deep reactive ion etching (deep RIE). Additionally, another 3D MSC utilizes GNWs-PANI electrode material deposited on silicon nanowires generated through metal-assisted chemical etching (MACE) method. To enhance MSCs performance, asymmetric MSC is proposed and realized, incorporating GNWs-MnO2 acting as the positive electrode and carbon black serving as the negative electrode. Furthermore, the successfully combination of the fabricated MSCs with an energy harvesting system is demonstrated. The self-powered sensing system driven by solar energy, with the harvested energy stored in MSCs, is effectively showcased, opening up new possibilities for futuristic MSCs to accumulate and store harvested energy as usable electricity. This demonstration has significant potential in fields such as self-powered wireless IoT sensing systems, offering valuable contributions towards sustainable and autonomous energy solutions.

A C-shaped hinge for displacement magnification in MEMS rotational structures

The design, analysis, fabrication, and characterization of two distinct MEMS rotational structures are provided; these structures include a classical symmetrical lancet structure and a novel symmetrical C-shaped structure provided with a tilted arm, and both are actuated by thermal actuators. Our proposed C-shaped structure implemented a curved beam mechanism to enhance the movement delivered by the thermal actuators. The geometrical parameters of our proposed device were optimized using the design of experiment (DOE) method. Furthermore, the analytical modeling based on Castigliano’s second theorem and the simulations based on the finite element method (FEM) were used to predict the behavior of the symmetrical C-shaped structure; the results were in good agreement with each other. The MEMS-based rotational structures were fabricated on silicon-on-insulator (SOI) wafers using bulk micromachining technology and deep reactive ion etching (DRIE) processes. The fabricated devices underwent experimental characterization; our results showed that our proposed MEMS rotational structure exhibited a 28% improvement in the delivered displacement compared to the symmetrical lancet structure. Furthermore, the experimental results showed good agreement with those obtained from numerical analysis. Our proposed structures have potential applications in a variety of MEMS devices, including accelerometers, gyroscopes, and resonators, due to their ability to maximize displacement and thus enhance sensitivity.

A novel heat transfer characterization method for a thermal management scheme of 3D-IC chips

A novel surface-modified silicon-based thermal management technology has been proposed for 3D IC architecture in this study. 2 × 2 cm2 double sides polished silicon chips’ surface with micro-fin (MF) and micro-pin fin (MPF) structures have been achieved by applying silicon microfabrication technology of deep reactive ion etching, which is applicable to the interlayer of 3D IC packaging technology. By integrating a mini wind tunnel with Raman spectrometer, the transient thermal property measurement system is originally designed to evaluate the cooling capability of the surface-modified silicon interlayer. Finite Element Analysis was involved to confirm this view by taking fluid dynamics and heat transfer into account. The sample with 100 × 100 µm2 MPF structure expresses the appropriate exponential decay time constant τ (with unit of 1), which is 4.71 and 8.53 under cooling and heating measurement conditions, respectively. This also proved that the combination of Raman thermometry with forced gas flow could be a relevant measurement tool for transient thermal property.