Deep Reactive Ion Etching Process Research Articles

Wafer-scale silicon microfabrication technology toward realization of low-cost sub-THz waveguide devices

This paper presents a wafer-scale silicon microfabrication technology for the sub-terahertz (sub-THz) waveguide device mass production. Based on the effective scheme, a WR-5 (140–220 GHz) straight rectangular waveguide and a WR-2.8 (260–400 GHz) rectangular waveguide bandpass filter are implemented as demonstrated examples. The silicon deep reactive ion etching (DRIE) process is employed to etch through the total thickness of the silicon wafer and form the main waveguide channels. Then, a low-temperature thermal compression process is used to bond the trough-etched wafer with the top and bottom metallised silicon wafers to form the closed waveguide structures without any precise alignment process. The fabricated waveguide has the benefit of low transmission loss (0.03–0.05 dB mm−1) at the whole G band. Besides, to measure the fabricated WR-2.8 waveguide filter and solve the measuring equipment standard waveguide difference, silicon micromachined waveguide transitions are explored and fabricated to match two different frequency-band modules for measuring the waveguide filters in the desired full frequency band, which also has a potential application for the different size waveguide conversion. The measured results agree well with the simulated ones. The measured 3 dB bandwidth is 9.3%, with a central frequency of 343 GHz; the average insertion loss (IL) is about 1.6 dB in the pass band, including two extra straight waveguides of 8 mm length on input/output ends and two external waveguide-to-waveguide transitions. The proposed method provides a feasible and cost-effective solution for the mass production of high-performance waveguide devices and integrated systems in sub-THz frequency bands and beyond.

Deep reinforcement learning-assisted extended state observer for run-to-run control in the semiconductor manufacturing process

In the semiconductor manufacturing process, extended state observer (ESO)-based run-to-run (RtR) control is an intriguing solution. Although an ESO-RtR control strategy can effectively compensate for the lumped disturbance, appropriate gains are required. In this article, a cutting-edge deep reinforcement learning (DRL) technique is integrated into ESO-RtR, and a composite control framework of DRL-ESO-RtR is developed. In particular, the well-trained DRL agent serves as an assisted controller, which produces appropriate gains of ESO. The optimized ESO then presents a preferable control recipe for the manufacturing process. Under the RtR framework, the gain adjustment problem of ESO is formulated as a Markov decision process. An efficient state space and reward function are wisely designed using the system’s observable information. Correspondingly, the gain of the ESO is adaptively adjusted to cope with changing environmental disturbances. Finally, a twin-delayed deep deterministic policy gradient algorithm is employed to implement the suggested scheme. The feasibility and superiority of the developed method are validated in a deep reactive ion etching process. Comparative results demonstrate that the presented scheme outperforms the ordinary ESO-RtR controller in terms of disturbance rejection.

A C-shaped hinge for displacement magnification in MEMS rotational structures

The design, analysis, fabrication, and characterization of two distinct MEMS rotational structures are provided; these structures include a classical symmetrical lancet structure and a novel symmetrical C-shaped structure provided with a tilted arm, and both are actuated by thermal actuators. Our proposed C-shaped structure implemented a curved beam mechanism to enhance the movement delivered by the thermal actuators. The geometrical parameters of our proposed device were optimized using the design of experiment (DOE) method. Furthermore, the analytical modeling based on Castigliano’s second theorem and the simulations based on the finite element method (FEM) were used to predict the behavior of the symmetrical C-shaped structure; the results were in good agreement with each other. The MEMS-based rotational structures were fabricated on silicon-on-insulator (SOI) wafers using bulk micromachining technology and deep reactive ion etching (DRIE) processes. The fabricated devices underwent experimental characterization; our results showed that our proposed MEMS rotational structure exhibited a 28% improvement in the delivered displacement compared to the symmetrical lancet structure. Furthermore, the experimental results showed good agreement with those obtained from numerical analysis. Our proposed structures have potential applications in a variety of MEMS devices, including accelerometers, gyroscopes, and resonators, due to their ability to maximize displacement and thus enhance sensitivity.

Design and fabrication of a polydimethylsiloxane device for evaluating the effect of pillar geometry and configuration in the flow separation using deterministic lateral displacement.

The advancement of microfluidics and the manufacturing of microdevices has led to a strategic change in the biomedical industry. The flow through narrow channels and the pillars are placed strategically, leading to the phenomenon of particle separation through deterministic lateral displacement (DLD). In such a phenomenon, the shape, size, location and orientation of the obstacles play an important role. For the first time, particle separation is achieved with DLD modules having high row shift angles of 25°, 30° and 35°, reducing the number of pillars. The significance of circular and triangular micropillars executing deterministic lateral displacement, oriented at different angles, has been investigated, and it is found that the triangular pillars oriented at 75° resulted in better separation compared to the other configurations. In this report, the fabrication, location, orientation of the micropillars and the selection of appropriate process parameters are detailed. The structures are fabricated on silicon wafers using the standard photolithography process followed by the deep reactive ion etching process. These dies are further used to fabricate the polydimethylsiloxane-based microfluidic chips. These fabricated devices are characterised by their size, structure and quality using 3D microscopy and scanning electron microscopy. Further, blood plasma separation is carried out using the devices fabricated in this work, and the particles at the inlet and outlets are evaluated using microscopy and a novel image processing technique, replacing the use of a hemocytometer. The path traced by the particles at different flow conditions is numerically evaluated and validated with experiments. The novel device is capable of separating blood cells from plasma with a recovery factor varying from 44% to 100%. PDMS-PDMS bonding experiments using oxygen and argon plasma have been carried out to evaluate the maximum bond strength and flow velocity in the devices. It is observed that the oxygen plasma results in a bond strength of 0.404 N mm-1, thus a high throughput of 135.34 μL s-1 is achieved using the fabricated device.

Abstract 3297: Deep reactive ion etched microneedle array for in-vivo melanoma cancer monitoring via cancer exosome isolation

Abstract This study reports a deep-reactive-ion-etched microneedle device (ExoNeedle chip) coated with a hybrid hydrogel that can directly capture cancer-associated extracellular vesicles (EVs) in interstitial fluid (ISF) in a minimally invasive manner, as opposed to conventional liquid biopsy methods involving sample extraction and EV isolation in-vitro or tissue biopsies for melanoma. Tumor derived EVs give insight into a tumor’s mutational burden and provide both prognostic and diagnostic value as a liquid biopsy tool. Melanoma is an aggressive cancer with a lack of promising markers for early detection, onset of metastasis, and monitoring of recurrence. The ExoNeedle chip is intended to pierce through the epidermis and parts of the dermis to isolate melanoma secreted EVs from the ISF to alleviate these unmet needs. The microneedle arrays were created through the Deep Reactive Ion Etching (DRIE) process and a subsequent wet etching step to sharpen the needles. A 4 inch silicon wafer spin coated with 3 microns of positive photoresist was lithographically patterned and etched by DRIE using the standard Bosch processes to expose arrays of cylindrical pillars. Next, the cylindrical features were sharpened using an isotropic wet etch consisting of a mixture of hydrofluoric and nitric acid. The microneedle arrays were made and cleaved into individual patches. Meanwhile, hybrid hydrogel solution was made from Polyvinyl alcohol (PVA) and alginate by dissolving each of them separately in water under heat, followed by mixing the solutions. After centrifuging and filtering the hydrogel, it was conjugated with Annexin V (Av) protein to give it affinity for cancerous exosomes. Lastly, this hydrogel complex was added onto the microneedle patches and gelated with the help of a humidifier that deposited Ca2+ ion vapor over the hydrogel. The microneedles were first optimized and validated using melanoma cell line secreted EVs. Melanoma EVs were successfully isolated and quantified to evaluate the efficacy of the microneedle patches yielding above an 80% capture efficiency from purified serum samples. The microneedle patches were DiO stained, fluorescently imaged, visualized in a scanning electron microscope, and protein concentration was determined respectfully. Additionally, the functional hydrogel coatings on the microneedles are dissolved in ethylenediaminetetraacetic acid (EDTA), subsequently unbinding EVs from Av due to EDTA-based Ca2+ chelation. The dissolved solution is then used for enumeration and quantification of EVs by nanoparticle tracking analysis. We are further validating these patches in skin mimicking models and patient derived xenograft models of melanoma. The technology developed in this study for the isolation of melanoma EVs can broadly pave the way for minimally invasive point of care cancer diagnostics and tracking for melanoma patients. Citation Format: Scott M. Smith, Abha Kumari, Thiago Reis, Yoon-Tae Kang, Sunitha Nagrath. Deep reactive ion etched microneedle array for in-vivo melanoma cancer monitoring via cancer exosome isolation [abstract]. In: Proceedings of the American Association for Cancer Research Annual Meeting 2023; Part 1 (Regular and Invited Abstracts); 2023 Apr 14-19; Orlando, FL. Philadelphia (PA): AACR; Cancer Res 2023;83(7_Suppl):Abstract nr 3297.

The effect of DRIE notching on field emission enhanced breakdown in SOI based MEMS electrodes

Microscale (<5 μm) gas breakdown is usually dominated by field emission, which is influenced largely by electrode surface morphology. At present, there is a large number of studies on the breakdown and discharge of different metal electrode geometry and electrode spacing as well as micro-electro-mechanical system (MEMS) device structures, but few studies on the breakdown of MEMS electrodes affected by notching, which will greatly change the electrode surface morphology but is difficult to completely avoid in deep reactive ion etching process based on silicon on insulator (SOI) wafer. In response to this situation, this paper conducted breakdown tests and field emission tests on MEMS samples with and without notching. It was found that samples with notching could withstand more breakdowns of about 6–13 times before the formation of internal resistance, increased by 200%–300% compared with samples without notching, and have a lower breakdown voltage of about 210 V, 16% lower than that of samples without notching. In addition, it was also found that for the samples with notching, the field enhancement factor gradually decreases with the increase of the number of breakdown events. When the field enhancement factor decreases to about 100, the subsequent breakdown is highly likely to cause the sample to form electrical connection, thus completely damaging the sample. Above conclusions have certain reference value for designing the actuation voltage of MEMS devices based on SOI wafers.

Terahertz Barcodes Enabled by All‐Silicon Metasurfaces for Process Control and Monitoring Applications

AbstractProcess control and monitoring (PCM) is crucial for the quality control and yield improvement of semiconductor products. Terahertz inspection of semiconductor devices has been of interest since the progress of terahertz spectroscopic techniques. However, due to the diffraction limit, high‐resolution measurement of geometric sizes and multiple parameter monitoring are challenging for terahertz PCM techniques. In this article, XX present terahertz all‐dielectric metasurfaces as the interface on a silicon substrate for monitoring material properties and fabrication errors in the silicon deep reactive ion etching (DRIE) process. It is shown that four different metasurfaces can encode multiple information simultaneously, including the carrier density of silicon substrates, etching depth and linewidth error, forming a terahertz barcode for PCM. By correlating the measured reflection spectra of the barcode with those in the simulation database, the three parameters are retrieved with a mean square error (MSE) of ≈0.5. The results indicate that this proposed technique using emerging artificial photonic materials as PCM structures paves a pathway toward high‐efficiency semiconductor quality control and other sensing applications.

Adaptive Weight Tuning of EWMA Controller via Model-Free Deep Reinforcement Learning

Exponentially weighted moving average (EWMA) controllers have been extensively studied for run-to-run (RtR) control in semiconductor manufacturing processes. However, the EWMA controller with a fixed weight struggles to achieve excellent performance under unknown stochastic disturbances. To improve the performance of EMWA via online parameter tuning, an intelligent strategy using deep reinforcement learning (DRL) technique is developed in this work. To begin with, the weight adjusting problem is established as a Markov decision process. Meanwhile, simple state space, action space and reward function are designed. Then, the classical deep deterministic policy gradient (DDPG) algorithm is utilized to adjust the weight online. Moreover, a quantile regression-based DDPG (QR-DDPG) algorithm is further verified the effectiveness of the proposed method. Finally, the developed scheme is implemented on a deep reactive ion etching process. Comparisons are conducted to show the superiority of the presented approach in terms of disturbance rejection and target tracking.

Design and fabrication of piezoelectrically driven deformable reflective micromirrors based on MEMS technology

As the core component of the adaptive optics system, the deformable mirror is developing towards miniaturization and integration through the combination of MEMS technology. In this paper, based on the inverse piezoelectric effect of piezoelectric materials, a piezoelectrically driven deformable reflective micromirror is designed and fabricated by physical vapor deposition, UV lithography, eutectic bonding, mechanical cutting, deep reactive ion etching (RIE) and other processes to complete the preparation of micromirrors. The problems related to the eutectic bonding process of PZT and Si in the fabrication of micromirrors are emphatically studied through tensile experiments. The micromirror was tested with a laser interferometer. The test results showed that the prepared micromirror could achieve a maximum deformation of 0.6 μm in the positive direction and 1.7 μm in the negative direction when a voltage of ±1.5 kV was applied.

Design and fabrication of a micro-opto-mechanical-systems accelerometer based on intensity modulation of light fabricated by a modified deep-reactive-ion-etching process using silicon-on-insulator wafer

Accelerometers that work based on intensity modulation of light are more sensitive, economically feasible, and have a simpler fabrication process compared to wavelength modulation. A micro-opto-electro-mechanical-system accelerometer based on intensity modulation of light is designed and fabricated. A movable shutter that is attached to the proof mass is designed to change the intensity of light. Moreover, the mechanical part is designed to improve the overall sensitivity and linear behavior in the measurement range. The designed accelerometer is fabricated by a deep-reactive-ion-etching (DRIE) process. The DRIE process used in this report is based on a Bosch-like process, which uses SF6 and a mixture of H2, O2, and SF6 gases in etching and passivation subsequences, respectively. This method has a lower plasma density and a higher base pressure and causes higher verticality, which results in lower optical efficiency loss in comparison with the Bosch process. Furthermore, the functional characteristics of the accelerometer are derived with analytical and numerical methods, and the results are compared. The functional characteristics of the accelerometer are as follows: a resonant frequency of 0.56 kHz, a mechanical sensitivity of 0.6μm/g, an optical sensitivity of 16%/nm, an overall sensitivity of 9.6%/g, a footprint of 2000×2000μm2, a measurement range of 3g, a mechanical cross axis sensitivity of 0.058μm/g, and an overall cross axis sensitivity of 0.00029%/g. These functional characteristics make the design appropriate for a large range of applications.

An ensemble neural network framework for improving the detection ability of a base control chart in non-parametric profile monitoring

Profile monitoring is a challenging issue in statistical process control (SPC). It aims to use a functional relationship between a response variable and one or more explanatory variable(s) to summarize the quality of a process/product. Most of the existing studies consider the same form of a functional relationship for both in-control (IC) and out-of-control (OC) situations or parametric approaches. However, non-parametric profiles with different relationships in OC conditions are very common. In this paper, we propose a novel ensemble framework to monitor changes in both regression relationship and variation of the profile for Phase II applications. This approach employs a pool of artificial neural networks (ANNs) as learners to enhance the efficiency of a base control chart, which is a non-parametric exponentially weighted moving average (NEWMA) in this study. Then, a further ANN is used as a reasoning scheme (incorporator) to perform prediction by combining the outcomes of the learners. Experimental results demonstrate the effectiveness of the proposed framework, denoted by EANNN, in comparison with the base control chart, i.e., NEWMA, and other non-parametric methods. In addition, a practical example regarding a deep reactive ion-etching process from semiconductor device fabrication is provided to show the implementation of the proposed method.

Improvement on the uniformity of deep reactive ion etch for electrically isolated silicon-based substrates

Substrate-free micro-electro-mechanical systems (MEMS) devices are becoming the hotspots for microsystems. The fabrication of substrate-free MEMS devices usually involves the release of backside silicon by the inductively coupled plasma deep reactive ion etch (ICP-DRIE) process. However, when using DRIE to etch electrically isolated samples, significant non-uniformity in the etch profile were often observed. Compared to grounded silicon samples, the electrically isolated counterparts after DRIE showed a faster etch rate at the edge and a slower one in the center. This phenomenon is believed to be caused by the interaction between the deflection of charge-bearing ions entering the aperture region and the accumulated charges on the sidewall during DRIE. Simulation results with ICP showed that the electric field and ion distribution can be affected in electrically isolated substrates. After the isolated samples were electrically grounded, the charge accumulation on the sidewall was reduced and 12% etch uniformity was obtained. This technique helps in the fabrication of substrate-free MEMS devices.

DRIE 시스템을 이용한 식각 공정에서 RF 소스 전력과 PR 패턴 사이즈가 깊은 Silicon Via 측벽 표면 형상에 미치는 영향 평가

It has been very difficult to etch deep silicon via with photo-resist (PR) during deep reactive ion etching (DRIE) process because of the erosion of PR and the formation of vertical striations. The effects of RF source power and PR pattern size were researched on the etch rate, via top size and etch depth. The PR mask patterns with 10 μm thickness were composed of 10, 20, 30 and 40 μm squares. The etch rates and the etch profiles of deep silicon vias were monitored by the cross sectional FE-SEM images. As the RF source power and PR pattern size were increased, we obtained higher etch rate and deeper etch profiles. However, we observed the vertical striations at the surface of deep silicon vias at higher RF source power.

Fabrication of High-Density Out-of-Plane Microneedle Arrays with Various Heights and Diverse Cross-Sectional Shapes

HighlightsHigh-density out-of-plane microneedle arrays were fabricated with a single photolithography and two deep reactive ion etching (DRIE) steps in anisotropic and isotropic modes, respectively.Microneedles in various heights were monolithically created by the identical DRIE processes and scanning electron microscopy images showed extremely sharp sub-micron (~145-nm-wide) tip.Diverse cross-sectional shapes of microneedles were implemented by altering photomask patterns.

A smartphone-based electroporation system with highly robust and low-voltage silicon nanopillar chips

In this work, a novel smartphone-based electroporation (EP) system integrated with 3D scalable and robust gold-coated silicon-nanopillar Electroporation (Au-Si NP-EP) chip using projection photolithography is developed, for the first time, for both EP and electric cell lysing (ECL) at low voltages. Au-SiNP-EP chip consists of silicon nanopillars fabricated by using ASML stepper, Deep Reactive Ion Etching (DRIE) process and coated with a gold microelectrode. The silicon nanopillars were optimized based on theoretical analysis and numerical simulations to enhance the electrical field intensity and mechanical strength. The fabricated Au-SiNP-EP chips are tested with both permeable (Acridine Orange (AO) and impermeable (Propidium Iodide (PI)) molecules for HeLa cells at different volts (1–8 V) and pulse duration (1–9 μs). The fabricated chip achieved an optimized EP efficiency of 84.3% and cell viability of 81.4% at a much smaller voltage (4.5V) than reported planar electroporation (PEP) devices (8–100V). Compared with nanostructures-based devices (2–20 V), our devices show both higher mechanical strength and fabrication yield. Besides, a smartphone app integrated with a low-cost open-source portable Arduino-based system is developed to provide optimized electrical protocols for both EP and ECL. The electric cell lysing with ECL efficiency of 97.0% at 7 V and pulse duration of 9 ms has been successfully demonstrated. The experimental results show that the proposed smartphone-based EP system with Au-SiNP EP chips is promising for various applications, including intracellular delivery of various biomolecules, drugs, and release of DNA/RNA molecules from biological cells.

All-silicon, low-cross-talk terahertz waveguide crossing based on effective medium.

All-silicon effective-medium-clad waveguides are a promising candidate for an integrated terahertz platform with high efficiency and broad bandwidth. Waveguide crossings are essential circuit components, allowing for wave routing over shorter paths to increase circuit density. However, the simple intersection of two orthogonal effective-medium-clad waveguides results in terahertz wave scattering, leading to relatively high cross talk. In this work, a low-loss, 40% fractional bandwidth crossing utilizing Maxwell-Garnet effective-medium theory and wavefront planarization techniques is proposed. This monolithic structure is fabricated on a single high-resistivity float-zone silicon wafer using a deep reactive ion etching process with a modest 4.4 mm diameter (4.03λ0) structure footprint. Experimentally verified results show low insertion loss, less than 1 dB, and average cross talk level of -39dB for both E11x and E11y operating modes, over 220-330 GHz with a 40% fractional bandwidth. This waveguide crossing can be foreseen as a useful routing component for terahertz all-silicon integrated circuits. The proposed techniques are applicable to other dielectric waveguide platforms at infrared and optical frequencies.

A Review on the Fabrication and Reliability of Three-Dimensional Integration Technologies for Microelectronic Packaging: Through-Si-via and Solder Bumping Process

With the continuous miniaturization of electronic devices and the upcoming new technologies such as Artificial Intelligence (AI), Internet of Things (IoT), fifth-generation cellular networks (5G), etc., the electronics industry is achieving high-speed, high-performance, and high-density electronic packaging. Three-dimensional (3D) Si-chip stacking using through-Si-via (TSV) and solder bumping processes are the key interconnection technologies that satisfy the former requirements and receive the most attention from the electronic industries. This review mainly includes two directions to get a precise understanding, such as the TSV filling and solder bumping, and explores their reliability aspects. TSV filling addresses the DRIE (deep reactive ion etching) process, including the coating of functional layers on the TSV wall such as an insulating layer, adhesion layer, and seed layer, and TSV filling with molten solder. Solder bumping processes such as electroplating, solder ball bumping, paste printing, and solder injection on a Cu pillar are discussed. In the reliability part for TSV and solder bumping, the fabrication defects, internal stresses, intermetallic compounds, and shear strength are reviewed. These studies aimed to achieve a robust 3D integration technology effectively for future high-density electronics packaging.

Design, Fabrication, Testing and Simulation of a Rotary Double Comb Drives Actuated Microgripper.

This paper presents the development of a new microgripper actuated by means of rotary-comb drives equipped with two cooperating fingers arrays. The microsystem presents eight CSFH flexures (Conjugate Surface Flexure Hinge) that allow the designer to assign a prescribed motion to the gripping tips. In fact, the adoption of multiple CSFHs gives rise to the possibility of embedding quite a complex mechanical structure and, therefore, increasing the number of design parameters. For the case under study, a double four-bar linkage in a mirroring configuration was adopted. The presented microgripper has been fabricated by using a hard metal mask on a Silicon-on-Insulator (SOI) wafer, subject to DRIE (Deep Reactive Ion Etching) process, with a vapor releasing final stage. Some prototypes have been obtained and then tested in a lab. Finally, the experimental results have been used in order to assess simulation tools that can be used to minimize the amount of expensive equipment in operational environments.

Optimized Deep Reactive-Ion Etching of Nanostructured Black Silicon for High-Contrast Optical Alignment Marks

High-contrast alignment marks are promising optical elements for the high-precision alignment of X-ray gratings in phase-contrast X-ray imaging systems. These marks contain micrometer-scale bands of optically absorptive and reflective areas that determine their relative degree of optical contrast. Nanostructured black silicon (n-BSi) enabling the broadband, quasi-omnidirectional absorption of light, is a promising material to define these absorptive areas. In this work, we have developed an optimized deep reactive-ion etching (DRIE) process to fabricate n-BSi for these alignment marks. The DRIE process was optimized by systematically changing the polymer deposition time, T, while keeping all other process conditions constant. As T varied from 0.6 to 2.5 s, three distinct etching regimes were observed: (1) smooth etching, (2) n-BSi, and (3) etching stop. During the n-BSi regime (T = 1.6 to 2.1 s), varying T altered the n-BSi morphology, resulting in a broad spectrum of nanostructures: nanopillars to nanopores. Our investigation of the process–structure–property relationships among the process etching, morphology evolution, and reflectance of n-BSi revealed that morphologies with an increased height, aspect ratio, and degree of tapering and a lower base spacing were most effective at suppressing reflection for λ = 500–800 nm. Our results demonstrated the lowest reflectance of the absorptive areas, Rabs = 0.01 (∼1%) and Rrel_abs = 0.03 (relative with respect to Si) at λ = 600 nm for T = 1.9 s (100 cycles), thus giving the highest contrast ratio, ϕ = 0.9. To increase the device throughput, we varied the cycle number from 5 to 100 times at T = 1.9 s to study its effect on growth, morphology, and reflectance of n-BSi. Our results demonstrate that Rabs, Rrel_abs, and ϕ plateaued at 50 cycles, cutting in half our total fabrication time, t. In addition, our alignment marks demonstrated rotational and translational precision alignment capabilities. Lastly, we present two design principles for T and the cycle number to fabricate the optimal n-BSi morphology for the targeted application using any DRIE tool.

Three-Dimesnional Semicondoctor Stacking using TSV(Through-Si-Via) Technology

Recently, the electronics industry is developing toward artificial intelligence, the Internet of things, fifth-generation technology, and high-performance computing. High-density electronics packaging, high speed, high performance, and miniaturized size are required to satisfy these trends. Three-dimensional Si-chip stacking using through-Si via (TSV) has attracted the attention of industries related to these requirements. In this study, TSV fabrication using the deep reactive ion-etching process and the coating of functional layers on the TSV wall, such as insulating, adhesion, and seed layers, were investigated. In addition, Cu electroplating in the TSV was analyzed in detail. The solutions to other accompanied technical barriers for packaging high-density electronics can improve smartness and con- venience. Key words: Three dimensional packaging, Through-Si-Via, Functional layers, Electroplating