Deep Ion Implantation Research Articles

Comparison of Standard and Low-Dose Separation-by-Implanted-Oxygen Substrates for 0.15 µm SOI MOSFET Applications

The influence of buried oxide thickness on short-channel effects in silicon-on-insulator metal-oxide-semiconductor field-effect transistors (SOI MOSFET's) is investigated. It is shown by analytical modeling and numerical simulation that, although a thin buried oxide helps to reduce the charge-sharing component of source and drain electric fields through the oxide layer, substrate depletion underneath the thin buried oxide counteracts the oxide thinning. Although this effect is desired below the source and drain regions to maintain the SOI inherent low junction capacitances, it is detrimental to short-channel-effect suppression. The calculated results are experimentally confirmed on 0.1 µm SOI MOSFET's fabricated on both standard and low-dose separation-by-implanted-oxygen (SIMOX) substrates. A new structure for 0.15 µm SOI MOSFET applications on a thin buried oxide substrate is proposed in which substrate depletion below the channel-forming region can be suppressed locally using self-aligned deep ion implantation.

High-performance low-base-collector capacitance AlGaAs/GaAs heterojunction bipolar transistors fabricated by deep ion implantation

Low-base-collector capacitance (C/sub bc/) AlGaAs/GaAs HBTs with f/sub MAX/>200 GHz and f/sub T/=52 GHz have been fabricated. With co-implants of high energy, high dose He/sup +/ and H/sup +/ ions through the external base layer, part of the heavily doped n/sup +/ sub-collector was compensated leading to a decrease in the extrinsic portion of C/sub bc/. The implants caused only a slight increase of base resistance. Using this approach in combination with a standard low dose, shallow collector compensating implant, C/sub bc/ of double implanted HBT's can be reduced by more than 35%. >

Deep erbium-ytterbium implantation codopingof low-loss silicon oxynitride waveguides

The authors report the first photoluminescence studies and preliminary loss modulation measurements on low-loss planar silicon oxynitride optical waveguides co-implanted with Er and Yb. Deep high-dose ion implantation is used to create high concentration levels of Er and Yb dopants with the concentration profiles adapted to the guided pump mode (980 nm). It is found that Yb co-implantation at high concentrations (up to 1 atm.%) only reduces the initial Er 4I13/2 level lifetime (5.3 ms) by less than 30%, while the 980 nm pump absorption is greatly increased. Loss modulation at 1.5 µm is detected in planar waveguides, thus indicating further possibility of using Er/Yb codoped SiON waveguides in active integrated optoelectronics.

Undoped semi-insulating GaAs epitaxial layers and their characterization

Wafer annealing was applied to undoped conductive GaAs epitaxial layers grown by the chloride chemical vapor deposition method in order to realize semi-insulating GaAs epitaxial layers. It was found that, by wafer annealing at temperatures higher than 950 °C, semi-insulating epitaxial layers with a resistivity higher than 107 Ω cm and a mobility higher than 5000 cm2/V s can be obtained. The material quality has been evaluated by Hall measurement, isothermal capacitance transient spectroscopy, deep level transient spectroscopy, scanning photoluminescence, AB etching, ion implantation, and activation efficiency measurement. It was concluded that the semi-insulating behavior of undoped GaAs epitaxial layers is due to the increase of the EL2 concentration to the level of 5×1015 cm−3 realized by wafer annealing. The present material does not show any cell structures which are inherent to bulk GaAs materials. It was found to be of the best quality ever reported from the viewpoint of various material characterizations.

Proposal for the concept of ultradense integrated memories based on Coulomb blockade at room temperature.

Coulomb-blockade results are recorded at room temperature and normal pressure in monolithically integrated structures using GaAs wedges with a radius of ∼25nm and a minimal gap to the anode when a quasi-vacuum can be assumed. These devices have very low capacitances being of order 10−18F. A concept presented where this Coulomb blockade is used for signal production and storage in an ultra-dense memory-matrix application. A one-dimensional high-electron mobility heterostructurc together with local resonant intcrband tunnelling, isolated by deep ion implantation are proposed for the buried layer access electronics.

Selective anodization using masked deep ion implantation

This paper describes the initial experiments aimed at determining the effectiveness of masked, deep ion implantation for improving the dimensional control and the packing density of features etched in silicon using the selective anodization process. It also shows how this process can be utilized to obtain variations in shape of an etched feature in the depth direction, hence enabling a true 3D microengineering technique.

Optical properties of gold nanocluster composites formed by deep ion implantation in silica

Planar layers of Au clusters with diameters between 5 and 30 nm were synthesized by implanting 2.75-MeV Au+ ions in fused silica. The metal-glass composite layer was 0.85 μm below the surface and had a width of 0.5 μm. Thermal annealing enhanced the optical absorption of the annealed samples near 2.4 eV. The third-order nonlinear optical response time is ≤35 ps; the magnitude of the effective nonlinear susceptibility is 200 times that of similar clusters embedded in ruby-gold melt glass.

Retardation of nucleation rate for grain size enhancement by deep silicon ion implantation of low-pressure chemical vapor deposited amorphous silicon films

The effects of silicon ion implantation on the crystallization kinetics and grain size of low-pressure chemical vapor deposited amorphous silicon on oxidized silicon substrate have been studied by x-ray diffraction and transmission electron microscopy. The most effective grain size enhancement was achieved by deep silicon ion implantation with the projected range located beyond the bottom interface to allow the maximum kinetic energy transfer at or near that interface. The grain size enhancement was due to a decrease of nucleation rate and an increase of the nucleation activation barrier from 3.9 to 4.9 eV for the Si+-implanted sample. The amorphous-to-crystalline grain growth activation barrier of 3.2 eV was not altered by Si+ implantation, but the growth rate was decreased. Retardation of nucleation and enhancement of grain size are attributable to the implant-recoiled oxygen. The average grain size increases from ∼0.2 to ∼2.0 μm by using 2×1015 cm−2 of Si+ implantation at 92 keV for 82-nm-thick films.

A vertically integrated dynamic RAM-cell: Buried bit line memory cell with floating transfer layer

A charge injection device has been realized in which charge can be injected on to an MOS-capacitor from a buried layer via an isolated transfer layer. The cell is positioned vertically between word and bit line. LOCOS (local oxidation) is used to isolate the cells and (deep) ion implantation to realize the buried bit line and transfer layer. This isolation prevents carriers from diffusing to neighbouring cells and hence preserves stored information. The device physics has been analysed using simulation programs and bipolar modelling. It is shown that this device can be used as a dynamic RAM-cell of extreme simplicity and potentially small cell size compared to conventional DRAM cells.

Reduction of cell size in hybrid bubble memory devices (abstract)

Hybrid bubble memory devices using ion-implanted and Permalloy bubble propagation tracks have been proposed and developed. In this paper, the reduction of the cell size from 4 to 3 μm will be discussed. In the hybrid devices, the minor loops are composed of ion-implanted tracks and the functions are composed of Permalloy tracks. To reduce the cell size, therefore, both of the tracks should be improved. For the 3-μm-period ion-implanted tracks, the bubble diameter is reduced from 1 to 0.8 μm. According to the reduction of a bubble diameter, magnetostrictive anisotropy Δλ=λ100−λ111 is increased from 5 to 8×10−6 because the Sm content is increased to increase the anisotropy field Hk. The large Δλ affects the characteristics of inside and outside turns in the ion-implanted tracks. To get a good margin for the turns, the anisotropy field change induced by ion implantation ΔHk should be larger than in 4-μm-period tracks. There is a new problem in 3-μm-period hybrid devices. In the hybrid devices, there is no deep ion implantation in the Permalloy track region, while there is a deep ion implantation in the ion-implanted track region. The effective bubble height is, therefore, different in the ion-implanted and Permalloy track region, and the bias field region where bubbles exist stable is different. In the typical 3-μm-period devices, the bias field region of the ion-implanted tracks is 20–30 Oe lower than that of the Permalloy tracks. The operating bias field adjustment (OBA) is needed. We have checked some OBA methods and found that the thinning of the garnet film in the Permalloy track region is a good method. Thinning the garnet film partially, the operating bias field can be adjusted easily and there is no harmful effect.

Optical properties and damage analysis of GaAs single crystals partly amorphized by ion implantation

Dielectric functions of partly amorphized GaAs layers produced by deep ion implantation of different doses of 270-keV As+ ions in crystalline (c-) GaAs have been measured from 1.5 to 6.0 eV by spectroscopic ellipsometry. We show that these dielectric functions cannot be described as physical mixtures of amorphous (a-) and c-GaAs, as such models exhibit strong deviations with respect to the data near 3 eV. We determine representations of these dielectric functions as finite sums of harmonic oscillators, which allows us to describe these spectra as analytic functions of a single parameter related to the amount of damage. In this harmonic oscillator approximation (HOA), we show that damage profiles of ion-implanted material can be nondestructively determined from ellipsometric spectra in terms of multilayer models. In a representative case, good agreement is found between damage profiles determined nondestructively in the HOA and destructively by chemical etching.

Suppression of Anomalous Drain Current in Short Channel MOSFET

The current voltage characteristics of short channel nMOSFET in the subthreshold region is investigated by two-dimensional numerical analysis. Deep ion implantation of acceptor impurities beneath the channel is found to improve the subthreshold characteristics. Structure optimization for the deeply ion-implanted short channel MOSFET is carried out to obtain low subthreshold current with steep semilogarithmic slope, which are almost comparable with the long channel MOSFET.

Depletion-mode IGFET made by deep ion implantation

p-channel depletion-mode IGFET's for use as depletion-load elements have been fabricated on