Data Transition Tracking Loop Research Articles

Jitter Test of Multiphase DTTL

Speed and precision are always two critical factors to tradeoff in SDH jitter measurement. According to existing jitter test of single-phase data transition tracking loop(DTTL), a multi-phase DTTL jitter testing circuit is presented in this paper based on Xilinx chips. Xilinx chips have a feature of delay programmable configuration. This method makes use of it,and divides the square wave signal with the input jitter in a jitter measurement part into N copies. The copies are respectively configurated suitable delay, and with the local reference signal for phase comparison, the sum of all comparison outputs as a jitter error. Under the same sampling period, because the sampling points that take part in phase comparison are increased, so the sampling frequency and measurement accuracy indirectly improves. Theoretical analysis and simulation results show that the measurement accuracy for multi-phase jitter error has corresponding times than for single phase jitter error. The method eases limitation of the Xilinx chip clock and increases SDH jitter measurement accuracy.

Noncoherent data transition tracking loops for symbol synchronization in digital communication receivers

Starting with the maximum a posteriori (MAP)estimation approach, this paper derives the optimum (in the MAP estimation sense) means for performing symbol-timing recovery in the absence of carrier-phase information (i.e., prior to carrier-phase recovery). Specifically, we examine the necessary modification of a well-known form of coherent symbol synchronizer,namely, the data transition tracking loop (DTTL), to allow its operation in the absence of carrier-phase information, i.e., as a so-called noncoherent symbol sync loop. By employing such a noncoherent scheme, one can eliminate the need for iteration between the carrier and symbol sync functions,as typically takes place in receivers that more commonly perform carrier tracking and acquisition prior to symbol timing. The performance of both the linear and nonlinear versions of this noncoherent DTTL is obtained by a combination of analysis and simulation, and compared with that of the corresponding coherent DTTLs.

Noncoherent Data Transition Tracking Loops for Symbol Synchronization in Digital Communications Receivers

Starting with the maximum a posteriori (MAP) estimation approach, this paper derives the optimum (in the MAP estimation sense) means for performing symbol timing recovery in the absence of carrier phase information (i.e., prior to carrier phase recovery). Specifically, we examine the necessary modification of a well-known form of coherent symbol synchronizer, namely, the data transition tracking loop (DTTL) to allow its operation in the absence of carrier phase information, i.e., as a so-called noncoherent symbol sync loop. By employing such a noncoherent scheme, one can eliminate the need for iteration between the carrier and symbol sync functions, as typically takes place in receivers that more commonly perform carrier tracking and acquisition prior to symbol timing. The performance of both the linear and nonlinear versions of this noncoherent DTTL is obtained by a combination of analysis and simulation, and compared with that of the corresponding coherent DDTLs.

The True Performance of the Simplified Data Transition Tracking Loop

The tracking performance of a simplified (no transition detector in the in-phase arm and no delay in the quadrature arm) data transition tracking loop (SDTTL) suggested in the conference literature (Chiu and Lee, 1987) a number of years ago for symbol synchronization of an NRZ data stream is presented. It is shown that, contrary to what was previously stated in Chiu and Lee, 1987, the SDTTL and the traditional DTTL have performances that are quite different, the latter always being the more superior. In fact, asymptotically for large symbol SNR, the mean-squared timing error of the SDTTL is 3 dB worse than that of the DTTL which considerably negates its implementation simplification. Even at low SNR, where neither scheme would be motivated by maximum a posteriori (MAP) estimation of symbol sync considerations, the DTTL still outperforms the SDTTL.

Performance of a digital symbol synchronizer in cochannel interference and noise

The performance of a binary-quantized data-transition tracking loop symbol synchronizer operating in cochannel interference (CCI) and noise is examined for both binary phase-shift keying and quaternary phase-shift keying modulations. The CCI can be included in a previously known Markov chain model without increasing the number of states in the chain, but the cost of computing the transition probabilities increases exponentially with the number of interferers. It is shown that a first-order Markov model and simulation are in close agreement for some important applications. The effect of interferer epoch on the degradation caused by the interference is investigated and the degradations in performance caused by CCI and by Gaussian noise are compared.

Use of second order Markov chains to model digital symbol synchroniser performance

A second order Markov chain model is used to evaluate the performance of a binary quantised data transition tracking loop (DTTL). At small and moderate signal-to-noise ratios (SNRs), where a first order model is inaccurate for some common pulse shapes, the second order model closely approximates simulated results. The effects of two common loop filters (LFs) on the DTTL performance is also investigated. A first order model accurately predicts performance for moderate and large K for an accumulating LF, which sums K successive timing error estimates. However, an example shows that for a random walk LF with K states, the first and second order models can predict increasingly different performance as K becomes larger.

The performance of the all-digital data transition tracking loop using nonlinear analysis

This paper describes the performance of the all digital data transition tracking loop (DTTL) with coherent and noncoherent sampling using nonlinear theory. The effects of few samples per symbol and of non-commensurate sampling and symbol rates are addressed and analyzed for perfectly square pulses as well as filtered pulses. Their impact on the probability density and variance of the phase error are quantified through computer simulations. It is shown that the performance of the all-digital DTTL approaches its analog counterpart when the sampling and symbol rates are noncommensurate (i.e., the number of samples per symbol is irrational). The phase error variance for an even number of samples per symbol is also shown to degrade compared to an odd number of samples per symbol. >

Effect of signal transition variation on bit synchronizer performance

The effect of the signal transition variation, due to the signal transition density, data asymmetry, and sinusoidal modulation, on the performance of the data transition tracking loop (DTTL) symbol synchronizer is addressed. These factors will affect the DTTL performance, such as the clock jitter and the cycle slippage rate, and unnecessary system loss may result if the system parameters are not well selected. Given the background of C. S. Tsang and W. C. Lindsey (1986), this result can serve as an engineering design guideline for the DTTL in the context of the signal transition variation. >

Analysis of an all-digital data-transition tracking loop

An all-digital implementation of the data-transition tracking loop (DTTL) is proposed and analyzed. The input waveform is assumed to be nonreturn-to-zero (NRZ)-coded binary signals. The mathematical analysis of the loop is reduced to the study of a Markov chain which allows the derivation of expressions for the mean square phase error, steady-state probabilities, transient behavior (time to acquire and time to bit slippage), and bit error rate (BER). Theoretical results have been validated using a computer simulation of the loop. The all-digital implementation can take full advantage of advanced technology in memory and processing speeds. >

Simplified data transition tracking loop—a new NRZ maximum likelihood symbol synchroniser

A new approximation of NRZ maximum likelihood (MAXL) symbol synchroniser is proposed, which is similar to the data transition tracking loop (DTTL) symbol synchroniser but without delay circuit and transition detector and has exactly the same S-curve and noise performance as the DTTL symbol synchroniser.

Symbol synchronization for digital signals with multisegment trajectory: digital data transition tracking loop

The symbol synchronizer presented is an all-digital data transition tracking loop which permits simple implementation and voltage control of the loop bandwidth. The equivalent loop integration constant is changed by changing the threshold level of a comparator at the output of the loop phase error detector. Phase error probability distribution function, its variance, and the average probability of cycle slipping are analyzed analytically for the general case. The theory of finite Markov chains is used to analyze statistical properties of the tracking error, primarily with regard to the phase error distribution and its variance, the average probability of the cycle slipping, the synchronizer time response, and bandwidth. As an example, numerical results for generalized tamed frequency modulation (GTFM with B=0.62 and r=0.36) are presented and discussed.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Bit Synchronization in the Presence of Asymmetric Channel Noise

Bit synchronization in the presence of asymmetric channel noise has not appeared in the open literature. It is the purpose of this paper to study the tracking performance (clock jitter and cycle slip rate) of a popular digital clock synchronizer, the digital data transition tracking loop (DTTL), in the presence of asymmetric noise. Related parameters of interest, the transition density and data asymmetry, are also included. Acquisition performance (frequency acquisition time) is discussed in the absence of noise. A comparison of the DTTL and crossspectrum synchronization loop (CSSL) is also provided. Numerical results are Presented for the design of a bit synchronizer in this environment.

Analysis of the digital data transition tracking loop in correlated Gaussian noise

The behaviour of a, practical self-bit synchronizer, called the digital data transition tracking loop, bas been studied when the input additive noise process (assumed to the zero-mean Gaussian) is correlated. Both linear and non-linear analyses of the above synchronizer in the correlated case have been carried out and the results are compared with those for the case of uncorrelated noise.

Data-Derived Symbol Synchronization of MASK and QASK Signals

Much has been said in the literature with regard to the problem of establishing symbol synchronization in binary baseband digital communication systems. By comparison, the literature contains little information relating to the extraction of symbol sync from multilevel baseband data. With the recent interest in multilevel amplitude-shift keying (MASK) and quadrature amplitude-shift keying (QASK) as signaling techniques for multilevel digital communications systems, the problem of providing symbol synchronization in the receivers of such systems becomes paramount. This paper presents a technique for extracting symbol sync from an MASK or QASK signal which has been transmitted over an infinite bandwidth white Gaussian noise channel. The scheme is essentially a generalization of the data transition tracking loop (DTTL) which has heretofore been used in PSK systems. The performance of the loop is analyzed in terms of its mean-squared symbol sync jitter and its effects on the data detection process in MASK and QASK systems.

Optimization of the Performance of a Digital-Data-Transition Tracking Loop

The steady-state behavior of a data-transition tracking loop, used as a bit synchronizer in a phase-coherent receiver, is considered. Optimization of mean-square phase noise and mean time to first cycle slip is performed when the average power of the reference cross-correlating signal is constrained. It is shown that by adjusting the quadrature channel gain along with the integration interval, a significant improvement in phase noise and cycle slip performances can be achieved over that system which integrates in the quadrature channel over the full symbol period. All the results are derived for a first-order loop filter merely to indicate the approach to the problem and the relative value of optimizing the system.