Robotized cluster tools for semiconductor wafer fabrication may have a wafer wait within a processing chamber after processing there until the wafer is unloaded from the chamber by a robot. Such wafer delays cause wafer quality degradation or variability due to residual gases and heats within the chamber. There have been numerous works on characterizing wafer delays and scheduling under upper limits on wafer delays while presuming that the tools are operated by well-known simple robot task sequences such as swap or backward sequences. However, when the wafer delay constraints are tight, there may not be feasible schedules for such sequences. We wish to know whether there can be alternative robot task sequences which can satisfy such tight wafer delay constraints. In this paper, we identify a new class of robot task sequences that can better satisfy tight wafer delay constraints than the conventional swap or backward sequences while keeping the same minimum tool cycle time. By examining the circuits of timed event graph (TEG) models for the tool operation behaviors in many different robot task sequences, we identify that such robot task sequences do not make interferences between the work cycles of the resources such as the robot and chambers. The resource interference can cause delays in the work cycles, and hence increase the wafer delays or the tool cycle time. To prove this, we examine circuits in an extended TEG model, a negative event graph, which incorporates time constraints as negative places and tokens. From this, we derive closed-form conditions for which such sequences are feasible against given wafer delay constraints. By experiments, we show that the proposed new sequences have shorter wafer delays, and hence better satisfy tight wafer delay constraints than conventional sequences. Note to Practitioners —As circuit widths shrink down to several nanometers, cluster tools for semiconductor fabrication require extreme process quality control. Even wafer delays within processing chambers of cluster tools can cause wafer quality degradation and variability. Therefore, it is desirable for cluster tools to have much shorter wafer delays. However, conventional sequences such as the swap and backward sequences, which are being prevalently used in practice, may not satisfy tight wafer delay constraints. Our proposed sequences, which are as simple as the conventional sequences, have much shorter wafer delays while keeping the same minimum tool cycle time.
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