By measuring the substrate current under the forward bias of source/drain-substrate junction, a multiregion direct current current-voltage (MR-DCIV) technique is used to characterize the interface trap density and location in shallow-trench-isolation (STI)-based laterally diffused metal-oxide-semiconductor devices. The interface traps in LDMOSFETs yielded sharp well-resolved peaks in MR-DCIV current spectra. The interface traps in STI region can be measured without inducing any potential damages on the gate oxide by this nondestructive characterization tool. This technique can provide not only across-wafer as-grown interface trap profile but also stress-induced defect information.