Current Amplifier Research Articles

Two New Voltage-Mode Sinusoidal Quadrature Oscillators Employing Second-Generation Voltage Conveyors

This article presents an application of a second-generation voltage conveyor (VCII) as a quadrature oscillator. The controlling parameters of the presented circuits, i.e. oscillation condition and oscillation frequency are tuneable without affecting the other. Both the single-resistance-controlled oscillators employ only two VCII, two grounded capacitors, and three grounded/ virtually grounded resistors. To strengthen the design idea regular mathematical analysis such as ideal, non-ideal, parasitic, frequency stability, phase noise analysis, and sensitivity calculations have been performed. To validate the proposed networks, the simulations have been carried out using 180 nm CMOS technology parameters, and experimental studies have also been performed using commercially available integrated circuits.

Novel Voltage-Mode PID Controller Using a Single CCTA and All Grounded Passive Components

A compact voltage-mode proportional-integral-derivative (PID) controller based on the utilization of a single current conveyor transconductance amplifier (CCTA) is presented in this paper. The presented active PID controller is made up of a single CCTA, and four truly grounded passive components, i.e. two resistors, and two capacitors. The design consideration of the controller parameters has been examined. Besides, the crucial sensitivity performances of the controller parameters for ideal and non-ideal conditions have also been discussed. An application on the closed-loop test system is demonstrated to validate the practicability of the proposed PID controller circuit. To confirm the theoretical behavior, the proposed circuit is simulated with the PSPICE program using TSMC 0.35-um CMOS process technology. Experimental test results based on commercially available CFOA AD844 and OTA CA3080 integrated circuits are also provided to demonstrate the practicality of the proposed circuit.

Modeling thermoelectric effects in piezoelectric semiconductors: New fully coupled mechanisms for mechanically manipulated heat flux and refrigeration

We present a continuum theory for analyzing the interaction between the thermoelectric and mechanical fields in piezoelectric semiconductors. The balance laws and dissipation inequality are formulated in the reference configuration. Thermodynamically consistent constitutive equations are derived, including the drift-diffusion current, Fourier's law for thermal flux, Seebeck effect, and Peltier effect, by introducing a generalized Fick's law. The heat conduction equation and Joule heating generation with the semiconducting effect are derived by combing the energy balance and the second Gibbs relation. The framework is then geometrically linearized for applications in small deformation of crystal solids. Based on the newly developed framework, two new coupling mechanisms between thermoelectric and mechanical fields in crystals of class of 6mm are identified. 1) A mechanical load can block both electron and thermal fluxes in the loading area via the mechanically induced potential well. At a strain level of 1%, the current and heat flow can be reduced by as much as 80%. This effect facilitates the design of new switching devices. 2) The mechanical load can surprisingly act as a current amplifier through the induced potential barrier. Furthermore, making use of the new and unusual Joule heating generation, thermal dipoles can be created, indicating that mechanical loading can lead to local refrigeration. Via a simple numerical model, we demonstrate that the mechanical deformation can produce a temperature difference of 0.06 K at the strain level of around 1%. Based on this new and exciting cooling mechanism, we further propose a novel multi-stage pyramidal cascade device for refrigeration. The framework in this paper provides a foundation for analyzing multiple physics problems in semiconductor structures and also potential ideas for switching and refrigeration devices. Since it is based on finite deformation theory, the present framework would be helpful in analyzing the behavior of emerging flexible semiconductor materials or developing the corresponding computational methods.

New Voltage-Variable Immittance Functions: Linear Voltage-Controlled Quadrature Oscillator

A new voltage-variable immittance functions (VVIFs) implementation has been proposed. Here two types of grounded-immittances function have been realized viz., inductor (L) and Frequency-Dependent Negative Resistor (D) using a pair of ABBs i.e. Current Feedback Amplifier (CFA-AD844) amalgamated with analog voltage-multiplier (AD-835) devices. Thereafter, high-quality (Q) resonant filters and voltage-controlled quadrature oscillator (VCQO) implementation with linear tuning law are designed using the proposed VVIF. The analysis indicates that the filter/oscillator parameters are impervious to the effects of the CFA-device parasitic capacitors. A VCQO-linear tuning range of f o∼14 MHz with a satisfactory phase-noise margin of (–)103 dBc/Hz at 29 KHz for the LC-type linear QO has been experimentally observed.

Amplification of electron-mediated spin currents by stimulated spin pumping

Stimulated emission is a process during which an atomic system gives away energy to create a coherent photon. It is fundamental to the operation of the optical amplifier. Here we propose two mechanisms for amplifying AC spin currents in a solid-state magnetic medium by a stimulated spin pumping process. The first is synchronous and consists of phase-locked pulses that perturb a precessing magnetic moment. The second is asynchronous and is driven by DC spin currents. The amplification relies on a non-adiabatic interaction taking place in a ferromagnetic medium in which the magnetic moment emits spin angular momentum in the form of spin current before equilibrating with the environment. The pumped spin current amplifies or absorbs the injected AC spin current mimicking the operation of the optical gain medium as readily seen from the gain saturation profiles. The mechanisms we propose are a first step towards a realistic spin current amplifier.

A Lossless Active Inductor Design Using Single ZC-VDCC: Grounded and Floating Mode

This research paper includes two different topologies for the operation of both grounded and floating active inductor (AI) realization. Both structures use a single Z-Copy Voltage Differencing Current Conveyor (ZC-VDCC) and an external grounded capacitor (C). The operational behavior of the proposed design is free from the component matching constraint. In addition, an application workability of the AI is tested for filter frequency response that comprises band pass filter (BPF) and band rejection filter (BRF) using grounded as well as floating active inductor, respectively. The performance test of the proposed active inductor is successfully validated in SPICE computer simulation using 0.18 µm TSMC parameter for ZC-VDCC. Moreover, an experimental verification is also performed using easily available Current Feedback Operational Amplifier (CFOA/IC-AD844) and Operational Transconductance Amplifier (OTA/IC-CA3080) for the implementation of ZC-VDCC. Both simulation and experimental observation are well verified to justify the theoretical concept behind the proposed AI.

Electrochemical immunosensor for ultrasensitive detection of human papillomaviruse type 16 L1 protein based on Ag@AuNPs-GO/SPA

Human papillomaviruse type 16 (HPV16) is a high-risk serotype. As the main protective antigen protein, L1 protein is also the target protein for diagnosis. A simple label free electrochemical immunosensor (ECIS) was fabricated for ultrasensitive detection of HPV16 L1 protein in this work. Quasi-spherical Ag@Au core-shell nanoparticles on graphene oxide (Ag@AuNPs-GO) was developed as current response amplifier and characterized by UV–Vis Spectroscopy, Transmission Electron Microscopy and energy dispersive X-ray spectroscopy. Staphylococcal protein A was decorated on the modified electrode and utilized to immobilized the Fc portion of the monoclonal antibody specific for HPV16 L1 protein. Cyclic Voltammetry, Differential Pulse Voltammetry and Electrochemical Impedance Spectroscopy were used to verify the electrochemical performance and interfacial kinetic property. The increased concentration of HPV16 L1 protein led to slow electron transport and linearly decreased differential pulse voltammetry peak current with a detection limit of 0.002 ng mL−1 and a wide linear relationship in the range of 0.005–400 ng mL−1at a regression coefficient (R2) of 0.9948. Furthermore, this ECIS demonstrated acceptable accuracy with good reproducibility, stability and selectivity, suggesting a promising immunological strategy for HPV typing and early screening.

A compact floating and grounded memristor model using single active element

Memristor with defined operational specifications is a challenging task that promotes innovation in emulation circuit modelling. This article presents a single active block based compact memristor emulator architecture which is suitable for both floating and grounded circuit topologies. It effectively operates in incremental/decremental modes in both the configurations. The proposed model utilizes only one Differential Voltage Current Conveyor Transconductance Amplifier (DVCCTA) as an active block along with a few passive components. It discourages the use of extra sub-circuit components like multiple active blocks, summers and multipliers. The circuit is intended to work at ±1 V of dc power supply and has a power consumption of 8.74 mW. The proposed emulator model exhibits all the characteristics of an ideal memristor with an operating frequency of 12.8 MHz. It has wide working voltage range of 50–500 mV. The memristor model is built and simulated using the TSMC 0.18 μm CMOS process parameter. The reliability and effectiveness of the proposed model is verified through non-ideal, Monte-Carlo, process corner, non-volatility and temperature variation analysis. Furthermore, the memristor prototype is constructed on the breadboard using discrete ICs AD844AN and CA3080. The experimental outcome is found in accordance with the simulation. The applicability of the proposed memristor model is verified by implementing a memristor based Schmitt trigger circuit.

Current Conveyor Transconductance Amplifier (CCTA) based Grounded Memcapacitor Emulator

A new emulator circuit for designing memcapacitor is proposed in this work. The suggested circuit is designed using a current conveyor transconductance amplifier (CCTA), a memristor and a capacitor. Behaviour of the proposed circuit has been examined for a frequency range of 0.6Hz to 6.4Hz with the help of simulations performed in LTSPICE using TSMC 180nm process parameters. It has been observed that the area inside lobes reduces with increase in frequency. In comparison to other emulators reported in literature, the suggested circuit uses fewer passive components and does not require analog multipliers, thus making it simple to design. The correctness and efficacy of the proposed design are verified using transient analysis, non-volatility analysis, and pinched hysteresis loops.

A Modern VDCCTA Active Element and Its Electronic Application

In this paper, a novel current mode (CM) building block termed Voltage differencing current conveyor transconductance amplifier (VDCCTA) is developed by combining the voltage differencing current conveyor (VDCC) and an operational transconductance amplifier (OTA). This modern active block VDCCTA is extended for applications such as a lossless inductor, filter design, and chaotic circuit design. An active inductor simulator (AIS) without any component matching is designed using the proposed VDCCTA block and a grounded capacitor as a first application that offers flexibility to model grounded positive active inductor (GPAI), grounded negative active inductor (GNAI), and floating positive active inductor (FPAI) circuits. Moreover, the proposed positive active inductor (PAI) can also be translated for multiple input single output (MISO) voltage mode (VM) universal filter with two external passive elements and chaotic circuitry. The characteristics of VDCCTA are verified with the CM multifunction filter, VM band-pass filter, and VM-MISO filter. A complete exercise of this newly reported VDCCTA block is analyzed for their port characteristics validation and the performance parameters using PSPICE simulation. Finally, experimental verification of the proposed AIS is tested to justify the theoretical and simulated results.

Resistorless Chua's diode implementation for chaotic oscillation employing single EXCCCII

A passive resistor-free Chua’s Diode with smooth nonlinearity is introduced using a single Extra X Current Controlled Current Conveyors (EX-CCCII). The proposed Chua’s Diode can generate all fundamental Chua’s chaotic responses like Rossler type attractor, double scroll attractor, and large limit cycle. Chua’s chaotic response can be easily observed in two ways: (i) by tuning the bridging resistor between two capacitors present in a Chua's circuit and (ii) by adjusting the bias current of EX-CCCII present in the proposed Chua’s diode. The proposed Chua’s model is verified with three possible combinations: Chua’s oscillation with a passive inductor, tunable Chua’s oscillation by varying the bias current present in EX-CCCII based negative resistance, and inductor less Chua’s circuit using active inductor based on EX-CCCII. Moreover, the effect of non-idealities present in EXCCCII on negative resistance and dynamical investigation of theproposed Chua’s circuit is described for better understanding. The functionality of the proposed Chua’s circuit is well verified through PSPICE simulation using 0.25 μm TSMC CMOS technology parameters and Current Feedback operational amplifier (CFOA) as IC AD844 based EX-CCCII. In addition to computer simulation, an experimental investigation is also performed by CFOA as IC AD844 to realize EX-CCCII. Finally, a comparison between the existing Chua’s circuit and the proposed one is illustrated for a fair comparison.

Massive Parallel Current Power Amplifier Concept for Power Hardware in the Loop Applications

The development of the smartgrid increases the complexity of the current electric grid. To verify and validate the operation of the systems involved in it, Power Hardware-In-theLoop (PHIL) technique allows to test the complete system in an exhaustive way. But the reduced bandwidth of the overall test system can cause inaccuracies and instabilities, which can be harmful for the Hardware Under Test (HUT) or the people who are performing the test. To increase PHIL performance and tackle these problems, this paper proposes a new concept of high bandwidth current amplifier. It is based on a topology of massive parallel interleaved buck-boost converter, which distribute in an equal manner the total current in all the branches. This current reduction allows to use transistors with better switching behaviour, which increase the bandwidth of the converter. Furthermore, a Discontinuous Conduction Mode (DCM) is used, obtaining the nominal output current in only one switching cycle. Description of the concept and the design parameters are provided. Finally, the behaviour of the proposed Power Amplifier (PA) at high frequency setpoint currents is shown in a Matlab/Simulink simulation.

A Robust Protection Scheme for Multimicrogrids Using Fault Current Limiter

The operation of multimicrogrids (MMGs) can cause significant impact on power system network, especially changes in level and direction of fault current. The fault current level may exceed rating of existing directional overcurrent relays (DOCRs) that lead to sympathetic tripping or fail to trip DOCRs in the network. It is expensive and extremely challenging to upgrade or replace the existing DOCRs in the network. If not properly addressed, this issue may hinder the deployment of MMGs in to the network. Hence, this article proposes a robust protection scheme for DOCRs coordination in MMGs without replacing existing DOCRs in network. First, the proposed scheme calculates optimal settings of DOCRs in all stand-alone microgrids of MMG during islanded mode. Then, optimal values of fault current limiters are obtained using calculated optimal settings. The main advantage of proposed scheme is that it provides one set of DOCRs settings valid for all operating modes of MMG. In this work, the DOCRs coordination problem is formulated as nonlinear problem and solved using proposed hybrid approach symbiotic organisms search (SOS) and nonlinear programming (NLP). The initial solution is determined by SOS and final solution is obtained using NLP. Further, the proposed scheme is examined during gird connected and islanded modes in two different configurations (series and parallel) of MMG, which are not stated in previous literature. Finally, simulation results are validated using numerical relay and real time digital simulator, which are interfaced through voltage and current amplifier to execute hardware-in-loop test bed.

Ictal direct current shifts contribute to defining the core ictal focus in epilepsy surgery.

Identifying the minimal and optimal epileptogenic area to resect and cure is the goal of epilepsy surgery. To achieve this, EEG analysis is recognized as the most direct way to detect epileptogenic lesions from spatiotemporal perspectives. Although ictal direct-current shifts (below 1 Hz) and ictal high-frequency oscillations (above 80 Hz) have received increasing attention as good indicators that can add more specific information to the conventionally defined seizure-onset zone, large cohort studies on postoperative outcomes are still lacking. This work aimed to clarify whether this additional information, particularly ictal direct-current shifts which is assumed to reflect extracellular potassium concentration, really improve postoperative outcomes. To assess the usefulness in epilepsy surgery, we collected unique EEG data sets recorded with a longer time constant of 10 s using an alternate current amplifier. Sixty-one patients (15 with mesial temporal lobe epilepsy and 46 with neocortical epilepsy) who had undergone invasive presurgical evaluation for medically refractory seizures at five institutes in Japan were retrospectively enrolled in this study. Among intracranially implanted electrodes, the two core electrodes of both ictal direct-current shifts and ictal high-frequency oscillations were independently identified by board-certified clinicians based on unified methods. The occurrence patterns, such as their onset time, duration, and amplitude (power) were evaluated to extract the features of both ictal direct-current shifts and ictal high-frequency oscillations. Additionally, we examined whether the resection ratio of the core electrodes of ictal direct-current shifts and ictal high-frequency oscillations independently correlated with favourable outcomes. A total of 53 patients with 327 seizures were analyzed for wide-band EEG analysis, and 49 patients were analyzed for outcome analysis. Ictal direct-current shifts were detected in the seizure-onset zone more frequently than ictal high-frequency oscillations among both patients (92% versus 71%) and seizures (86% versus 62%). Additionally, ictal direct-current shifts significantly preceded ictal high-frequency oscillations in patients exhibiting both biomarkers, and ictal direct-current shifts occurred more frequently in neocortical epilepsy patients than in mesial temporal lobe epilepsy patients. Finally, although a low corresponding rate was observed for ictal direct-current shifts and ictal high-frequency oscillations (39%) at the electrode level, complete resection of the core area of ictal direct-current shifts significantly correlated with favourable outcomes, similar to ictal high-frequency oscillation outcomes. Our results provide a proof of concept that the independent significance of ictal direct-current shifts from ictal high-frequency oscillations should be considered as reliable biomarkers to achieve favourable outcomes in epilepsy surgery. Moreover, the different distribution of the core areas of ictal direct-current shifts and ictal high-frequency oscillations may provide new insights into the underlying mechanisms of epilepsy, in which not only neurons but also glial cells may be actively involved via extracellular potassium levels.

Novel Resistorless, Cascadable Current-Mode Precision Rectifier Using CFDITA

The paper introduces a new circuit structure of precision full-wave rectifier, without the requirement of any diode(s) and passive component(s), which operates in current mode. The proposed structure of the rectifier employs a single current follower differential input transconductance amplifier and two MOS transistors only. The use of the least number of active components makes the circuit structure simple and favorable to the contemporary integration technology. The proposed rectifier has wider input current dynamic range (±1.6 mA), lower current offset (84 pA), and can operate up to 30 MHz frequency. Additionally, the circuit is easily cascadable, temperature insensitive, and less affected by process variation, MOS transistors mismatch, and supply voltage variation. The rectifier circuit is verified through 0.18 µm gpdk technology-based post-layout simulation results using the cadence Virtuoso tool. The rectification accuracy is examined through the parameters, such as average value ratio and root mean square error. The proposed rectifier’s layout measures 31.95 µm × 31.35 µm in size.

BPSK Circuit Based on SDC Memristor.

Digital communication based on memristors is a new field. The main principle is to construct a modulation and demodulation circuit by using the resistance variation characteristics of the memristor. Based on the establishment of the Knowm memristor simulation model, firstly, the modulation circuit is designed by using the polarity and symmetry of the memristor and combined with the commercial current feedback amplifier AD844. It is proved that the modulated signal based on the memristor is a strong function of phase, and the demodulation circuit is designed accordingly. All simulation circuits are based on the actual commercial physical device model. The analytical expression of the output signal of the modulation and demodulation circuit is deduced theoretically, and the communication performance of the whole system is simulated by LTSpice. At the same time, the influence of the parasitic capacitance of the memristor on the circuit performance is also considered. After the simulation verification, the hardware circuit experiment of the modulation and demodulation circuit is carried out. The waveforms of the modulated signal and the demodulated signal are measured by an oscilloscope. The experimental results are completely consistent with the simulation and theoretical results.

An electronically tunable CMOS implementation of capacitance multiplier employing CCCDTA

In this work, a new design for the grounded capacitance multiplier is proposed. The proposed circuit is based on the analog building block of Current Controlled Current Differencing Transconductance Amplifier (CCCDTA) which allows the multiplier structure to work in the current mode. CMOS realization of the proposed structure is implemented with 0.18 µm CMOS technology for the grounded adjustable capacitor multiplier. Multiplication factor adjustability is realized by the bias current of Current Difference Unit (CDU) of CCCDTA. All simulations performed at post-layout level (209 µm × 67 µm) in Cadence environment by taking into account Monte-Carlo runs comprising process variations and transistor mismatches. Also, performance of the proposed multiplier structure is validated by using commercial elements such as AD844 and LM1370. In comparison to the counterparts in the literature, the proposed architecture including only single active element gives promising results under different operating conditions for a wide range of frequency.

Chopping for over 50 MHz gain‐bandwidth product current sense amplifiers achieving input noise level of 8.5 nV/√Hz

An accurate, high-speed, fully differential difference amplifier for current sensing utilizing the chopper approach was implemented in a 0.18 μm complementary metal-oxide-semiconductor (CMOS) technology. Unlike state-of-the-art solutions, we use a higher chopping frequency in the MHz range due to the bandwidth requirements of the introduced circuits for the latter application, namely, low-side phase-current measurement in motor control circuits. Except the low-pass filter (LPF) effect of the output stage, no additional LPF was integrated in hardware at the output of the circuits. We show that on the other hand a digital LPF, which can be integrated in the field-programmable gate-array (FPGA) logic or microcontroller used for the motor control, offers a higher flexibility in terms of filter design. Weak input signals of only few mV can be reconstructed with a high accuracy. This is demonstrated for a 500 kHz rectangular signal and a chopping frequency of 20 MHz. Note that an input-signal frequency of several hundreds of kHz with harmonics in the MHz region is very challenging for chopper amplifiers. Still, a significant decrease of the input-referred noise is demonstrated, especially cancelling out the 1/f-noise achieving a remaining noise floor of approximately 8.5 nV/√Hz. Overall, the input-referred noise level can be pushed far below 50 μV (root mean square). Moreover, using a quite relaxed second-order Butterworth filter with a 3 dB corner frequency of 1 MHz, input-referred noise levels of 10 μV (root mean square) can be easily achieved at the costs of reduced bandwidth. The lowest achieved input offset is 50 μV. The gain is adjusted by resistive feedback and is approximately 40 dB. Hence, the amplifier is suitable for current sensing in motor control circuits, and a significant reduction of the shunt resistance typically used for this purpose will be possible.

Research on the Brushless Excitation System with Linear Current Amplifier Characteristics

In terms of improving the dynamic response characteristics of brushless AC synchronous generators, the concept of integrated design of AC exciter and rotating rectifier and their electromagnetic characteristics are studied, and the conditions and judgment methods for determining their operating modes are obtained in theoretical design and simulation design, pointing out that when the brushless excitation system operates in or is close to mode III, i.e., the rectifier always has three or four diodes in each operating cycle. The linear current amplifier characteristics can be basically achieved when the brushless excitation system is operated in mode III or is close to mode III, i.e., the rectifier always has three or four diodes alternating in each operating cycle. The impact of the key parameters of the AC exciter at different rotational speeds and temperatures on the characteristics of the linear current amplifier was explored, and an engineering prototype was manufactured. The related test verified the correctness of the concept of integrated electromagnetic design and simulation calculation. This study provides an engineered design method for enhancing the dynamic response properties of the brushless AC synchronous generators.

Design and simulation investigations of a high gain millimeter wave gyro-twystron amplifier

In this paper, the design and multimode analysis of a single cavity Ka-band gyro-twystron have been presented. The present amplifier has been studied for its beam-wave interaction by using a nonlinear multimode analysis, which has also been verified with a 3D Particle-In-Cell (PIC) simulation. A single anode magnetron injection gun (MIG) has been designed with a ∼4% velocity spread using electron optics code. The PIC simulation of the current amplifier predicted an RF output power of ∼240 kW in TE01 mode at 35 GHz. The power gain, electronic efficiency, and 3-dB bandwidth were calculated as ∼53 dB, ∼37%, and ∼2 GHz, respectively, using the electron beam of 65 kV, 10 A with the velocity ratio of 1.4. Also, a collector is designed with a heat wall loading 0.116 kW/cm2 for the proposed design.