Converter Bandwidth Research Articles

Frequency Domain Multiplexing for Microwave Kinetic Inductance Detectors: Comparing the Xilinx ZCU111 RFSoC with the New 2x2 RFSoC Board

The Xilinx ZCU111 Radio Frequency System on Chip (RFSoC) is a promising solution for reading out large arrays of microwave kinetic inductance detectors (MKIDs). The board boasts eight on-chip 12-bit / 4.096 GSPS analogue-to-digital converters (ADCs) and eight 14-bit / 6.554 GSPS digital-to-analogue converters (DACs), as well as field programmable gate array (FPGA) resources of 930,000 logic cells and 4,272 digital signal processing (DSP) slices. While this is sufficient data converter bandwidth for the readout of 8,000 MKIDs, with a 2 MHz channel-spacing, and a 1 MHz sampling rate (per channel), additional FPGA resources are needed to perform the DSP needed to process this large number of MKIDs. A solution to this problem is the new Xilinx RFSoC 2x2 board. This board costs only one fifth of the ZCU111 while still providing the same logic resources as the ZCU111, albeit with only a quarter of the data converter resources. Thus, using multiple RFSoC 2x2 boards would provide a better balance between FPGA resources and data converters, allowing the full utilization of the RF bandwidth provided by the data converters, while also lowering the cost per pixel value of the readout system, from approximately EUR2.50 per pixel with the ZCU111, to EUR1 per pixel.

Analogue predistortion lineariser control schemes for ultra‐broadband signal transmission in 5G transmitters

Analogue predistorter (APD) has gained a new significance due to the need for high bandwidth in the fifth generation (5G) communication. As predistorted signal is generated in the analogue domain, it is free from data converter bandwidth limitation and presents an attractive linearisation solution for power amplifier (PA) in the 5G base station. Furthermore, it also finds its application in the multicarrier repeater system for long-distance communication, where the baseband information is not readily available. However, the performance of the conventional APD is dependent on the appropriate control of gain and phase of the predistorted signal. The state-of-the-art work in analogue linearisation solutions mostly utilises vector multiplier for such a control. This work points out the limitations of such a scheme and proposes a novel control scheme (CS) that is capable of extracting better benefits of the APD. An experimental validation is carried out by linearising 10 W HMC8500 broadband GaN PA, excited by a eight-component carrier 160 MHz ultra-broadband long-term evolution signal. The proposed Type-II CS delivers an adjacent channel power ratio of −45.05 dBc with an improvement of 18 dB, which is 4 dB better than Type-I CS.

A Flexible Subcarrier Multiplexing System With Analog Transport and Digital Processing for 5G (and Beyond) Fronthaul

A flexible subcarrier multiplexing system combining analog transport with digital domain processing is presented. By making use of bandpass sampling and applying a systematic mapping of signals into available Nyquist zones, the multiplexing system is able to present multiple signals at the same intermediate frequency at the remote site. This simplifies the processing required for multiple antenna systems. We further propose the use of track-and-hold amplifiers at the remote site. These elements are used to extend the mapping to a mapping hierarchy, offering flexibility in frequency placement of signals and relaxation of analog-to-digital converter bandwidth and sampling rate constraints. The system allows the transport of different numerologies in a number of next generation radio access network scenarios. Experimental results for large signal multiplexes with both generic and 5th-generation mobile numerologies show error-vector magnitude performance well within specifications, validating the proposed system. Simulation results from a system model matched to these experimental results provide performance predictions for larger signal multiplexes and larger bandwidths.

Microwave photonic filter design and optimization based on stimulated Brillouin scattering using a directly modulated pump

We propose a general guideline on the design of a stimulated Brillouin scattering (SBS)-based microwave photonic filter (MPF) using a directly modulated pump. Filter gain profiles and passband ripples with waveform repetition periods of the driving current ranging from 2 to 100 ns are measured after the transmission of different fiber lengths. The results show that the filter performance has nothing to do with the fiber length, and the digital-to-analog converter bandwidth requirement for the driving current is no more than 500 MHz. Therefore, the low cost, flexible reconfiguration, and miniaturization characteristics make an SBS filter using a directly modulated pump a promising choice as an MPF.

MIMO-OFDM Radar Using a Linear Frequency Modulated Carrier to Reduce Sampling Requirements

The requirement of fast analog-to-digital (AD) and digital-to-analog (DA) converters is a challenge for high-resolution orthogonal frequency division multiplexing (OFDM) radars. This paper introduces a method to increase the modulation bandwidth of an OFDM signal by using an additional frequency modulated continuous wave carrier to reduce the requirements for the AD/DA converters while maintaining a high unambiguous velocity range. Multiplexing of transmit antennas with OFDM is still possible with the combined modulation. The presented approach is verified by simulations and measurements. A reduction of AD/DA converter bandwidth by factor eight is achieved.

A Two-Stage Reconstruction Processor for Human Detection in Compressive Sensing CMOS Radar.

Complementary metal-oxide-semiconductor (CMOS) radar has recently gained much research attraction because small and low-power CMOS devices are very suitable for deploying sensing nodes in a low-power wireless sensing system. This study focuses on the signal processing of a wireless CMOS impulse radar system that can detect humans and objects in the home-care internet-of-things sensing system. The challenges of low-power CMOS radar systems are the weakness of human signals and the high computational complexity of the target detection algorithm. The compressive sensing-based detection algorithm can relax the computational costs by avoiding the utilization of matched filters and reducing the analog-to-digital converter bandwidth requirement. The orthogonal matching pursuit (OMP) is one of the popular signal reconstruction algorithms for compressive sensing radar; however, the complexity is still very high because the high resolution of human respiration leads to high-dimension signal reconstruction. Thus, this paper proposes a two-stage reconstruction algorithm for compressive sensing radar. The proposed algorithm not only has lower complexity than the OMP algorithm by 75% but also achieves better positioning performance than the OMP algorithm especially in noisy environments. This study also designed and implemented the algorithm by using Vertex-7 FPGA chip (Xilinx, San Jose, CA, USA). The proposed reconstruction processor can support the real-time radar image display with a throughput of 28.2 frames per second.

Digital dispersion pre‐compensation based on intensity modulator and phase modulator for PAM‐4 in short‐reach fibre communications

High-speed PAM-4 is a promising way for future low-cost short-reach fibre communications. However, for 1550 nm transmission with the lowest attenuation for standard single-mode fibre (SSMF), the fibre dispersion-induced inter-symbol interference (ISI) becomes non-linear in direct detection. Dispersion pre-compensation at the transmitter side is necessary to avoid such non-linear ISI. Different from previous methods to generate the vector signal from dispersion pre-compensation using IQ modulators, in this study a digital dispersion pre-compensation (DDPC) scheme based on an intensity modulator (IM) plus a phase modulator (PM) is studied. Taking into account the digital-to-analogue converter (DAC) bandwidth limit on the vector signal generation, anti-aliasing filtering on both the magnitude signal and the phase signal should be applied. The error rate performance of the IM-PM based DDPC scheme is analysed in detail using numerical simulations. For 50 Gb/s PAM-4 transmission at 1550 nm over SSMF, over 50 km fibre transmission can be supported if the two DACs have enough bandwidth larger than 17.5 GHz. If the DAC bandwidth is limited to 15 GHz, it is also possible to transmit over 20 km SSMF. Meanwhile, it is verified that practical 5-bit DAC resolution is enough for the IM-PM based DDPC scheme to work for a wide range of SSMF lengths.

Design of a Two-Phase Buck Converter With Fourth-Order Output Filter for Envelope Amplifiers of Limited Bandwidth

The use of techniques such as envelope tracking (ET) and envelope elimination and restoration (EER) can improve the efficiency of radio frequency power amplifiers (RFPA). In both cases, high-bandwidth DC/DC converters called envelope amplifiers (EA) are used to modulate the supply voltage of the RFPA. This paper addresses the analysis and design of a modified two-phase Buck converter optimized to operate as EA. The effects of multiphase operation on the tracking capabilities are analyzed. The use of a fourth-order output filter is proposed to increase the attenuation of the harmonics generated by the PWM operation, thus allowing a reduction of the ratio between the switching frequency and the converter bandwidth. The design of the output filter is addressed considering envelope tracking accuracy and distortion caused by the side bands arising from the nonlinear modulation process. Finally, the proposed analysis and design methods are supported by simulation results, as well as demonstrated by experiments obtained using two 100-W, 10-MHz, two-phase Buck EAs capable of accurately tracking a 1.5-MHz bandwidth OFDM signal.

An optimized ultrasound digital beamformer with dynamic focusing implemented on FPGA.

We present a resource-optimized dynamic digital beamformer for an ultrasound system based on a field-programmable gate array (FPGA). A comprehensive 64-channel receive beamformer with full dynamic focusing is embedded in the Altera Arria V FPGA chip. To improve spatial and contrast resolution, full dynamic beamforming is implemented by a novel method with resource optimization. This was conceived using the implementation of the delay summation through a bulk (coarse) delay and fractional (fine) delay. The sampling frequency is 40 MHz and the beamformer includes a 240 MHz polyphase filter that enhances the temporal resolution of the system while relaxing the Analog-to-Digital converter (ADC) bandwidth requirement. The results indicate that our 64-channel dynamic beamformer architecture is amenable for a low power FPGA-based implementation in a portable ultrasound system.

Dual-polarization multi-band optical OFDM transmission and transceiver limitations for up to 500 Gb/s uncompensated long-haul links.

A number of critical issues for dual-polarization single- and multi-band optical orthogonal-frequency division multiplexing (DP-SB/MB-OFDM) signals are analyzed in dispersion compensation fiber (DCF)-free long-haul links. For the first time, different DP crosstalk removal techniques are compared, the maximum transmission-reach is investigated, and the impact of subcarrier number and high-level modulation formats are explored thoroughly. It is shown, for a bit-error-rate (BER) of 10(-3), 2000 km of quaternary phase-shift keying (QPSK) DP-MB-OFDM transmission is feasible. At high launched optical powers (LOP), maximum-likelihood decoding can extend the LOP of 40 Gb/s QPSK DP-SB-OFDM at 2000 km by 1.5 dB compared to zero-forcing. For a 100 Gb/s DP-MB-OFDM system, a high number of subcarriers contribute to improved BER but at the cost of digital signal processing computational complexity, whilst by adapting the cyclic prefix length the BER can be improved for a low number of subcarriers. In addition, when 16-quadrature amplitude modulation (16QAM) is employed the digital-to-analogue/analogue-to-digital converter (DAC/ADC) bandwidth is relaxed with a degraded BER; while the 'circular' 8QAM is slightly superior to its 'rectangular' form. Finally, the transmission of wavelength-division multiplexing DP-MB-OFDM and single-carrier DP-QPSK is experimentally compared for up to 500 Gb/s showing great potential and similar performance at 1000 km DCF-free G.652 line.

Heterodyne detection and transmission of 60-Gbaud PDM-QPSK signal with SE of 4b/s/Hz.

We experimentally demonstrate 8 × 240-Gb/s super-Nyquist wavelength-division-multiplexing (WDM) polarization-division-multiplexing quadrature-phase-shift-keying (PDM-QPSK) signal transmission on a 50-GHz grid with a net spectral efficiency (SE) of 4b/s/Hz adopting hardware-efficient simplified heterodyne detection. 9-ary quadrature-amplitude-modulation-like (9QAM-like) processing based on multi-modulus blind equalization (MMBE) is adopted to reduce analog-to-digital converter (ADC) bandwidth requirement and improve receiver sensitivity. The transmission distance at the soft-decision forward-error-correction (SD-FEC) threshold of 2 × 10(-2) is 2 × 420 km based on digital post filtering while largely extended to over 5 × 420 km based on 9QAM-like processing, which well illustrates 9QAM-like processing is more efficient for heterodyne coherent WDM system. Moreover, only two ADC channels are needed for simplified heterodyne detection of one 60-Gbaud PDM-QPSK WDM channel, and thus only one commercial oscilloscope (OSC) with two input ports can work well for each WDM channel.

Performance Assessment of Noise-Suppressed Nyquist-WDM for Terabit Superchannel Transmission

This paper focuses on terabit superchannel transmission with enhanced network reach by using an emerging noise-suppressed Nyquist wavelength division multiplexing (NS-N-WDM) technique for polarization multiplexing quadrature phase shift keying subchannels at different symbol rate to subchannel spacing ratios up to 1.28, and for the first time, it was compared experimentally with the transmission capability of no-guard-interval coherent optical orthogonal frequency division multiplexing (NGI-CO-OFDM) on the same testbed. At 2 × 10-3 bit error ratio, the maximum reachable distance is 3200 and 2800 km SMF-28 with erbium-doped-fiber-amplifier-only amplification for NGI-CO-OFDM and NS-N-WDM terabit superchannels, respectively, at 100 Gb/s/ch. For 11 ntn112 and 11 × 128 Gb/s/ch NS-N-WDM transmission under assumption of different coding gain with hard-decision and soft-decision forward error correction, their maximum achievable distance was found to be equivalent, which are 2100 and 2170 km, respectively, both were achieved by using digital noise filtering and 1-bit maximum likelihood sequence estimation at the receiver DSP. In addition, the back-to-back characteristics of NS-N-WDM superchannel such as analog-to-digital converter bandwidth requirement and its tolerance to unequal subchannel power were experimentally evaluated and studied.

PDM-Nyquist-32QAM for 450-Gb/s Per-Channel WDM Transmission on the 50 GHz ITU-T Grid

We discuss the generation and transmission of 450 Gb/s wavelength-division multiplexed (WDM) channels over the standard 50 GHz ITU-T grid optical network at a net spectral efficiency of 8.4 b/s/Hz. This result is accomplished by the use of Nyquist-shaped, polarization-division-multiplexed (PDM) 32-quadrature amplitude modulation (QAM) and both pre- and post-transmission digital equalization. To overcome the limitation of available digital-to-analog converter bandwidth, a novel method is introduced for the generation of the five-subcarriers of the 450 Gb/s signal. Nearly ideal Nyquist pulse-shaping (roll-off factor = 0.01) enables guard bands of only 200 MHz between subcarriers. To mitigate the narrow optical filtering effects from the 50 GHz-grid reconfigurable optical add-drop multiplexer (ROADM), a broadband optical pulse-shaping method has been proposed and demonstrated. By combined use of electrical and optical shaping techniques, transmission of 5 × 450 Gb/s PDM-Nyquist 32 QAM on the 50 GHz grid over 800 km and one 50 GHz-grid ROADM has been successfully demonstrated.

Theoretical and experimental investigation of compatible SSB modulation for single channel long-distance optical OFDM transmission

We present the first experimental demonstration of compatible single-sideband (compatible-SSB) modulated OFDM optical system at 11.1Gb/s data rate for long distance transmission over 675 km uncompensated standard single-mode fiber. Compatible-SSB modulation employing a simple dual-drive Mach-Zehnder modulator (MZM) in the transmitter and direct-detection at the receiver provides an OFDM system implementation with reduced complexity. It does not require a guard-band between the carrier and the OFDM sideband and so makes full use of available digital-to-analog converter (DAC) bandwidth. We demonstrate digital pre-compensation applied in the transmitter to correct MZM nonlinear transfer function and to improve the system transmission performance. We show that optimum modulation index value decreases with increasing transmission distance. We have also investigated the impact of self-phase modulation (SPM) on the system performance, and show that a compatible-SSB modulated system is less vulnerable to SPM in comparison to the conventional offset-SSB modulation at the same data rate.

Single-carrier sinusoidal PWM-equivalent selective harmonic elimination for a five-level voltage source converter

The paper presents a new variation of selective harmonic elimination pulse-width modulation (SHE-PWM) technique suitable for a high-power five-level converter used in constant frequency utility applications. The governing system of equations associated with the elimination of specific harmonics is defined based on an equal number of switching transitions when compared against the single-carrier sinusoidal PWM (SC-SPWM) technique. For this paper, it is assumed that the modulating signal (triangular carrier) of the equivalent SC-SPWM method has twenty per unit frequency. The switching transitions for every quarter period are therefore distributed between the converter levels according to the modulation index of SC-SPWM. It is confirmed that the proposed technique offers significantly higher converter bandwidth and higher dc bus utilization for the same switching transitions. Furthermore, the proposed SHE-PWM offers better harmonic performance compared to its SC-SPWM counterpart. Selected solutions for the switching transitions are presented and verified experimentally in order to confirm the effectiveness of the proposed technique.

A 4-W Master–Slave Switching Amplitude Modulator for Class-E1 EDGE Polar Transmitters

For Class-E1 EDGE polar transmitters, we proposed a 4-W master-slave switching amplitude modulator (MS-SAM) for both high efficiency and wide bandwidth. It consists of a combination of two step-down modules with different switching frequencies and different switch sizes. The master module was designed for wide bandwidth and the slave module for high efficiency. The paper also presents a new current-sensing circuit based on a sample-and-hold circuit operable under a high switching frequency (40 MHz). We showed the topologies and operating principles. The chip was fabricated in a standard 0.35-m CMOS process with an area of 6.45 mm . The MS-SAM could drive the amplifiers of up to 4-W RF power in the experiment. We obtained an efficiency of 89%, and the converter's bandwidth was wide enough to meet the EDGE spectral requirements.

A Five-Level Symmetrically Defined Selective Harmonic Elimination PWM Strategy: Analysis and Experimental Validation

A five-level symmetrically defined multilevel selective harmonic elimination pulsewidth modulation (MSHE-PWM) strategy is reported in this paper. It is mathematically expressed using Fourier-based equations on a line-to-neutral basis. An equal number of switching transitions when compared against the well-known multicarrier phase-shifted sinusoidal PWM (MPS-SPWM) technique is investigated. For this paper, it is assumed that the four triangular carriers of the MPS-SPWM method have nine per unit frequency resulting in seventeen switching transitions for every quarter period. For the proposed MSHE-PWM method, this allows control of sixteen harmonics and the fundamental. It is confirmed that the proposed MSHE-PWM offers significantly higher converter bandwidth in the standard range of the modulation indices. Moreover, when the bandwidth is reduced to be equal with the one offered with the MPS-PWM, the modulation index can be increased resulting in a higher gain and at a reduced switching frequency overall. Selected solutions for the switching transitions are presented and verified experimentally in order to confirm the effectiveness of the proposed technique.

Protocol converter synthesis

A system-on-a-chip is an interconnection of different pre-verified IP hardware blocks, which communicate using complex protocols. The integration of IP blocks requires some glue logic to interface otherwise incompatible datapaths. This glue logic is called a protocol converter and its manual design proves to be a tedious and time-consuming task. Automatic synthesis is therefore important, but for optimal system-level design it is necessary to consider not just the correctness, but also the quality (in terms of bandwidth and latency of data transfer) of the converter. A good solution to this problem will allow greater use of protocol-level abstraction as a design tool in system design and synthesis. Results are presented on automatic synthesis of a converter between two protocols. It is shown how converter logic which is bandwidth-optimal can be synthesised for datapaths with an arbitrary number of data ports each of which has arbitrary-size first-in first-out (FIFO) storage. An extension of the product FSM converter synthesis algorithm to include FIFO data-paths is presented. In addition the converter bandwidth is identified as a mean cycle graph problem which is solved using maximum mean cycle graph algorithms.

Numerical modelling of 8mm TM01-TE11 mode converter

A numerical study of TM01-TE11 circular waveguide mode converter, with its optimized size and structure, is presented in this paper. Many factors such as spurious modes, backward wave, perturbation functions of waveguide axis or radius, phase-rematching techniques and ohmic losses are taken into account for the influence to mode converter's efficiency and bandwidth. And the dimensions of an optimized model (f0=35GHz. with input and output radius a0=13.6mm) are given.

Time interleaved converter arrays

High-speed monolithic converters normally use a variation of the flash technique, which 2/SUP n/ comparators in parallel to obtain a fast n-bit conversion. Although this method allows for high converter bandwidth, it is not very area efficient, and results in large die sizes for even modest resolution converters. In the technique presented here, a number of small but area efficient converters are operated in a time-interleaved fashion to achieve the bandwidth of a flash circuit, but in a substantially smaller area. This technique is analyzed with respect to noise and distortion resulting from nonideal array characteristics, and is demonstrated by way of a four-way array test-chip. This chip consists of four time-interleaved 7-bit weighted-capacitor A/D converters fabricated in a 10 /spl mu/m metal-gate CMOS process. Full 7-bit linearity is maintained up to a 2.5 MHz conversion rate, with operation at reduced linearity continuing to approximately 4 MHz. The design of this chip, and anticipated characteristics if fabricated in a modern 4-5 /spl mu/m process are described.