Conventional SVPWM Research Articles

A simple switching on-time calculation revision in multilevel inverter-space vector modulation to achieving extended voltage boundary operation

In inverters’ pulse width modulation techniques (PWM) the Space Vector PWM (SVPWM) is a smart contestant due to its direct control in nature with variables which provide the straight forward finds to each inverter switching vector. The industrial drives are acquainting to use SVPWM owing extended speed –torque region operations. However, the extended SVPWM operation is uses much mathematical calculation to predict the switching on-times, which demands high digital platform. In order to reduce this calculation in this paper a simple on-time calculation based SVPWM is proposed. The proposed SVPWM is developed for three-level multilevel inverter and the space perspective of vector analysis are established and explained. The over modulation enhances the proper power utilization capacity of voltage source inverter thereby improve the inverter output voltage and load. This proposed method tailed the similar mathematical practice as conventional two-level SVPWM for calculating sector identification and triangle determination. The approach finds the circular and hexagonal boundary on-time based on the straightforward reference vector position identification and calculates directly the switching pulse patterns for the inverter devices using an expression based on the definition of the duty cycle. The performance of the proposed SVM is simulated by MATLAB 11.b simulation software and validated with laboratory setup 2 kW, 12 switch neutral point clamped (NPC)-MLI fed 1.5 HP squirrel cage 3-phase induction motor open loop v/f control drive. The simulation and experimental results are closure and confirming the advantages of the proposed SVM method. The proposed scheme can be extended to n-level inverter and also applicable to cascaded H-bridge topology.

A New SVPWM Technique to Reduce the Inductor Current Ripple of Three-Phase Z-Source Inverter

This paper proposes the use of advanced bus clamping switching sequences to reduce the impedance network inductor current ripple of the three-phase Z -source inverter (ZSI). Proposed technique is named as ABC4_MCB. MCB denotes that the maximum constant boost control method is used for the voltage boosting. One of the conventional space vector pulsewidth modulation of ZSI, “ZSVM6,” is termed as ZSVM6_MCB under the maximum constant boost control method. The switching sequences of ABC4_MCB technique are designed in such a way that it offers around 34% reduction in the maximum instantaneous inductor current ripple as compared to the ZSVM6_MCB for the equal average switching frequency. The factor of percentage reduction in the inductor current ripple using the proposed technique is constant over the entire range of shoot through duty ratio (0–0.48). Theoretical findings have been verified using simulation and experimental results.

Four-Leg Converter for Reluctance Machine With DC-Biased Sinusoidal Winding Current

This paper proposes a novel four-leg converter topology and the corresponding SVPWM strategy for a reluctance machine with DC-biased sinusoidal winding current. Compared with the traditional open-winding inverter topology, the number of the power devices and gate driver required for the four-leg converter topology are reduced by one-third, and the power loss is reduced. With the proposed four-leg converter, the cost of the motor drive is reduced and the power density is improved. The vector control and modulation models of the proposed four-leg converter are presented to control the winding current with both AC and DC components. With the proposed four-leg SVPWM strategy, the four-leg converter can achieve the same DC voltage utilization as an open-winding inverter. In addition to the ability to generate αβ -axis voltages, as same with conventional SVPWM, the proposed SVPWM can also generate γ -axis voltages without generating additional zero-sequence alternating voltages on the stator windings. The validity of the proposed converter and the corresponding modulation strategy has been demonstrated by simulation and experiment. The power loss and performance of the four-leg converter are compared with the traditional converter. Contrasting experiments show that the proposed topology can reduce power loss by about 15% at rated operation and achieve the same performance as open-winding inverters.

Current Harmonic Reduction Based on Space Vector PWM for DC-Link Capacitors in Three-Phase VSIs Operating Over a Wide Range of Power Factor

This paper proposes a novel space vector pulsewidth modulation (SVPWM) strategy to reduce the switching-frequency-order inverter input current harmonics for a two-level three-phase voltage-source inverter operating over a wide range of the load power factor. The fluctuation of the inverter input current around its average value is minimized by optimization of the utilized voltage space vectors to reduce the inverter input current harmonics, which extends the lifetime of the dc-link electrolytic capacitors. Furthermore, the proposed strategy can be adapted to a motor drive system, where a wide variation of the load power factor is desired, by changing the optimized combinations of the voltage space vectors according to the polarities of the output phase currents. Experiments with the application of the novel SVPWM confirm that the inverter input current harmonics is reduced by up to 29.5% compared to that with the conventional SVPWM strategy. Moreover, the analytical and experimental results confirm that the proposed SVPWM reduces the inverter input current harmonics in both driving mode and regenerative braking mode, as well as with any load power factor.

SVPWM Strategy Based on the Hysteresis Controller of Zero-Sequence Current for Three-Phase Open-End Winding PMSM

Owing to high driving power, good controllability, and strong fault-tolerant ability, a three-phase open-end winding permanent magnet synchronous motor driven by a dual inverter with common dc bus is considered as a competitive solution. However, a path for zero-sequence current is provided in this drive topology. Thus, the system loss would be increased, and the maximum output power is limited. In order to suppress the zero-sequence current, a novel space vector pulsewidth modulation (SVPWM) strategy based on the hysteresis controller of zero-sequence current is proposed in this paper. The voltage vectors, whose polarity of zero-sequence voltages (ZSVs) is opposite with the polarity of zero-sequence current, are selected as the basic voltage vectors of SVPWM for fundamental plane. Meanwhile, the linear modulation range is analyzed. According to the analysis results, the proposed strategy has the advantage of wide linear modulation range of ZSV under the condition of high fundamental modulation ratio. The experimental results show that the zero-sequence current is effectively suppressed by the proposed modulation strategy. Furthermore, the comparative evaluation of the proposed modulation strategy, the conventional SVPWM, the SVPWM with zero ZSVs, and the zero vector redistribution SVPWM with zero-sequence current proportional-resonant controller is conducted to demonstrate the superiority of the proposed strategy.

Design and implementation of adaptive SVPWM algorithm for multilevel inverters in renewable energy applications

This paper presents a design and an implementation of a generalized adaptive multi-objectives Space Vector Pulse Width Modulation (SVPWM) algorithm for multilevel inverters (MLIs). SVPWM is considered as an influential and resilient tool for optimizing the performance of MLIs. Innumerable objectives can be attained by the proper selection of switching times and states. The performance of MLIs can be improved, as well. Hitherto, achieving multiple objectives could be a challenging mission in the SVPWM algorithms scheming. In this paper, an objective function has been demarcated based on the weighted sum of the desired performance parameters. Then, considering this chosen objective function, the proposed algorithm nominates the optimum switching sequence from valid switching sequences. With this algorithm, the objective function can be weighted for the sake of reaching different performance parameter combinations; to outfit different applications and operating points. Furthermore, different SVPWM design cases for enhancing the operation of MLIs can be accomplished. Voltage balance over the DC-link capacitors in MLIs has been implemented, as a study case, using the proposed SVPWM. Both simulation and experimental platforms have been utilized. The results visibly illustrate the generality of the proposed algorithm, and it can improve different performance limitations of MLI such as; achieving a fast balance of the capacitors voltages with reduced power losses. The selected case study has achieved 21.62% faster voltage balance with 17.61% reduction in the power losses compared to conventional SVPWM method. Notwithstanding its straightforwardness to be implemented without complex calculations, the proposed algorithm can maintain the high operating efficiency of the MLI system for a wide range of operation.

Modulated Model-Predictive Control With Optimized Overmodulation

Finite-set model-predictive control (FS-MPC) has many advantages, such as a fast dynamic response and an intuitive implementation. For these reasons, it has been thoroughly researched during the last decade. However, the waveform produced by FS-MPC has a switching component whose spread spectrum remains a major disadvantage of the strategy. This paper discusses a modulated model-predictive control that guarantees a spectrum switching frequency in the linear modulation range and extends its optimized response to the overmodulation region. Due to the equivalent high gain of the predictive control and to the limit on the voltage actuation of the power converter, it is expected that the actuation voltage will enter the overmodulation region during the large reference changes or in response to load impacts. An optimized overmodulation strategy that converges toward the FS-MPC ’s response for large tracking errors is proposed for this situation. This technique seamlessly combines PWM’s good steady-state switching performance with FS-MPC ’s high dynamic response during large transients. The constant switching frequency is achieved by incorporating modulation of the predicted current vectors in the model-predictive control of the currents in a similar fashion as the conventional space-vector pulsewidth modulation is used to synthesize an arbitrary voltage reference. Experimental results showing the proposed strategy’s good steady-state switching performance, its FS-MPC -like transient response, and the seamless transition between modes of operation are presented for a permanent magnet synchronous machine drive.

GA–PSO approach for optimising space‐vector PWM control sequence

Space-vector pulse width modulation (SVPWM) provides several degrees of freedom, which can be optimised to improve the harmonic performance of the three-phase inverter. Genetic algorithm (GA) and immune algorithm (IA) are the two classical probabilistic optimisation algorithms, which are simple in structure and do not need an accurate mathematical model. However, the optimisation accuracy and reliability are low when they optimise the high-dimensional non-linear problem, such as SVPWM control sequence of the three-phase inverter. To cope with these problems, a genetic algorithm–particle swarm optimisation (GA–PSO) is proposed here, which introduces the mutation of GA into discrete PSO. The global and local optimisation ability of the algorithm is greatly improved by the introduction of mutation operation. The results of MATLAB/SIMULINK simulation show that the weighted total harmonic distortion (WTHD) by the optimal SVPWM control sequence based on GA–PSO is 0.199%, which is much better than that of the PSO, IA, and GA. The average generation number of GA–PSO is only 1/500 of IAs. Further experimental data verify that the WTHD by the optimal SVPWM control sequence based on GA–PSO is lower than that of conventional SVPWM and IA.

Hybrid SVPWM Scheme to Minimize the Common-Mode Voltage Frequency and Amplitude in Voltage Source Inverter Drives

In this paper, a hybrid space vector pulsewidth modulation synthesis is proposed to lower the frequency and amplitude of the common-mode voltage (CMV). The conventional space vector pulsewidth modulation (SVPWM) techniques for inverters generate a high-frequency CMV. The CMV causes significant bearing current flowing through the path to the ground and leads to premature bearing failure, especially in high switching frequency drive systems. Furthermore, previously proposed CMV reduction studies focus on the reduction of CMV amplitude, leaving a high-frequency CMV. The proposed control algorithm divides each sector in the space vector hexagon into three segments based on the modulation index and the angle of the reference voltage vector. In each segment, the space vectors that produce minimal CMV are selected to synthesize the reference voltage vector. A fair comparison with the conventional CMV reduction methods is made by comparing the CMV characteristics, harmonic distortion factor, dc current ripple, and the switching losses for each method. Both simulation and experimental results have validated the effectiveness of the proposed approach.

Torque Ripple Suppression Method With Reduced Switching Frequency for Open-Winding PMSM Drives With Common DC Bus

Torque ripple caused by zero-sequence current (ZSC) and relatively high switching frequency severely worsens the operating performance of an open-winding permanent-magnet synchronous machine (OW-PMSM) system with common dc bus. In this paper, a novel q -axis current injection method based on the angle-shift-based voltage distribution is proposed for the OW-PMSM system with common dc bus. With the proposed method, torque ripple caused by ZSC can be counteracted by the torque component generated by the injected q -axis current. Meanwhile, the corresponding modulation range is analyzed to investigate the availability of the proposed method. Moreover, in order to reduce the switching frequency, zero vector (111) is no longer necessary to compensate the zero-sequence component and conventional space vector pulsewidth modulation (PWM) with zero vectors (000) and (111) can be simplified. The switching actions in one PWM period can be reduced from 12 to 8. The comparison of losses shows that this strategy can effectively improve the efficiency under both heavy load and high switching frequencies. Finally, the effectiveness of the proposed method is validated through an OW-PMSM experiment with common dc bus.

An Improved Space Vector Pulse Width Modulation for Nine-Level Asymmetric Cascaded H-Bridge Three-Phase Inverter

This paper presents an improved space vector pulse width modulation (SVPWM) for nine-level cascaded H-bridge inverter with unequal DC voltage sources. This technique is based on the use of $$60^{\circ }$$ spaced r–s coordinate system to achieve SVPWM of multilevel three-phase inverter. In order to realize nine-level inverter, conventional SVPWM requires 1296 lookup tables, which is difficult to realize in the form of lookup tables, but the proposed technique does not require any lookup tables in the process of SVPWM realization, and it is generalized algorithm for any inverter levels. Hence, the system memory requirement is very less. The proposed modulation technique improves the nature of inverter output voltage and its total harmonic distortion value. Simulation results have been carried out using MATLAB/SIMULINK software tool. A comparative analysis is performed with classical pulse width modulation (PWM) techniques like sinusoidal PWM and third harmonic injection PWM at different modulation indices. To validate the simulation results and to confirm the practicality of the proposed control algorithm, experimental verification has been done.

PWM Frequency Voltage Noise Cancelation in Three-Phase VSI Using the Novel SVPWM Strategy

This paper has focused on the novel space vector pulse-width modulation (SVPWM) strategy for the two-level three-phase inverter, which could eliminate the harmonics nearby pulse width modulation (PWM) frequency. Ear-piercing high-frequency electromagnetic noise from motor is common due to PWM technique. The proposed SVPWM is able to remove the high-frequency harmonics located nearby the PWM frequency and other odd multiples by changing the original switching states. The unpleasant acoustic noise could be removed with the novel strategy whose PWM frequency is selected near 10 kHz. By comparison, it is near 20 kHz for conventional SVPWM to achieve the similar performance. Therefore, the switching losses are significantly reduced using the novel method. Furthermore, the proposed technique neither changes the characteristics of the fundamental wave nor employs the additional circuits in the drive. At last, the effectiveness of proposed strategy is verified by simulation and experiment.

A Novel SVPWM for Three-Level NPC Inverter Based on m-Mode Controllability

A novel space vector pulse width modulation (SVPWM) strategy for three-phase four-wire neutral-point-clamped (NPC) inverter is proposed in this paper. The m -mode controllability of a three-phase four-wire NPC inverter, which is modeled as a switched linear system, is investigated. Then, on the basis of analysis of the m -mode controllability, taking the three-level property and the continuity of switching sequence into account, the controllable sets with the three-level property can be a new solution for the NPC inverter. With the sets of less operating modes, new modulation strategies named 18-mode SVPWM strategy, including 18-mode SVPWM(I), 18-mode SVPWM(II), and 18-mode SVPWM(III), are put forward. Compared with the conventional SVPWM strategy, the switching frequencies of the proposed 18-mode SVPWMs modulation strategy are significantly reduced by one-third. Therefore, the overall losses of the system can be reduced and the performance of the inverter can be improved. Finally, the simulation and the experiment results verify the correctness of the proposed approach.

A Modified Space Vector PWM Approach for Nine-Level Cascaded H-Bridge Inverter

This paper presents a modified space vector pulse width modulation (MSVPWM) technique for nine-level cascaded H-bridge (CHB) inverter. Based on a modular structure and absence of capacitor balancing problems, CHB inverter topology is preferred. Nowadays, space vector PWM (SVPWM) control scheme has achieved higher attention among different PWM techniques. In general, SVPWM method is realized based on disintegrating higher-level hexagons into a number of two-level hexagons. Compared to conventional SVPWM technique, the proposed MSVPWM technique reduces the computational burden and memory requirement involved in the realization of nine-level SVPWM. This is achieved by reducing the number of two-level hexagons without losing the inverter output voltage profile. Also a further modified space vector pulse width modulation technique is presented, which greatly reduces the computation efforts. The proposed SVPWM techniques are applied to a nine-level CHB inverter by using MATLAB/SIMULINK software tool and are compared with carrier-based sinusoidal pulse width modulation (SPWM) technique to validate the proposed techniques. The proposed SVPWM schemes produce lower harmonic distortion and higher DC bus utilization compared to SPWM technique. To verify the practicality of the proposed SVPWM techniques, experimental results are presented on nine-level CHB inverter.

Impact of Slim DC Capacitance on Floating Capacitor H-bridge Motor Drive

This paper discusses the impact of small dc capacitance in a motor drive using a floating capacitor H-bridge topology. The proposed topology is intended for applications where variable frequency control is not required. Special attention is paid on investigating the second-order dc capacitor voltage ripples, whose influence on the induction motor as well as on the motor drive itself is of importance. This issue is addressed in this paper through rigorous mathematical formulations. It is found that by inverting the second-order dc ripple voltage using the conventional SVPWM, no harmful harmonics will be generated in the motor line voltage. This demonstrates the possibility of drastically reducing the dc capacitance of the proposed system. Induction motor as well as H-bridge performance with respect to different dc capacitance values is demonstrated by experiments, which lays the foundation for cost reduction and reliability enhancement of the proposed system.

A Novel Approach for Space Vector Based PWM Algorithm for Diode Clamped Three level VSI Fed Induction Motor Drive

<p>Performance of a voltage source inverter depends on pulse width modulation algorithms. Various algorithms exist for conventional space vector as well as space vector based bus clamped pulse width modulation for multilevel inverter in the literature. In this paper appropriate region selection algorithm for conventional space vector pulse width modulation (CSVPWM) and bus clamped pulse width modulation (BCPWM) techniques are proposed for diode clamped three level voltage source inverter. The proposed techniques are implemented on a three level voltage source inverter fed induction motor drive for open loop operation. The schemes are simulated in MATLAB/SIMULINK environments. The merit of proposed region selection algorithm is tested and verified through simulation result. Further performance comparisons between SVPWM and BCPWM for different modulation index are discussed. </p>

Novel Eliminated Common-Mode Voltage PWM Sequences and an Online Algorithm to Reduce Current Ripple for a Three-Level Inverter

A novel carrier-based zero common-mode voltage (ZCMV) pulse-width-modulation (PWM) algorithm for a three-level (3L) neutral-point-clamped (NPC) inverter based on a group of modified ZCMV PWM sequences is proposed. In a half-carrier cycle containing four consecutive states, one among the three ZCMV switching states is applied twice. This paper proposes four novel ZCMV PWM sequences in addition to those that are realized from switching state arrangements in PWM techniques for the conventional two-level inverter. The harmonic characteristics due to those sequences are investigated in detail. Then, a simple online algorithm to minimize the root mean square current ripple, which can be advantageously extended for an n -inverter, is proposed. Harmonic performance and switching loss characteristic of the proposed ZCMV PWM have been compared to those of a conventional space-vector PWM and a three-state ZCMV PWM with reduced current ripple. Comparative analytical results verified by experimentation have shown that the proposed PWM scheme reduces the current harmonic distortion considerably in a high modulation index range of a 3L NPC inverter.

A Hybrid PWM-Based Field Weakening Strategy for a Hybrid-Inverter-Driven Open-Winding PMSM System

This paper proposes a hybrid pulse width modulation (PWM) based field weakening control strategy for a hybrid-inverter-driven open-winding (OW) permanent magnet synchronous motor (PMSM) system. The hybrid-inverter consists of two voltage source inverters, one is connected to a dc voltage source and named as main inverter (MI), and the other is connected to a floating capacitor and called compensation inverter (CI). A novel hybrid PWM technique is proposed for the hybrid-inverter, in which a double-vector-based PWM is applied to the MI to reduce the switching frequency, and the conventional space vector PWM is applied to the CI to compensate the reactive power. Furthermore, a field weakening (FW) control strategy based on the hybrid PWM technique is proposed to better utilize the dc-link voltage and extend the operation range of the OW-PMSM system. Simulation and experimental studies are carried out to verify the high efficiency and wide speed range of the proposed strategy.

A Survey on Space-Vector Pulse Width Modulation for Multilevel Inverters

The selection of an appropriate modulation scheme plays a vital role to assure the performance of multilevel inverters. Space vector pulse width modulation (SVPWM) is more efficient among all other pulse width modulation (PWM) techniques due to its key characteristics like better DC voltage utilization, switching losses reduction and easiness in digital implementation. The conventional SVPWM scheme presents some computational complexities due to redundant switching states and large number of space vectors. This paper summarizes five different SVPWM techniques for multilevel inverters which are α-β frame, g-h frame, K-L frame, α′-β′ frame and SVPWM based on imaginary coordinate system. g-h frame and K-L frame are based on 60° and 120° coordinates system respectively. To compare the result of these SVPWM schemes, the complex calculations of conventional SVP-WM are converted into simplified line voltages form. The comparison results validate all the SVPWM techniques, but the SVPWM based on imaginary coordinate is found more simple in duty ratio calculations, easier to understand and provides a better control for zero-sequence component for any level of inverter.

Generalized Minimum Common-Mode Voltage PWM for Two-Level Multiphase VSIs Considering Reference Order

A minimum common-mode voltage (CMV) pulse-width modulator (MCMV_PWM) is proposed for generalized two-level N -phase voltage-source inverters (VSIs) with odd phase numbers. The CMV engenders the breakdown of winding insulation, electromagnetic interference, and leakage currents. Recently, many CMV reduction/elimination PWMs have been widely discussed, but those discussions have mainly focused on the topologies of multilevel inverters or dual-inverter drives for open-ended windings. Therefore, in this study, a two-level multiphase VSI that can be applied to multiphase motor drives, in general, is considered. The relation between switching states and the CMV is derived first. Subsequently, the CMV is minimized using two different leg distributions: double-sided and central distributions. Consequently, for an N -phase VSI, the proposed method reduces the maximum CMV to V dc/(2 N ); that CMV is lower than the maximum CMV of the conventional space-vector PWM (SVPWM), namely V dc/2. In experiments, five-phase and seven-phase VSIs were constructed. The waveforms of the CMV, phase voltage, and phase current produced by the SVPWM and the proposed MCMV_PWM confirm the practicality of CMV minimization.