A Modified Space Vector PWM Approach for Nine-Level Cascaded H-Bridge Inverter

Abstract

This paper presents a modified space vector pulse width modulation (MSVPWM) technique for nine-level cascaded H-bridge (CHB) inverter. Based on a modular structure and absence of capacitor balancing problems, CHB inverter topology is preferred. Nowadays, space vector PWM (SVPWM) control scheme has achieved higher attention among different PWM techniques. In general, SVPWM method is realized based on disintegrating higher-level hexagons into a number of two-level hexagons. Compared to conventional SVPWM technique, the proposed MSVPWM technique reduces the computational burden and memory requirement involved in the realization of nine-level SVPWM. This is achieved by reducing the number of two-level hexagons without losing the inverter output voltage profile. Also a further modified space vector pulse width modulation technique is presented, which greatly reduces the computation efforts. The proposed SVPWM techniques are applied to a nine-level CHB inverter by using MATLAB/SIMULINK software tool and are compared with carrier-based sinusoidal pulse width modulation (SPWM) technique to validate the proposed techniques. The proposed SVPWM schemes produce lower harmonic distortion and higher DC bus utilization compared to SPWM technique. To verify the practicality of the proposed SVPWM techniques, experimental results are presented on nine-level CHB inverter.