Conventional Power Factor Correction Research Articles

Empirical Investigation of a Single-phase Input Switched AC-DC Boost Converter with Improved Power Quality

The Boost converter topology is most widely used for power factor correction (PFC) converters. The conventional passive Boost PFC converter inherently suffers from the lack of controllability and non-ideal characteristics of the diode-bridge rectifier. Replacing diodes with active switch(es) offers viable solutions but increases the circuit complexity. Addressing this trade-off, a novel design of a single–phase input switched AC to DC Boost converter has been presented in this article. The active switch of the Boost DC converter is shifted to the input side of the full-bridge diode rectifier which provides more control on the input current without increasing much of the circuit complexity. Two Boost inductors and two output split capacitors are used for providing higher step-up operation compared to the conventional. The converter has been simulated both in open-loop and closed-loop conditions using the PSIM software. The simulation results show that the proposed converter provides good dynamic response and can maintain a constant stable output voltage during sudden load change. Furthermore, to evaluate the experimental performance of the suggested converter, a prototype converter has been developed. A scaled-down experiment has been performed which shows that the converter can achieve up to 85.2 % efficiency and an input power factor of 0.9.

Cuk PFC Converter Based on Variable Inductor

When the input inductor operates in discontinuous current mode (DCM), the Cuk converter can automatically achieve power factor correction (PFC) function with only a simple voltage mode control loop. However, the conventional Cuk PFC converter suffers from high intermediate capacitor voltage because of the lack of feedback of the intermediate capacitor voltage and relatively low power factor (PF). In this paper, a Cuk PFC converter using variable inductor which varies with the transient rectified input voltage is proposed to enhance the PF and reduce the intermediate capacitor voltage by injecting a controlled DC bias current into the auxiliary winding of the variable input inductor. The operating principles of the proposed Cuk PFC converter based on variable inductor are analyzed in detail, and the analysis of PF, the voltage of intermediate capacitor, and design considerations are provided. To verify the feasibility of the proposed scheme and compare the characteristics of both the traditional and proposed Cuk PFC converter, a 108W experimental prototype of the proposed converter is built and tested. The experimental results show that the proposed Cuk PFC converter can significantly enhance the PF, decrease the intermediate capacitor voltage, and increase efficiency compared with the traditional Cuk PFC converter.

High-Efficiency Interleaved Totem-Pole PFC Converter With Voltage Follower Characteristics

High power density, efficiency, control simplification, and robustness are highly demanded for power factor correction (PFC) converters. This paper proposes a totem-pole rectifier based on the switching cell with switching frequency modulation (SC-SFM). The SC-SFM features interleaved operation, soft commutation, and resistive characteristics with continuous conduction in the input inductor. The converter operates without needing sensors and a control loop for the current. Unlike conventional solutions or some sensorless converters, the converter does not require a fast control loop to shape the current since the current naturally follows the input voltage. Only one output voltage sensor and one input half-line cycle detector are required to achieve unitary power factor and regulated DC output voltage. A detailed analysis of the converter operation, including the operating principle, mathematical analysis, a small signal model, and control method, is presented, including the differences in operation from the conventional PFC rectifier with the diode bridge. Experimental results evaluate a 1-kW prototype with different switch technologies (IGBT, SiC, and GaN).

Academic Use of Rapid Prototyping in Digitally Controlled Power Factor Correctors

The growing use of power converters connected to the grid motivates their study in power electronics courses and the prototype development in the degree final project (DFP). However, the practical realization of using state-of-the-art components and conversion techniques is complex due to the numerous multidisciplinary aspects that students must consider in its design and development and the workload associated with the DFP. An example of this is that, unlike a conventional power factor correction (PFC) design, the individual dedication of students to complete the design and validation of modern bridgeless PFC stages exceeds the number of credits of the DFP. The reason for this is that it includes system modeling, becoming familiar with the devices used, discrete selection, circuit design, control development, and programming, to build the converter and verify the operation of the complete system. To reinforce the individual skills needed for the DFP and reduce this time, a novel strategy is proposed. It allows the student to focus their efforts on integrating the individual skills achieved in the degree at the appropriate competence level during the modeling and construction of the power converter while carrying out part of the tasks out of the lab, if necessary, as was the case during the pandemic restrictions. For this, the rapid prototyping technique is introduced to speed up the overall design and speed up the tuning of digital controllers. This manuscript presents a teaching experience in which students build digitally controlled power converters using Texas Instruments microcontroller boards and PLECS®. The example of a bridgeless totem-pole power factor corrector is shown. Although it began to develop and was motivated due to the restrictions during the COVID-19 pandemic, the experience has been verified and is maintained over time, successfully consolidating.

Coherence‐based automatic power factor correction (APFC) algorithm for power grids

A power factor correction (PFC) plays a major role towards the improvement of power systems quality and stability, as well as protection and control systems performance. This paper presents a novel method for automatic power factor correction (APFC) based on the coherence approach. In this method, the original power factor and the required reactive power compensation can be determined using the cross-coherence coefficients evaluated between voltage and current signals. Beside auto-coherence coefficients are useful for detecting the fault/unbalance conditions in power systems. The proposed algorithm prevents the PFC process in the events of over-compensation and abnormal events. In addition, new proposed operating characteristics for PFC, based on the coherence coefficient limits, are developed. Extensive simulation results of the proposed method are included and its accuracy and feasibility can be verified. Compared with the conventional PFC, the coherence-based PFC is easy to control, and the power factor is nearer to unity can be obtained, where its performance accuracy is greater than 99.4%. The proposed method is characterized by being simple, fast and reliable, and it can be implemented practically. Its sensitivity and security is controllable via selecting coherence setting values.

High Efficiency Common Mode Coupled Inductor Bridgeless Power Factor Correction Converter With Improved Conducted EMI Noise

The conventional power factor correction (CPFC) converter suffers from excessive heat generation due to high conduction loss from the input bridge diode. Various bridgeless PFCs (BPFCs) have been proposed to overcome this drawback. Among them, the conventional BPFC (CBPFC) features the significantly reduced conduction loss but has very poor conducted electromagnetic interference (EMI) noise. Further, the semi-BPFC features the reduced input diode loss and good EMI, but the input diode loss is too significant to ignore. Although another solution, totem-pole BPFC, features high efficiency and good EMI, it usually requires expensive current sensors and microprocessor. A BPFC with the integrated magnetics common mode coupled inductor (ICC) is proposed to overcome the drawbacks of traditional BPFCs. The ICC can significantly reduce the system size by integrating three inductive components into a single magnetic core. Moreover, the small magnetizing current of the ICC, not the main input current, flows through input diodes; thus, experimental results from a 600 W rated prototype prove that the input diode loss can be significantly reduced by about 10 W compared to the CPFC, and the input diode exhibits a low heat generation of 49.8 °C despite the absence of a heat sink. In particular, with the help of input diodes, the EMI noise spectra of the ICC BPFC can meet the EMI standard with a sufficient margin. The detailed analysis, design guide and experimental results from a 600 W rated prototype are provided to confirm the validity of the ICC BPFC.

A DSP‐based implementation of fuzzy logic and predictive current control for a Sheppard–Taylor power factor correction converter

AbstractEnsuring a high electric power quality of power systems and electric machinery continues to be a major challenge for power engineers. The research on harmonic reduction and improvement of power factor in connection to alternating current (AC) networks has intensified. This paper focuses on the simulation and real‐time implementation of a single‐phase Sheppard–Taylor power factor correction (PFC) rectifier. Compared to conventional PFC rectifiers, this converter provides a better network current tracking and reduces voltage stresses. Furthermore, it proves an ability to control a detuning phenomenon from which most of the PFC circuits suffer. This yields a significant enhancement in the power quality (PQ). The proposed control scheme consists of two successive controllers: (1) a fuzzy logic controller (FLC) for the voltage loop, which ensures a good robustness to changes in parameters; and (2) a predictive current control (PCC), which allows to achieve a sinusoidal network current and improves the power factor. The proposed configuration is examined by simulation and implemented in real‐time using a dSPACE DS1104 controller board. The robustness of the proposed control is tested under different loading conditions and output voltage variations. The obtained results validate the superiority of the applied approach in terms of unity power factor (0.998), THD of the network current (3.7%, approximately), and fast dynamic response.

Power factor correction based EV battery charger using a bridgeless isolated SEPIC converter

Electric Vehicle (EV) battery chargers which uses the conventional PFC (power factor correction) circuits have the limitation of efficiency because of its high conduction loss which occur at the input of DBR (diode bridge rectifier). To solve this issue, a bridgeless isolated single ended primary inductance converter (SEPIC) is used. Throughout the charging process, the input current operates with a power factor of one. Conduction losses are drastically reduced by the removal of the DBR and current conduction due to fewer devices. The overall performance of proposed system is shown by means of various modes of operation, simulation and experimental process. EV batteries are typically charged in constant current or voltage mode, which increases the charger’s overall efficiency.

Improved and accurate low‐frequency average modelling and control of a conventional power factor correction boost converter in continuous conduction mode

When dealing with power factor correction (PFC) rectifiers that require the use of high filter capacitances, conventional small-signal modelling techniques are not capable of reproducing the converter behaviour accurately owing to the impact of the low-frequency dynamics on the system. In this context, this work presents an improved modelling technique applied to a conventional PFC boost converter operating in continuous conduction mode (CCM). The proposed approach leads to a more accurate analysis than the traditional modelling developed for dc–dc converters, which is often extended to rectifiers. It consists of a fast and concise solution for the implementation of several PFC techniques from the derived transfer functions. The introduced method is described aiming at the development of a boost-based PFC stage using the well-known one-cycle control technique (OCC). Simulation and experimental results are presented and thoroughly discussed to validate the theoretical assumptions.

Quasi-Resonant Bridgeless PFC Converter With Low Input Current THD

In this article, a quasi-resonant bridgeless power factor correction (PFC) converter is presented. Aiming to improve the input current total harmonic distortion, a single auxiliary switch with low voltage stress than the similar counterparts is employed. Due to resonant operation, the size and value of the passive components are reduced and maximum voltage gain of four is achieved which is higher than that of conventional buck PFC converter. Also, soft switching condition for the main semiconductor elements is realized from 20% of nominal power to full load and entire input voltage range (90 to 130 Vrms) without employing any extra component. The operating modes are explained and the theoretical analysis is discussed in details. A straightforward design procedure for the proposed converter is presented. A 200 W, 160 kHz laboratory prototype is implemented to verify the theoretical analysis and the effectiveness of the proposed topology.

A Novel Bridgeless Cuk PFC Converter With Further Reduced Conduction Losses and Simple Circuit Structure

The bridgeless power factor correction (PFC) converter is popular for reducing the conduction losses of semiconductors. In this article, a novel bridgeless Cuk PFC converter is proposed. Compared with the conventional Cuk PFC converter, the number of conducting semiconductors in the proposed bridgeless Cuk PFC converter is reduced, contributing to lower conduction losses. Moreover, the conduction losses in the proposed converter are further improved compared with the pseudototem-pole bridgeless Cuk PFC converter. Meanwhile, the total number of the component in the proposed converter is less than other bridgeless Cuk PFC counterparts, especially for the big-volume magnetic component and electrolytic capacitor. In addition, all power switches in the proposed converter are common ground and can be driven by one control signal, availing simple drivers. The theoretical analysis of the proposed converter is presented in the discontinuous conduction mode with the merits of nature current-sharping ability, zero-current switching in semiconductors, and easy control. Finally, the simulation and a 100-W lab prototype are built to validate the feasibility of the proposed bridgeless Cuk PFC converter.

Bridgeless PFC Topology Simplification and Design for Performance Benchmarking

Compared with conventional power factor correction topologies, although dual-converter cell-based bridgeless topologies usually have higher efficiency, most of them suffer from high component counts. Thus, this article proposes general topology simplification methods for these topologies. Besides, several selected converter cells are exemplified to show the specific topology simplification processes, and the performance of the resultant simplified topologies is reviewed. Meanwhile, based on the same design specifications, in order to provide an unbiased quantitative topology comparison in terms of power loss, cost, and volume, this article introduces a consistent component database-based design procedure with electrical, thermal, and cost models. As case studies, the conventional and two selected bridgeless buck–boost-type topologies are compared by following the design procedure. The comparison results are analyzed to provide a reference for topology selection. Three prototypes are built and tested to verify the theoretical analysis.

Dual‐output unity power factor rectifier power block

Unity power factor rectifiers find applications in modern utility systems and consumer electronic devices. However, a dedicated rectifier is required for a given load. In this study, a Unity Power Factor (UFP) power block is described which can generate two DC outputs, one buck and one boost, with a reduced number of switches and associated driver circuits. The topology adapts well with conventional control as it retains the dynamic behaviour of a buck and boost topology. While supplying simultaneous loads it exhibits minimal cross-regulation interference between the outputs. The controller implementation for the proposed power block is described and its difference with the conventional Power Factor Correction (PFC) controller is outlined. The topology along with its control to regulate the outputs and force UPF operation are validated using a 200 W prototype with 110 V utility input and 180–24 V DC outputs.

Design and Development of Modified BL Luo Converter for PQ Improvement in EV Charger

The existing chargers for electric vehicles (EVs) use rugged nonlinear diode bridge rectifier to avail dc voltage at the input of dc–dc converter, and introduce serious power quality issues in the input ac current. These issues set the formidable need to improve the power quality (PQ) performance of existing battery chargers by eliminating the input bridge. This is achieved in this work, by the addition of an improved PQ based bridgeless (BL) Luo converter. This power factor correction (PFC) converter is the combination of two Luo converters, which operate independently in the respective half cycles, with common input inductor. The converter provides low cost and high power density based EV charging solution as fewer number of components conduct over single switching cycle due to elimination of input diode bridge in the conventional PFC converter. The charger input current is made to follow the source voltage, exactly in phase and high input power factor is achieved. Moreover, the source current total harmonic distortion is reduced below 5% as per the IEC 61000-3-2 standard under steady state and during sudden variations at load and line side.

A PFC Based EV Battery Charger Using a Bridgeless Isolated SEPIC Converter

Conventional power factor correction (PFC) circuits in electric vehicle (EV) battery chargers have the efficiency limitation due to high conduction loss associated with a diode bridge rectifier (DBR) at the input. To mitigate this issue, a bridgeless (BL) single ended primary inductance converter (SEPIC) with improved power quality, is presented in this article. The input current shows a unity power factor operation over the entire charging duration. Due to elimination of DBR and the current conduction through relatively less number of devices, conduction losses are significantly reduced. This, in turn, improvises the charger efficiency as compared to conventional BL SEPIC converter. The overall performance of proposed charger is illustrated with the help of various operating modes, design equations, simulation-based performance and experimental validation under steady state as well as over wide fluctuations in ac mains voltage. The EV battery is charged at constant current/ constant voltage control mode, which provides satisfactory results for improved efficiency and inherent PFC, thus, improving overall performance of the charger.

Power Loss Model for GaN-Based MHz Critical Conduction Mode Power Factor Correction Circuits

Wide bandgap (WBG) devices allow power factor correction (PFC) circuits to operate at megahertz (MHz), which improves power density. In low-power applications, critical conduction mode (CrM) boost PFC circuits are widely used due to its simple structure and minimized turn-on loss. Compared with the kilohertz (kHz) operation, MHz PFC in CrM yields larger inductor valley current during the zero voltage or valley switching turn-on, and significant grid current zero-crossing distortion, both of which are not considered in conventional PFC behavioral models. As a result, the conventional PFC design tool shows substantial inaccuracy in the estimation of switching frequency, inductor current envelopes, and power loss. This article analyzes these issues and proposes an improved power loss model to aid the design of MHz CrM PFC. Experimental results are presented to validate the accuracy.

A Single-Stage Single-Switch Soft-Switching (S6) Boost-Flyback PFC Converter

This paper presents a single-stage single-switch soft-switching (S6) power factor correction (PFC) converter to enhance the current shaping performance and reduce the total harmonic distortion. This improvement is achieved by the aid of an auxiliary winding which is used to lower the input current harmonics and also achieve soft-switching condition. As a result, the switching losses are reduced and harmonic content of the input current is improved noticeably in comparison to the conventional S6 PFC converter. Also, the total number of semiconductor elements is reduced in the proposed topology which results in lower cost and higher efficiency. The operating modes of the proposed converter are discussed in detail and the design procedure is presented. A 200-kHz prototype of the proposed converter is implemented and the obtained results are provided to verify the converter theoretical analysis and operation.

EV battery charger with non‐inverting output voltage‐based bridgeless PFC Cuk converter

This study proposes an improved electric vehicle (EV) battery charger with a non-inverting output voltage-based bridgeless power factor correction (PFC) Cuk converter and a flyback converter for controlling the battery current in constant-current-constant-voltage charging regions. The proposed EV charger eliminates the need for an extra inverse amplifier, which is used for the negative to positive output voltage conversion in a conventional Cuk PFC converter. Therefore, the control of the converter is easy to implement and the cost of the charger is also reduced. Moreover, the design of the charger is proposed for discontinuous conduction mode operation, which comes with the inherent advantages of reduced sensors, low reverse recovery in diodes, and zero current switching. The proposed EV charger, with improved efficiency, operates satisfactorily to comply with the IEC61000-3-2 standard for power quality at steady state and for sudden perturbations in mains voltage.

Three-Phase Buck–Boost Derived PFC Converter for More Electric Aircraft

In more electric aircraft (MEA), three-phase power factor correction (PFC) rectifiers of several kilowatts are required. In this paper, a three-phase buck–boost derived PFC converter with three switches and with input inductors connected in delta configuration for use in MEA is presented. The proposed converter is operated in a discontinuous conduction mode to achieve PFC at ac input. This avoids the inner current control loop which further eliminates the current sensors. It requires only one output voltage sensor unlike five sensors in conventional PFC converter for its control implementation. This makes the system cost effective, more reliable, and robust. A simple voltage control loop is used to generate the gate signals. The steady state operation of the converter and detailed design calculations are presented. For each power component, the analytical expressions for calculating the average and rms current ratings are derived to facilitate the converter design. The small-signal model of the converter is presented to aid the controller design. The experimental results from a 2 kW laboratory prototype are presented to confirm the operation of the proposed converter. An input power factor of 0.999, an input current total harmonic distortion of as low as 2.76%, and a high conversion efficiency of 96% are achieved from the prototype.

Universal Input AC Three-Phase Power Factor Correction With Adaptive Intermediate Bus Voltage to Optimize Efficiency

This paper proposes an adaptive intermediate bus voltage solution to optimize efficiency in a universal three-phase ac input (200–480 V) cascaded buck-follows-boost power factor corrected (PFC) converter with a 400-V dc output voltage. With this application and architecture, the output voltage of the boost converter needs to be higher than the peak ac input voltage to maintain PFC and regulation. The conventional approach would regulate the intermediate bus voltage to near 800-V dc; this allows for 480-V ac high line input, plus allowable overvoltage tolerance and margin for regulation, but it incurs heavy losses at low line input. This paper proposes to adaptively change the bus voltage between the boost and buck stages, based on the value of the ac input voltage, and the use of a relay to bypass the buck stage for low ac line input conditions in order to maximize efficiency. A loss analysis is included to show the significant loss savings and efficiency improvement using the proposed method. Experimental results are presented for a 5-kW silicon-carbide-based prototype. The proposed method demonstrates up to a 4.4 percentage point increase in efficiency (220-W decrease in loss) at low ac line input compared to the conventional PFC approach with an 800-V dc intermediate bus voltage.