Power Loss Model for GaN-Based MHz Critical Conduction Mode Power Factor Correction Circuits

Abstract

Wide bandgap (WBG) devices allow power factor correction (PFC) circuits to operate at megahertz (MHz), which improves power density. In low-power applications, critical conduction mode (CrM) boost PFC circuits are widely used due to its simple structure and minimized turn-on loss. Compared with the kilohertz (kHz) operation, MHz PFC in CrM yields larger inductor valley current during the zero voltage or valley switching turn-on, and significant grid current zero-crossing distortion, both of which are not considered in conventional PFC behavioral models. As a result, the conventional PFC design tool shows substantial inaccuracy in the estimation of switching frequency, inductor current envelopes, and power loss. This article analyzes these issues and proposes an improved power loss model to aid the design of MHz CrM PFC. Experimental results are presented to validate the accuracy.