Universal Input AC Three-Phase Power Factor Correction With Adaptive Intermediate Bus Voltage to Optimize Efficiency

Abstract

This paper proposes an adaptive intermediate bus voltage solution to optimize efficiency in a universal three-phase ac input (200–480 V) cascaded buck-follows-boost power factor corrected (PFC) converter with a 400-V dc output voltage. With this application and architecture, the output voltage of the boost converter needs to be higher than the peak ac input voltage to maintain PFC and regulation. The conventional approach would regulate the intermediate bus voltage to near 800-V dc; this allows for 480-V ac high line input, plus allowable overvoltage tolerance and margin for regulation, but it incurs heavy losses at low line input. This paper proposes to adaptively change the bus voltage between the boost and buck stages, based on the value of the ac input voltage, and the use of a relay to bypass the buck stage for low ac line input conditions in order to maximize efficiency. A loss analysis is included to show the significant loss savings and efficiency improvement using the proposed method. Experimental results are presented for a 5-kW silicon-carbide-based prototype. The proposed method demonstrates up to a 4.4 percentage point increase in efficiency (220-W decrease in loss) at low ac line input compared to the conventional PFC approach with an 800-V dc intermediate bus voltage.