Conventional Multilevel Inverter Research Articles

Harmonizing power systems with a 13-level modified Packed U-Cells multi-level inverter: Design and implementation

Traditional multilevel inverter designs often face complexity challenges, prompting the need for a simplified solution. This study introduces and evaluates the performance of a Modified Packed U-Cells (MPUC) inverter in the realm of multilevel inverter technology. The study addresses challenges associated with conventional multilevel inverters and proposes the MPUC inverter as a solution to simplify the design complexity. The MPUC inverter, utilizing three DC sources and eight switches, presents a groundbreaking thirteen-level output waveform. The primary focus lies in assessing the inverter's performance in terms of Total Harmonic Distortion (THD) and output voltage. Utilizing MATLAB/Simulink, the inverter's performance is evaluated with and without Pulse Width Modulation (PWM) strategies. The results reveal a notable reduction in THD, from 26.25% to 9.91% post-filtering when PWM is not employed. Various multi-carrier Level-Shifted PWM strategies, including PDPWM, PODPWM, APODPWM, and COPWM, are explored to enhance output waveform smoothness and efficiency. Unequal Carrier strategies, specifically UEAPDPWM and UEAPODPWM, emerge as superior in THD management at different frequency ranges. The study further incorporates real-time hardware implementation of the proposed 13-level MPUC topology, highlighting the success of the UEAPD-PWM strategy in improving waveform quality. The research aims to establish a multilevel inverter design protocol meeting international standards and emphasizes the pivotal role of PWM techniques in enhancing waveform quality. This comprehensive evaluation contributes to advancing the field of multilevel inverter technology and sets a benchmark for future research in this domain.

Design and implementation of a reduced switch seventeen-level multilevel inverter for grid integration of battery storage system

Multilevel inverters (MLI) have a variety of applications in battery storage system, renewable energy integration, electric vehicle (EV), drives for industry and in various flexible AC transmission system (FACTS). Applications of MLI in battery storage system have greatly increased over the past few decades. Conventional MLIs used for grid integration of battery energy storage is having large number of components and it requires transformer for grid integration. The large number of components and transformer increases the cost, size, weight and losses of the MLI, thus reduces the efficiency of the system. Keeping this in view, the goal of the proposed work is to design a novel reduced switch seventeen-level MLI which is having a lower number of components and do not require transformer for grid integration. This modular nature of proposed MLI is used to increase power handling capacity without introducing additional converters. For this, first proposed reduced switch seventeen-level MLI has been compared with other existing seventeen level topologies which in order to show the effectiveness of proposed topology. After analysis its effectiveness, the proposed MLI has been designed and then closed loop d-q current controller for grid connected mode is analyzed. The different curves are plotted to justify the stability of proposed inverter. The control of output voltage is also included using modified sine pulse width modulation (SPWM) method. The proposed MLI has been implemented in MATLAB/Simulink and validated using real time hardware-in-loop (HIL) emulator.

CSA-based harmonic elimination controlled reduced switch multilevel inverter for standalone PV system

A standalone photovoltaic (PV) system has emerged as a clean energy solution for application in remote areas. To establish such a system a suitable converter is required for voltage boosting as well as to produce high-quality output as required by the load. To achieve this, multilevel inverters (MLIs) are the proven substitute in PV systems. A conventional MLI uses multiple sources and switches that increase the cost and complexity. To provide a complete stand-alone system solution that addresses this issue, reduced component switched capacitor (SC) based seven-level MLI is disclosed in this paper. A new crow search algorithm (CSA) based selective harmonic elimination (SHE) method is employed to estimate the switching angles. The dominant harmonic orders are removed from the 7-level SC-MLI output while the desired firing angles for the switches are evaluated. Using only seven switches, the circuit boosts the voltage to 1.5 times with the aid of self-balanced capacitors. Therefore, the circuit does not require an additional control circuit for voltage balancing. The overall system is designed in MATLAB/Simulink environment to test under different operating conditions. An experimental prototype of the 7-level SCMLI is also designed to validate the CSA-based SHE control and MLI performance in real time.

Comparative study of single-phase multilevel cascaded transformerless inverters with different modulation methods

This paper presents an in-depth exploration of a single-phase multilevel cascaded H5 (CH5) transformerless inverter employing both phase-shifted PWM (PS-PWM) and level-shifted PWM (LS-PWM) methodologies. A comparative analysis is conducted with the conventional multilevel inverter (MLI) topologies, specifically the cascaded H-bridge (CHB) and H5 inverter configurations. The investigation delves into the impact of modulation index variations, load fluctuations, and modulation methods on the inverter's operational performance.While switches in the CHB-MLI operate continuously at the carrier frequency state using PS-PWM and LS-PWM methods, the CH5-MLI exhibits a unique behavior with some switches toggling at high frequency, while others synchronize with the grid frequency. The CH5-MLI topology demonstrates efficiency improvements and a reduction in total harmonic distortion (THD). Notably, employing the LS-PWM method yields more significant efficiency enhancements and THD reduction compared to the PS-PWM method. To analyze power loss characteristics under diverse operating conditions, the PLECS simulation environment is leveraged for calculating conduction and switching losses.The application of phase-shifted and level-shifted carrier-based pulse width modulation strategies to high and low-frequency switching switches results in minimized output harmonics, elevated operator safety, and enhanced overall reliability and efficiency. This work contributes significantly to the field by offering a detailed exploration of the CH5-MLI topology's dynamic behavior, modulation strategies, and their collective impact on performance metrics such as efficiency, THD, and power losses.

Fault-Tolerant Analysis of 5-level Modified T-type and Packed U Cell MLI

ABSTRACT In this work, 5-level modified T-type and modified Packed-U-Cell (PUC) multilevel inverter (MLI) topologies are designed with reduced device count for the reliability analysis of the MLI under faulty conditions. This work aims to incorporate the fault either by loss of an individual switch or due to the loss of a single h-bridge leg. Also, the proposed T-type and PUC inverter have an inherent self-voltage balancing capability that reduces the complexity and enhances the circuit’s reliability. First, the proposed topologies are simulated using Matlab/Simulink environment, and the results obtained are then compared with the conventional MLI. Finally, both MLIs are experimentally tested on a laboratory prototype as a proof of concept to validate the analytical developments.

A New 5L SC-Based Boosting Inverter with Reduced Spike Current

The drawbacks of conventional multi-level inverters (MLIs) include insufficient boost capacity, unbalanced capacitor voltage, and complicated regulation. This research presents a 5-level (5-L) switched capacitor (SC) boost inverter for single-phase applications as a solution to the aforementioned problems. The 5-L inverter is well-suited for renewable energy generation since it can produce five output levels with two voltage gains and maintain a natural balance in capacitor voltages with only seven switches. However, the SC inverter’s large current spikes could harm capacitors, switches, and DC sources. The suggested inverter’s charging loop incorporates an inductor to mitigate this issue by smoothing out voltage fluctuations and current spikes. The simulation and experiment findings presented here prove that the proposed system works and performs as expected.

Single-phase switched-capacitor boost multilevel inverter interfacing solar photovoltaic system

The focus on the generation of clean power from photovoltaic (PV) system has increased the utilization of different power converters. Inverter is one of the key converter, which converts the dc output from PV system to required ac output in standalone/grid-tied applications. However, conventional inverters has high distortion in the output voltage and to address this issue several multilevel inverters (MLIs) have been introduced recently. Despite many advantages, conventional MLIs without voltage boosting ability are not the suitable solution in PV applications. Motivated by this issue, this work presents a switched-capacitor (SC) based boost type MLI using reduced number of components. The proposed circuit produces a 7-level output from a single dc input or a single photovoltaic (PV) link, which can create three times boost ac output at the load side. The operational analysis is detailed for each mode. Further, a comparison is conducted with recent topologies, which validates the advantage of the proposed structure. Simulation results are provided for different operating conditions. The results are also validated by utilizing an experimental prototype in a laboratory at different possible working conditions.

MULTILEVEL INVERTER WITH REDUCED SWITCHES FOR ELECTRICAL VEHICLE

This project focuses on the development of an innovative multilevel inverter designed specifically for electric vehicles (EVs), aiming to reduce complexity and enhance efficiency by minimizing the number of switches in the inverter topology. The conventional multilevel inverter configurations often involve a high count of switches, leading to increased costs, intricate designs, and elevated power losses. In contrast, our approach seeks to optimize the inverter's performance by employing advanced control strategies and modulation techniques while significantly reducing the number of switches. This reduction not only simplifies the design but also lowers production costs and maintenance efforts. Moreover, the project emphasizes the compact integration of the inverter into the EV powertrain, addressing the size and weight constraints of electric vehicles. Through thorough simulations and practical experiments, the proposed multilevel inverter's performance will be evaluated in terms of efficiency, power quality, and reliability. The anticipated outcomes aim to contribute to the advancement of power electronics for sustainable transportation, providing a more efficient, cost- effective, and compact solution tailored to the unique requirements of electric mobility. This research has the potential to significantly impact the field, fostering further innovations in power electronics for clean and efficient transportation solutions .Key Words: Electric vehicle, Inverters, Switches, Efficiency.

Computer and experimental analysis of a reconfigurable staircase module-based multi-level inverter with fault tolerant capability

In the conventional multilevel inverters, occurrence of a fault in one or more power switches can cause abnormal changes in the output waveforms. Besides, increasing the applied power switches results to an increase in the possibility of fault on the power switches. Accordingly, providing a comprehensive structure with high fault-tolerant capability is one of the vital requirements and critical challenges. To tackle these issues, this study first presents and explores a new basic unit and staircase module (SM) and then extends and optimizes it to yield a reconfigurable multi-level inverter (MLI) with more levels and different goals. The proposed MLI can continue to operate when open-circuit faults in switches. This advantage of the proposed structure is achieved without any redundant legs or switches. For further investigation, a comparison is made in terms of the number of power switches, drivers, dc sources, and reliability between the proposed and similar structures. To control the output voltage levels, the strategy of fundamental frequency switching triggers the configured topology. The carrier signals are reconfigured under fault conditions based on levels to be generated by bypassing the faulted switch. The validity of the established MLI with its fault-tolerant capability is certified through both computer simulations using the MATLAB/Simulink platform and laboratory prototype implementations.

A high boost switched capacitor multilevel inverter with reduced components

ABSTRACT Switched capacitor multilevel inverters (SCMLIs) became a popular DC-to-AC converter due to their unique features like self-capacitor voltage balancing and self-output voltage boosting abilities over conventional multilevel inverters in recent years. However, recently developed SCMLIs suffer from higher component counts, lower voltage boosting factors, higher total standing voltage, and the requirement of isolated DC sources for generating high-quality output voltage level waveform. These drawbacks make the inverter costly, complex, and bulky. To address these drawbacks of SCMLIs, a novel SCMLI is proposed in this paper. The proposed SCMLI can realise 17 output voltage levels with a higher boosting factor. In addition, the proposed SCMLI uses lower switches, driver circuits, capacitors, and diodes than similar SCMLIs. The proposed SCMLI also offers a cheaper cost function per output voltage level per boosting factor compared to others. A thorough description of the proposed inverter’s operating principle, voltage stress analysis, and capacitor selection procedure have been discussed. The proposed inverter’s cascaded form has been constructed and analysed for various DC source configurations. An extensive simulation study of 17-level SCMLI in MATLAB/Simulink platform and an experimental investigation on a 17-level laboratory prototype validate the proposed SCMLI’s merits and effectiveness.

Mathematical Modeling and Analysis of Capacitor Voltage Balancing for Power Converters with Fewer Switches

The multilevel inverter (MLI) has been developed as a powerful power conversion scheme for several processes, including renewable energy, transmission systems, and electric drives. It has become popular across medium- to high-power operations due to its many advantages, including minimum harmonic content, low switching losses, and reduced electromagnetic interference (EMI). In this paper, the capacitor voltage balancing technique-based pulse width modulation (PWM) has been proposed. The proposed PWM strategy offers several advantages, such as high-quality output waveforms with reduced harmonic distortion, improved efficiency, and better control over the output voltage. The Xilinx ISE 10.1 software was used for synthesizing, and the VHDL code was written for the proposed method. MATLAB software was used to simulate and hardware was used to verify the proposed system. The SPARTAN 3E FPGA was used for the generation of the PWM. This paper developed a 2 kW single-phase 15-level inverter that created an AC wave from the DC input voltage, with a total harmonic distortion (THD) of 8.02%, which was less than the THD achieved from other conventional MLI. The results indicate that MLI topologies with low total harmonic currents, fewer switches, and higher output voltage levels are better stabilized during load disturbance circumstances.

A Survey on the State-of-the-Art and Future Trends of Multilevel Inverters in BEVs

All electric vehicles are the only way to decarbonize transport quickly and substantially. Although multilevel inverters have already been used in some transportation modes, they are rarely used in road transportation, especially in light-duty passenger BEVs. With the transition to a high 800-V DC link to extend the driving range and enable extreme fast charging, the possibility of using multilevel inverters in commercial light-duty passenger BEVs becomes feasible. Higher efficiency, higher power density, better waveform quality, lower switching frequency, the possibility of using low-rated switches, and inherent fault tolerance are known advantages of multilevel inverters that make them an efficient option for replacing 2-level inverters in high DC link passenger BEVs. This paper discusses high DC link voltage benefits in light-duty passenger BEVs, presents the state-of-the-art of different conventional multilevel inverter topologies used in BEVs, and compares them with conventional 2-level inverters from different aspects and limitations. Based on commercial upper-class passengers’ BEV data and a review of multilevel inverters on the market, future trends and possible research areas are identified.

Multi-Agent Reinforcement Learning-Based Decentralized Controller for Battery Modular Multilevel Inverter Systems

The battery-based multilevel inverter has grown in popularity due to its ability to boost a system’s safety while increasing the effective battery life. Nevertheless, the system’s high degree of freedom, induced by a large number of switches, provides difficulties. In the past, central computation systems that needed extensive communication between the master and the slave module on each cell were presented as a solution for running such a system. However, because of the enormous number of slaves, the bus system created a bottleneck during operation. As an alternative to conventional multilevel inverter systems, which rely on a master–slave architecture for communication, decentralized controllers represent a feasible solution for communication capacity constraints. These controllers operate autonomously, depending on local measurements and decision-making. With this approach, it is possible to reduce the load on the bus system by approximately 90 percent and to enable a balanced state of charge throughout the system with an absolute maximum standard deviation of 1.1×10−5. This strategy results in a more reliable and versatile multilevel inverter system, while the load on the bus system is reduced and more precise switching instructions are enabled.

Design and Performance Analysis of New Multilevel Inverter for PV System

Multilevel inverters (MLIs) have recently attracted more attention in medium-voltage and high-power applications as they can provide an effective interface with photovoltaic (PV) systems. Conventional MLIs are used to generate higher voltage levels, which improve power quality and reduce the requirement for passive filters. However, recent research has focused on designing new MLI topologies using reduced switch counts and less voltage stress. This study, as such, proposes a new nine-level symmetric MLI for PV systems with a minimum number of switches. This decrease in the number of switches reduces the voltage stress across the switches and the number of driving circuits, which lowers the complexity of the control circuit and, as a result, lowers the cost and size of the system. This article compares the proposed MLI with other topologies based on the DC sources, switches count, gate driver circuits (Ngd), total standing voltage per unit (TSVPU), cost function (CF), and components count per level (CC/L). The proposed topology is integrated with the PV system. MATLAB software is used to evaluate the performance of MLI at step change in irradiance and under variable load conditions. The total harmonic distortion (THD) of the proposed topology is reduced with the implementation of phase disposition pulse width modulation (PD-PWM). In addition, PD-PWM is compared with phase opposition disposition pulse width modulation (POD-PWM) and alternative phase opposition disposition pulse width (APOD-PWM) modulation techniques. The simulation results reveal the improved performance of the proposed topology at variable irradiance and under varying load conditions. The comparison results reveal minimum (TSVPU), CC/L, CF, and switch count compared to existing topologies. Hence, the proposed topology of MLI is cost-effective and superior in all aspects compared to other topologies. In summary, it offers overall improved performance, and thus, it is feasible for the PV system.

A Novel High-Efficiency Three-Phase Multilevel PV Inverter With Reduced DC-Link Capacitance

We present a novel three-phase multilevel inverter (MLI) design for PV applications that does not require large DC-link capacitors to buffer the 120 Hz power ripple and allows individual inverter module to process trapezoidal power instead of sinusoidal power. This new design features two inverters connected in parallel to each DC source and N inverters connected in series to each grid phase to support the grid voltage. The trapezoidal operation improves the overall system&#x2019;s efficiency by allowing the inverter module to output peak or zero power for most of the AC cycle. We present the controller design and simulate the proposed MLI system in PLECS. We demonstrate an experimental 110<inline-formula><tex-math notation="LaTeX">$V$</tex-math></inline-formula> DC input, 208 <inline-formula><tex-math notation="LaTeX">$V_{rms}$</tex-math></inline-formula> three-phase AC output, 1kW 5-level prototype with <inline-formula><tex-math notation="LaTeX">$&gt;$</tex-math></inline-formula>&#x00A0;95&#x0025; efficiency. With the same inverter module, we compare the efficiency of the proposed design to the conventional MLI design, where all modules share phase power evenly. We demonstrate that the proposed design consistently outperforms the conventional design in efficiency, with <inline-formula><tex-math notation="LaTeX">$&gt;$</tex-math></inline-formula>&#x00A0;20&#x0025; loss reduction at light load conditions.

An assessment of advanced DC-link based reversing voltage type multilevel inverter topologies

AbstractIn this paper, advanced DC-Link (DCL) based reversing voltage type Multilevel Inverter (MLI) topologies by compensating the difficulties in the conventional MLIs are reviewed. These topologies consist of less switching components and driver circuits when compared with conventional MLIs predominantly in higher levels. Consequently, installation area, total cost and hardware difficulties are reduced by increasing the voltage levels. The unipolar based Pulse Width Modulation Schemes (PWMS) will improve DCL inverters performance. This paper presents unipolar Multi-Reference (MR) based sine and space vector PWMS with single triangular carrier wave for generating required levels in output voltage. Comparison between UMR sine and space vector PWMS for DCL inverter topologies is presented in terms of Fundamental Output Voltage (FOV) and Total Harmonic Distortion (THD). The research tries to establish the survey analysis for single-phase 7-level DCL based reversing voltage type MLI topologies with UMR based sine and space vector PWMs. Finally, to confirm the feasibility of proposed DCL-MLIs in terms of FOV and THD the simulation results are incorporated. Further, the prototype model is developed for single-phase 7-level DCL inverter with Field Programmable Gate Array (FPGA) based UMR sine and space vector PWMS to authenticate simulation results. The efficiency of the proposed cascaded MLI achieves the value of 99.003%.

Harmonic reduction using Particle Swarm Optimization based SHE Modulation Technique in Asymmetrical DC-AC Converter

Many inverters play an important role in transmitting and processing energy to power system networks. To reduce the cost and size of multilevel inverters, various topologies have been included in the literature. But these topologies do not look at the complete harmonic distortion in the output waveform. In this study, a modern multilevel inverter structure, a mutated H-bridge inverter is adopted that demands a small amount of switches, driver circuits, power diodes and DC voltage sources compared to conventional multilevel inverters to produce the required level in the output voltage. The mutated H-bridge converter uses a nearest-level control method, produces high value of total harmonic at the output voltage and low-level harmonics content is also high, which is more dangerous than high-order harmonics. Therefore, the selective harmonic elimination (SHE) method is used to reduce the low frequency harmonics and the total harmonic distortion to the output voltage. Comparison of complete harmonic deviation and low-level harmonic content using the above-mentioned control strategies on the 31-level inverter is presented. Simulation studies confirm the performance of a 31-level inverter with low-order harmonics and a complete harmonic distortion using the SHE process. The effectiveness and accuracy of the SHE in producing 31 level waveform is demonstrated by utilizing the test outcomes and the THD found is of the order of 2.8%, 1.7%, 1.7% and 1% for the modulation index values of 0.5590, 0.7440, and 0.8380 and 0.9110 respectively.

An Active-Neutral-Point-Clamped Switched-Capacitor Multilevel Inverter With Quasi-Resonant Capacitor Charging

Switched-capacitor (SC) multilevel inverters (MLIs) offer various advantages over conventional series MLIs owing to the operation from a single dc source, self-balanced capacitor voltages, and inherent voltage gain. However, these advantages come at the cost of high current stress on the capacitors, associated semiconductors, and the dc source. This inrush current has limited the practical application of SC-MLIs to a fractional kilowatt rating. This article proposes a practical solution by introducing a unity gain nine-level active-neutral-point-clamped SC-MLI with an alleviated capacitor charging current. Switching loss in the SC circuit semiconductors is reduced by using a modified switching sequence that allows the charging current to flow with a minimum interruption till it is turned off at zero-current crossing. The structure also integrates protection against the detrimental effects of voltage transients across the charging inductor. The inverter exhibits a maximum efficiency of 98.03% at 583.91 W output power. Compared with similar SC-MLIs with hard-charging, the proposed inverter significantly reduces the losses and improves efficiency. Experimental results from a 2 kVA laboratory prototype validate the theoretical analysis and show the capacitor voltages stable under varying load impedance and modulation index.

A Nine-Level Transformerless Boost Inverter With Leakage Current Reduction and Fractional Direct Power Transfer Capability for PV Applications

This article describes an integrated voltage-boosting technique, which is essential to achieve compatibility between low-voltage photovoltaic (PV) panels and high-voltage dc links needed for dc-to-ac conversion. To achieve the twin objectives of voltage-boosting and multilevel inversion, this article proposes a transformerless T-type nine-level hybrid boost inverter. To improve the efficiency in the boosting stage of the proposed converter system, a significant portion of the PV energy is directly transferred from the PV source to the load, while the other part is processed through an interleaved converter, which is fused with the inverter. Thus, the proposed converter ensures a higher power density and reduces the power ratings of the semiconductor devices. This article also introduces a modified zone-based pulsewidth modulation (PWM) technique, which achieves a complete elimination of the switching frequency voltage transitions in the total common-mode voltage (TCMV). Thus, this technique mitigates the generation of leakage current while preserving the advantages of conventional multilevel inverters such as low <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\text{d}v/\text{d}t$ </tex-math></inline-formula> and inductive power capability. Besides that, a rigorous mathematical analysis for the common-mode equivalent circuit of the proposed configuration is also presented in this article. Detailed simulation and experimental studies are carried out to validate the feasibility of the proposed configuration.

A Quasi-Z-Source-Based Space-Vector-Modulated Cascaded Four-Level Inverter for Photovoltaic Applications

This article proposes a single-stage buck–boost topology for photovoltaic (PV) applications with a three-phase output. This power converter is constituted by three quasi-Z-source (qZS) networks that are integrated with a four-level cascaded multilevel inverter (FCMI). Compared to the conventional multilevel inverter (MLI) configurations, such as the neutral-point-clamped (NPC) and the cascaded H-bridge (CHB) inverters, the proposed topology is structurally simple with lesser number of components. The proposed power converter and its modulation scheme enhance the boost factor by 50% compared to the aforementioned topologies while alleviating the voltage stress on the switching devices. It is shown that the proposed converter can regulate the output voltage in the stand-alone mode by controlling the shoot-through duty ratio of the qZS networks. Furthermore, it is shown that the proposed converter can be interfaced with the grid by controlling the modulation index along with the shoot-through duty ratio to achieve the twin objectives of maximum power point tracking (MPPT) and the unity power factor (UPF) operation with the grid. The simulation studies and experimentation on a scaled-down laboratory prototype verify the steady-state and dynamic performances of the proposed power circuit configuration and the associated control strategy.