Conventional class-E Research Articles

Enhanced Power Conversion Capability of Class-E Power Amplifiers With GaN HEMT Based on Cross-Quadrant Operation

Class-E power amplifiers are widely used in megahertz frequency power conversion systems due to their high efficiency, which can further be enhanced by virtue of wide-bandgap devices such as GaN high-electron-mobility transistors. Here, a GaN-based cross-quadrant mode Class-E amplifier is proposed, which addresses one of the major challenges for such amplifiers, i.e., to achieve both high power and high efficiency with low-voltage-rating devices. By utilizing the reverse conduction of GaN transistors, a cross-quadrant mode Class-E amplifier with small dc-feed inductance is constructed, whose circuit model is derived by virtue of the Laplace transform technique. We demonstrate an experimental prototype operating at 3.11 MHz with a 100-V GaN transistor, achieving an output power of about 6 W with the efficiency being almost 90% when the input voltage is 10 V and the load resistance is 28 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$\mathrm{\Omega }$</tex-math></inline-formula> . Compared with conventional Class-E amplifiers, the power conversion capability of the proposed amplifier is increased up to three times from 0.49 to 1.69 with a slight reduction in efficiency. Such cross-quadrant mode amplifiers can be used to improve the power conversion capability and to reduce the peak switch voltage at the same output power level.

High-Efficiency Broadband Class-E PAs for More Than One Octave: Analysis and Design

This article presents a solution based on continuous mode for designing broadband class-E power amplifiers (PAs), which is realized by transmission of the second-harmonic current with appropriate phase to load network of a class-E PAs. This theory allows selecting appropriate second-harmonic impedance causing part of efficiency to be sacrificed to get a bandwidth over one octave. The mathematical formulation for optimum load impedance in main harmonic, second harmonic, output power, drain efficiency (DE), and load quality factor (QL) is developed in this case. Theoretical results are compared with conventional narrowband class-E counterparts. To check the authentication of mathematical analysis and simulation results, a proof-of-concept broadband continuous-mode class-E PAs is fabricated using the CGH40025F transistor. The manufactured PAs show 43-dBm output power, with average DE 70&#x0025; over the 0.6&#x2013;1.8-GHz frequency range. Also, a narrowband conventional class-E PA for frequency range 1.2&#x2013;1.8 GHz with the same transistor as broadband class-E PA is fabricated for better comparison. The output power and average DE of the conventional class-E PA are 42.5 dBm and 80&#x0025;, respectively.

Analysis of the Soft-Switching Tuning Effect on the Figures of Merit Involved in the Design of a Class-E Amplifier with Finite DC-Feed Inductance

This paper explores the design of a Class-E amplifier with finite DC-feed inductance using three tuning methods. Furthermore, this work quantifies the impacts of the tuning process (referred to in this paper as the tuning effect) on the main figures of merit (FoMs) of this amplifier. The tuning goals were to guarantee two conditions: zero voltage and zero voltage derivative switching (i.e., soft-switching tuning). To the best of the authors’ knowledge, systematic tuning methods have not been analyzed before for this amplifier topology. Two of them are based on the iterative component tuning process, and they have been explored previously in the design of the conventional class-E amplifier with an RF choke inductance. The last tuning method explores the simultaneous adjustment of the control signal period and one amplifier capacitor. The analyzed tuning methods were validated by extensive simulations of case studies, which were designed following the power specifications of the Qi standard. In 100% and 96% of the case studies, zero voltage switching (ZVS) and zero-derivative voltage switching (ZDS) were achieved, respectively. Furthermore, we identified an unexpected behavior in the tuning process (referred to in this paper as the turning point), which consisted of a change of the expected trend of the soft-switching (i.e., ZVS and ZDS) point, and it occurred in 21% of the case studies. When this behavior occurred and converged to at least ZVS, the tuning process required more iterations and a large number of tuning variables. Additionally, after the tuning process, the total harmonic distortion and output power capacity were improved (i.e., in 78% and 61% of the case studies, respectively), whereas the output power, drain and added power efficiencies deteriorated (i.e., in 83%, 61% and 65% of the case studies, respectively) in the overall case studies. However, we could not identify an improvement in the overall FoMs related to the soft-switching tuning. Furthermore, the tuning impact was significant and produced some improvements and some deleterious effects for the FoMs in each case study, without a clear trend by FoMs or by tuning method. Therefore, the amplifier designer may choose the more favorable tuning method and the related FoM trade-offs for the required design specifications.

A Current-Injection Class-E Power Amplifier

A novel class-E power amplifier (PA) using a current-injection (CI) technique is presented in this letter. An auxiliary current source, which injects the current into the load during each turn-off period of switching transistors, is introduced into the conventional class-E PA. Without the need of impedance transforming or increasing of the supply voltage, the proposed PA provides a new method to increase the output power. The proposed circuit is fabricated in a Taiwan Semiconductor Manufacturing Company's (TSMC's) 65-nm low power (LP) CMOS process. Measurement results show that the output power of the injected circuit reaches up to 14.12 dBm with a drain efficiency of 41% at 1.8 GHz. The output power improves more than 3 dB compared to the conventional class-E PA without CI.

A remotely powered fully integrated low power class-E power amplifier for implantable sensor systems

This paper presents a fully integrated low power class-E power amplifier and its integration to remotely powered sensor system. The on-chip 1.2 GHz power amplifier is implemented in 0.18 µm CMOS process with 0.2 V supply. The implantable system is powered by using an inductively coupled remote powering link at 13.56 MHz. A passive full-wave rectifier converts the induced AC voltage on the implant coil into a DC voltage. A clean and stable 1.8 V supply voltage for the sensor and communication blocks is generated by a voltage regulator. On---off keying modulated low-power transmitter at 1.2 GHz is used for the transmission of the data collected from the sensors. The transmitter is composed of a LC tank oscillator and a fully on-chip class-E power amplifier. Compared to the conventional class-E power amplifiers, an additional network which reduces the on-chip area is used at the output of the power amplifier. The measurement results verify the functionality of the remotely powered implantable sensor system and the power amplifier. The integrated power amplifier provides ź10 dBm output power for 50 Ω load with a drain efficiency of 31.5 %. The uplink data communication with a data rate of 600 kbps is established by using a commercial 50 Ω chip antenna at 1 m communication distance.

A self-control technique for high efficiency class-E CMOS power amplifier

In this paper, a self-control (SC) technique for high efficiency class-E CMOS power amplifier is presented for GSM standard. Cascode topology due to high sustainability of voltage stress is mostly considered in CMOS PAs, but slow transition of common-gate device from triode to cut-off region is the most problematic issue of cascode configuration and the main source of power loss. In order to minimize its power loss a positive feedback technique is used. The proposed technique speeds up on-to-off and off-to-on transition time and lower the on and off drain׳s voltage of the common-gate device. Therefore, the common-gate device turns off and on instantly after common-source device in lower drain voltage and consequently the technique shows an improvement in the overall performance of the PA. To demonstrate its performance a self-control class-E CMOS PA has been designed, simulate, and compared to conventional class-E CMOS PA. It has shown that more than 2% improvement is achieved in power-added efficiency (PAE). Under a 3.3V power supply, the proposed CMOS PA in 0.18um CMOS process at 1.8GHz gives 29.6dBm output power.

Derivation of Closed-Form Design Equations for Idealized Operation of Inverse Class-E Power Amplifiers at Any Duty Ratio

Abstract Complementary to the conventional class-E topology, inverse class-E operation has several advantages over the class-E counterpart, such as lower peak switch voltage and smaller circuit inductance, which are attractive to high power RF design and MMIC implementation. This paper derives the closed-form design equations that can be used to synthesize the idealized operation of inverse class-E power amplifiers at any switch duty ratio. Calculation of the key design parameters, such as the maximum switch voltage and circuit components values, is elaborated and compared with the case of conventional class-E operation. Further, the theoretical analysis is confirmed and verified by numerical simulations performed on a 500 mW, 2.4 GHz idealized inverse class-E power amplifier.

Design of Single-Switch Inverters for Variable Resistance/Load Modulation Operation

Single-Switch inverters such as the conventional Class-E inverter are often highly load sensitive, and maintain zero-voltage switching over only a narrow range of load resistances. This paper introduces a design methodology that enables rapid synthesis of Class E and related single-switch inverters that maintain ZVS operation over a wide range of resistive loads. We treat the design of Class-E inverters for variable resistance operation and show how the proposed methodology relates to circuit transformations on traditional Class-E designs. We also illustrate the use of this transformation approach to realize Φ <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> inverters for variable-resistance operation. The proposed methodology is demonstrated and experimentally validated at 27.12 MHz in a Class E and Φ <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> inverter designs that operate efficiently over 12:1 load resistance range for an 8:1 and 10:1 variation in output power, respectively, and a 25-W peak output power.

An Analysis of the Class-E Zero-Voltage-Switching Rectifier Using the Common-Grounded Multistep-Controlled Shunt Capacitor

This paper presents an analysis of the Class-E ZVS rectifier using a common-grounded multistep controlled Shunt Capacitor (CSC). The Class-E ZVS rectifier using a common-grounded multistep CSC can regulate the output voltage by changing the shunt capacitance. The voltage over the diode and shunt capacitor in the conventional Class-E ZVS rectifier is shared by the series connected capacitors. In this paper, the Class-E ZVS rectifier using a common-grounded multistep CSC is analyzed, simulated, and experimented. Especially, the power conversion efficiency is discussed in detail.

Analysis of a Broadband High-Efficiency Switch-Mode $\Delta \Sigma $ Supply Modulator Based on a Class-E Amplifier and a Class-E Rectifier

<?Pub Dtl=""?> In this paper, a broadband high-efficiency supply modulator is proposed. This modulator, with a node controlled by <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex Notation="TeX">$\Delta \Sigma $</tex></formula> modulator's output, consists of a conventional Class-E amplifier and a Class-E rectifier. The configurations and operation principles of this modulator are introduced to explain the envelope reconstruction process. The performance of this modulator in steady state is analyzed to show the reason for high-efficiency operations assisted by a shunt diode, especially for short-circuited load resistance. Its performance for broadband envelopes amplification is analyzed using numerical difference equations. The results show that efficiency degradation and nonlinearity of this modulator are inevitable due to transient responses. The most significant factors related to the performance degradation, such as switch loss and conduction loss, are determined and verified by numerical simulations. The simulations for one-carrier wavelength code-division multiple-access (WCDMA) envelopes show that over 80% average efficiency and normalized mean square error (NMSE) of <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">$-\hbox{16 dB}$</tex> </formula> can be obtained in numerical examples even considering the nonidealities. An experimental supply modulator is given to verify the proposed modulator. In this experiment, 48.6% average efficiency and NMSE of <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex Notation="TeX">$-\hbox{15.9 dB}$</tex></formula> are measured for WCDMA envelopes of 6.1-dB peak-to-average-power ratio.

Design of broadband and high-efficiency class-E amplifier with pHEMT using a novel low-pass microstrip resonator cell

In this article, a high-efficient class-E amplifier design with low voltage and broadband characteristics using a novel Front Coupled Tapered Compact Microstrip Resonant Cell is presented. The proposed micorstrip resonator is used as the harmonic control network in order to suppress higher order harmonics, which obtained the optimized impedance matching for the fundamental and harmonics. The class-E amplifier is realized from 0.7 to 1.8 GHz, and obtained the power added efficiency of 72.5–77.5%. The maximum value of Power added efficiency (PAE) is 79.7% with 11-dBm input power at 1.5 GHz. The designed class-E amplifier using the proposed harmonic control network gained 15.34% increment in PAE, and 25.6% reduction in the circuit size in comparison with the conventional class-E amplifier. The simulation and measurement results show the validity of the proposed design procedure of the broadband class-E amplifier using a novel microstrip resonator cell. © 2013 Wiley Periodicals, Inc. Microwave Opt Technol Lett 55:1118–1124, 2013; View this article online at wileyonlinelibrary.com. DOI 10.1002/mop.27490

Continuous Class-E Power Amplifier Modes

In this brief, a continuum of novel closed-form solutions is derived for class-E power amplifiers (PAs). It is analytically proven that the class-E zero voltage/zero voltage derivative switching conditions can be satisfied for an arbitrarily selected reactive second harmonic switch impedance (Z2S). The higher order harmonic currents are terminated capacitively. The conventional class-E, class- E/F2, and class-EF2 modes are thus subsets of the continuum. The arbitrary selection of Z2S enables robust waveform engineering for performance optimization in specific applications. Furthermore, the theoretical derivation provides important possibilities for wideband class-E PA synthesis.

A Charging Acceleration Technique for Highly Efficient Cascode Class-E CMOS Power Amplifiers

A cascode configuration in class-E CMOS power amplifiers (PAs) provides high reliability with respect to breakdown considerations. However, it causes a power loss due to the slow transition of a common-gate device from the triode region to the cut-off region. To minimize the power loss of cascode class-E CMOS PAs, we propose a charging acceleration technique, CAT. This method incorporates a capacitive element between the drain and the source of a common-gate device in a cascode configuration, accelerating the charging speed responsible for turning off a common-gate device instantly after a common-source device is turned off and thus minimizing power loss from the device. We compared the performance of the proposed cascode class-E PA to that of the conventional cascode class-E PA using a 0.18- CMOS process. With a 3.3-V power supply, the proposed fully-integrated CMOS PA achieves 30.7 dBm of maximum output power and 45.6% of power-added efficiency (PAE) with a dynamic range of 40 dB at 1.6 GHz. According to measurements, the proposed cascode class-E PA shows improvement in PAE over the conventional class-E PA of between 5% and 9% in a 1.5 to 2.0 GHz range.

A High-Power-Factor Single-Stage Single-Switch Electronic Ballast for Compact Fluorescent Lamps

A very high power factor electronic ballast that uses a single switch in the power circuit is proposed in this paper for compact fluorescent lamps (CFLs). The proposed power circuit is designed by integrating a SEPIC power factor corrector with a novel single-switch current-fed resonant inverter. The advantage of this single-switch electronic ballast is that it greatly simplifies the gate-drive circuit design due to the elimination of isolation devices that are otherwise required in the conventional half-bridge totem pole configuration. This topology features a reduction of at least two switches in the power stage compared to conventional two-stage approach for high-power-factor electronic ballasts. In addition, the proposed circuit is also able to achieve close-to-unity power factor by operating the integrated SEPIC power factor corrector in discontinuous conduction mode. The conduction loss of the switch in the proposed circuit is also significantly reduced compared to the conventional class-E single-switch resonant inverter. Experimental results are provided to justify all the theoretical analysis and highlight the features of the proposed circuit on a 13-W CFL.

결함 접지 구조를 이용한 유사 E급 전력 증폭기의 소형화

본 논문에서는 접지 결함 구조(Defected Ground Structure: DGS)를 이용하여 기지국용 고효율 E급 전력 증폭기의 성능을 유지하면서 크기를 소형화 할 수 있는 방안을 제안하였다. E급 전력 증폭기에서 요구되는 고조파 임피던스는 아령형 DGS와 나선형 DGS를 사용함으로써 만족시켜 주었다. 제안하는 유사 E급 전력 증폭기의 DGS 부하 회로는 가장 큰 고조파 성분인 2차 고조파 대역에서 개방, 나머지 고차 고조파 임피던스는 단락에 가까운 고조파 임피던스를 갖는다. 제안하는 구조를 통하여 제작된 전력 증폭기는 출력 전력이 43.1 dBm, 포화전력 이득이 12.7 dB일 때 70.2 %의 전력 부가 효율(Power Added Efficiency: PAE)을 가지며, 이는 비교 대상인 E급 증폭기와 거의 유사한 값이다. 회로 크기의 관점에서 보면 각각의 고조파 성분 정합을 위해 여러 개의 스터브가 장착되어 있는 비교 대상인 E급 증폭기에 비해 전체 크기를 50 %로 소형화시킬 수 있었다. In this work, a reduced size 20W quasi class-E Power Amplifier(PA) with defected ground structure load-network is presented for WCDMA base station application. Harmonic impedances required for the class E operation are satisfied by applying the dumbbell and the asymmetric spiral DGS. Open impedance for 2nd harmonic frequency which has the highest power and nearly short impedances for other higher order harmonics are provided by the proposed DGS load-network. The maximum Power Added Efficiency(PAE) of 70.2 % at the output power of 43.1 dBm with the saturated power gain of 12.7 dB is achieved by the proposed quasi class-E PA, which is comparable to the performance of the reference class-E PA. Total size of the proposed class-E PA is only <TEX>$50{\times}50\;mm^2$</TEX> and much smaller than the conventional class-E PA that is loaded with a number of open stubs.

Performance Study of a Class-E Power Amplifier With Tuned Series-Parallel Resonance Network

This paper reports on a modified class-E amplifier with a tuned series-parallel resonance network. This configuration introduces two additional resonance frequencies. The design equations required to determine the optimum operations are analyzed in detail by introducing three additional boundary conditions. compared to the conventional class-E amplifier, the numerical results show that the improvements on load resistance, maximum transistor current, power output capability, and maximum frequency can be obtained by properly selecting the resonance frequencies of the tuned network. Comparisons between simulations and measurements of an experimental circuit of the new configuration are drawn to validate the feasibility. The drain efficiency of 81.77%, power-added efficiency of 79.58%, and output power of 32.71 dBm (1.866 W) at 250 MHz are measured.

Study on the new control scheme of class-E inverter for IH-Jar application with clamped voltage characteristics using pulse frequency modulation

A new control scheme of Class-E inverter for induction heating jar applications with clamped voltage characteristics using pulse frequency modulation (PFM) is introduced. To reduce the voltage stress of a switch, the proposed PFM control scheme does not need any auxiliary circuit. It can decrease the voltage stress of a switch through the modulation of switching frequency. The Class-E inverter using the proposed control scheme has the advantages of not only the same output power when it is compared with an active clamped class-E (ACCE) inverter, but also zero-voltage-switching, which are characteristics of conventional Class-E and ACCE inverter. The control principles of the proposed method are explained in detail and its validity is verified through experimental results.

Sensitivity Characteristics of Inverse Class-E Power Amplifier

In this paper, an analysis is performed in order to determine the effects that variations in circuit component values, frequency, and duty cycle have on the performance of the newly introduced inverse Class-E amplifier. Analysis of the inverse Class-E amplifier under the generalized condition of arbitrary duty cycle is performed and it is shown that the inverse Class-E amplifier is reasonably tolerant to circuit parameter variations. When compared to the conventional Class-E amplifier the inverse Class-E amplifier offers the potential for high efficiency at increased output power as well as higher peak output power levels than are available with a conventional Class-E amplifier. Further the inverse Class-E amplifier provides more flexibility for deployment with a pulsewidth modulator as the means of producing full-carrier amplitude modulation (AM) due to its ability to operate to high AM modulation indices

Low-distortion CMOS complementary class E RF tuned power amplifiers

A low distortion tuned power amplifier which is suitable for integrated circuit implementation is proposed. The amplifier is a complementary class-E tuned power amplifier because of both P-type and N-type transistors are employed to achieve a highly symmetrical topology, thereby reducing the significant distortion in the output signal of the conventional single-ended class-E power amplifier. In this paper, a complementary class-E power amplifier is presented together with HSPICE simulation results.

Nonresonant and resonant coupled zero voltage switching converters

Two zero-voltage switching power converters with nonresonant and resonant coupling are presented. These are high-order multiple resonant converters in which the circuit modes associated with the converter operation may have different resonant frequencies. The steady-state responses of these converters are derived in terms of state-plane diagrams by using proper state variable transformations. It is shown that the converters have all the desirable features for high-frequency applications and overcome the drawback of load-range limitation of zero-voltage switching associated with the conventional class-E converter.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>