Conventional Cascaded H-bridge Research Articles

Solar PV based seventeen level reduced switch symmetrical multilevel inverter topology fed induction motor

Multilevel inverters have received a lot of interest in recent years due to their ability to deliver more voltage levels than typical two-level inverters. Because of this property, multilevel inverters can produce output waveforms that closely resemble sinusoidal waveforms, lowering harmonic distortion dramatically. The emergence of reduced switch symmetrical multilevel inverter topologies has developed the curiosity of many different power conversion systems. These new topologies offer numerous advantages, including greater output voltage quality, fewer harmonic distortions, and increased power conversion efficiency. The inclusion of these inverters in the feeding of induction motors is one of their many prominent uses. A 17 levels of multi-level inverter (MLI) topology is presented with reduced switch count and harmonic reduction for power quality improvement. The inverter is fed by isolated equal photovoltaic panels which act as direct current or DC source. To reduce complexity, switching pulses are generated using hybrid pulse width modulation technique which is designed as controller. Through the use of MATLAB/Simulink, the performance assessment of a unique cascaded multilevel inverter-based reduced switch symmetrical inverter feeding an induction motor drive has been verified. The harmonic distortion with reduced switches obtained is 7.47% which is comparatively less than when compared with conventional cascaded H-bridge topology.

Comparing performance and complexity of TCHB and CHB multilevel inverters using NLC technique

This paper presents a modulation strategy applied to a 13-level three-phase transistor clamped H-bridge (TCHB) inverter, aimed at a renewable and electric vehicle drives application. A comparison is performed between the TCHB inverter and a traditional cascaded H-bridge (CHB) inverter, considering circuit complexity, switching losses, and total harmonic distortion (THD) attained from each multilevel inverter topologies. The TCHB inverter achieves a 13-level output with only 15 switches, whereas the conventional CHB inverter requires 24 switches. The modulation technique, employing a nearest level control, yields improved output quality for both the TCHB and CHB multilevel inverters. The results demonstrate that this strategy effectively minimizes the overall THD. Notably, previous modulation techniques mainly focused on carrier-based PWM or SVPWM, making this approach distinctive. The FFT analysis reveals a voltage THD of 5.49% for TCHB and 5.15% for CHB, indicating a marginal difference in THD content for each multilevel inverter. Despite the CHB inverter experiencing double the switching stress compared to TCHB, since less switches are required in the TCHB inverter, consequently, the system's total cost and complexity are reduced. The achieved results are verified through the use of simulations carried out in the MATLAB Simulink.

Sensorless Capacitor Voltage Detection Method of Cascaded H-Bridge STATCOM Based on Special Switching Mode Identification

The cascaded H-bridge (CHB) static synchronous compensator (STATCOM) has been widely used in wind farm and conflux station. As the grid-connected voltage increases, the number of cascaded CHB proportionately increases. In order to achieve the capacitor voltage balance, it is necessary to independently detect the capacitor voltage of all H-bridge cells, which raises the cost of capacitor voltage detection. To solve this problem, the mapping relationship is studied between the converter output voltage and capacitor voltages by analyzing carrier phase-shifted sinusoidal pulse width modulation technique (CPS-SPWM), and special switching mode is firstly found. Based on the above finding, without changing the conventional CHB topology, an improved sensorless detection method is proposed to solve the problems of detection error, large computation burden and the application limitation in existing sensorless detection methods. Compared with conventional sensor detection, this method not only saves DC voltage sensors and data transmission channels but also suppress the third harmonics in the converter current. Finally, the effectiveness of the detection method applied on CHB STATCOM is proved by simulation and experiment.

Five-level cascaded H-bridge inverter for renewable energy applications

This paper presents a five-level inverter based on the phase-disposition pulse width modulation (PD-PWM) technique for renewable energy applications. The conventional cascaded H-bridge (CHB) five-level inverter structure is reproduced, and an LC filter is designed to get optimum results from the inverter output. Two batteries are used as renewable energy sources to investigate the performance of the designed inverter. The system can provide 220 volts and 50 Hz AC supply with a 6.9 kW power supply to the load/grid. The designed output is compared with filter and without filter circuit. It provides sinusoidal voltage and current output with a very low total harmonic distortion (THD) of 2.75% which is compliant with IEEE 519 standards. MATLAB/Simulink software tool is used for the entire design. The inverter’s output is graphically represented, and discussed various parameters like switching frequency, THD, modulation index, and rated voltage.

A New Active Front-End Control for Regenerative Cascaded H-Bridge Motor Drives With Filter- Less Interfacing Capability

This paper proposes a new active-front-end (AFE) control method for regenerative Cascaded H-bridge (CHB) motor drives. Conventional CHB converters have dominated the market for the medium-voltage industrial motor drives. However, conventional CHB converters cannot provide regenerative capability. To enable regeneration; diode-front-ends (DFEs) in power cells are replaced with IGBT-based PWM AFEs. Despite the appealing dynamic performance of PWM AFEs, their integration to the CHB converters is not optimal. First, they introduce more semiconductor losses due to the high frequency switching. Second, they introduce switching harmonics that are not cancelled by phase-shifting transformers. Therefore, they require additional harmonic filtering solutions to comply with grid harmonic standards. To resolve these challenges, this paper proposes a new AFE control for regenerative CHB converters based on fundamental frequency switching (FFE) to reduce switching frequency and thus power losses. The operation of FFEs at nominal and sag voltage conditions is presented, in addition to the capability of filter-less interfacing to the transformer. Finally, the performance of the proposed control is validated experimentally on a seven-level regenerative CHB drive.

Negative-Sequence Current Capability in Low-Capacitance Cascaded H-Bridge Static Compensators With Optimal Third- Harmonic Circulating Current Injection

The cascaded H-bridge (CHB) low-capacitance static compensator (LC-StatCom) has a limited negative-sequence current injection capability compared to a conventional CHB StatCom, due to the comparatively larger oscillations on the capacitor voltages. Placing limits on the ability to provide negative-sequence current to the grid for a given capacitor size is required to prevent overmodulation. This article shows that these limits can be maximized by injecting an optimal third-harmonic circulating current. The effects of injecting the third-harmonic current on the capacitor voltages, both in balanced and unbalanced grid voltage conditions, are analyzed. Specifically, the procedure allows the knowledge of the potential capability of the LC-StatCom when injecting negative-sequence currents. The procedure is based on a linear programming approach. Although the procedure is applicable to any CHB StatCom, regardless of the submodule capacitor size, it is particularly important in LC-StatComs. To corroborate the proposed analysis, simulation and experimental results under balanced and unbalanced grid voltage conditions are presented.

A New Low Switching Frequency Control of Regenerative CHB Drive With Low-Voltage Ride-Through Capability

In conventional medium-voltage high-power cascaded H-bridge (CHB) drive, a three-phase rectifier is adopted in each power cell to provide isolated dc-bus voltage for the output H-bridge. This limits the application of the conventional CHB drive, where regeneration capability is desired. The regenerative CHB drive can be made possible by replacing the diode rectifier with a three-phase IGBT-based active-front-end (AFE) rectifier in each power cell. However, due to thermal constraints in the high-power medium-voltage drives, the first challenge of the regenerative CHB drive is to deal with the extra switching losses introduced by the IGBT devices. Another challenge of the grid-tied regenerative CHB drive is to handle the low-voltage sags in the power grid without triggering unnecessary downtime in transients. In this article, a novel low-switching frequency control strategy is proposed for the AFEs in the regenerative CHB drive with low-voltage ride-through (LVRT) capability. The main harmonic contents generated by the AFEs with the proposed control strategy can be eliminated by the existing phase-shifting transformer in the CHB drives. This allows meeting with IEEE STD 519-2014 requirement with a 60 Hz switching frequency to minimize the extra introduced switching losses in steady state. Moreover, LVRT capability is integrated into the proposed control scheme with reduced current sensor count. Accompanied with videos, the experiments on a seven-level regenerative CHB drive are implemented to validate the feasibility of the proposed control scheme, which can be extended to regenerative CHB drives with any voltage levels.

A Transformerless Railway Power Quality Compensator Based on Cascaded H-Bridge Featuring Reduced Branch Capacity Requirement

Featuring high modularity, scalability and transformerless structure, cascaded H-bridge (CHB) based power quality compensator (PQC) is a promising power quality solution for railway power system (RPS). Firstly, branch rating requirements of the conventional CHB based PQCs for co-phase RPS are analyzed under two typical traction transformer schemes, i.e., the V-v scheme and the Scott scheme. Then, a novel CHB based PQC with a special wiring connection style of the Scott transformer is proposed, which achieves reduced total submodule quantity and total branch capacity compared with the conventional solution in V-v and Scott schemes. In addition, a branch current reference generation method is introduced for both branch energy balancing and power quality regulation, which avoids the complicated zero-sequence circulating current injection issue and thus facilitates controller implementation in practice. The effectiveness of the proposed CHB based PQC and the corresponding control strategy is verified by both simulations and experiments.

Photovoltaic‐based grid‐connected transformer‐less three‐phase cascaded diode‐clamped multilevel inverter with reduced leakage current

AbstractA photovoltaic (PV) transformer‐less grid‐connected cascaded diode‐clamped half‐bridge multilevel inverter (MLI) is presented in this paper. Compared with the conventional cascaded H‐bridge (CHB) multilevel inverter, the projected inverter permits connection of double the DC‐link voltage and hence enhances its rating. The most common problem the PV‐based transformer‐less grid‐connected CHB MLI system faces is the flow of leakage currents created by parasitic capacitances due to the disparity in common‐mode voltage. As per the German standards VDE‐V‐0126‐1‐1, the leakage current must be less than 30 mA. In the proposed inverter, due to the high‐frequency pulse width modulation of voltage, a peak leakage current flow of nearly 300 mA at switching frequency (2500 Hz) and about 150 mA at its subsequent harmonics is observed. Therefore, LC‐filters are employed in the proposed inverter to suppress the peak leakage currents to less than 3 mA. Also, the LC‐filters improve the total harmonic distortion (THD) profile of the injected grid current. Further, the proposed inverter is also designed to address the temporary faults. The proposed transformer‐less inverter is simulated using the MatLab/Simulink platform, and the results are experimentally validated by performing on a real‐time hardware‐in‐the‐loop using OPAL‐RT OP5700 digital simulator as plant and dSPACE 1202 as controller.

Performance analysis of novel fault‐tolerant multilevel inverter with a pristine methodology for fast and exhaustive real‐time failure of switches

SummaryMultilevel inverter (MLI) provides a high power density, though the number of devices increases the chances of failures increases, reducing the reliability of power converter. It is essential to detect, isolate, and reconfigure the faults which arises in MLI. The research proposed here is capable of accomplishing the complete fault tolerance against single and multiple devices for both open circuit and short circuit faults. The control algorithm for operation of single‐pole‐double‐throw (SPDT) relays. This methodology is capable of completely preserving the normal operating condition in post‐fault condition also. The output voltage waveform matches by voltage sensors connected across load, and the controllers sense the faults originated from the variation in the look‐up‐table (LUT) and also categorize the nature of the faults. Field‐programmable gate array (FPGA)‐based controller sends a command signal through SPDT to isolate the faulty switches by redundant switches. In this way, the output power across the load is preserved. This research article also covers the comparative study that is made with the existing fault‐tolerant structures. The reliability comparison shows the better performance indices over conventional cascaded H‐bridge (CHB) inverter. The simulation and experimental results validate the effectiveness of control methodology to achieve complete fault tolerance.

A Single-Phase Reduced Component Count Asymmetrical Multilevel Inverter Topology

Multilevel inverters (MLIs) have gained wide attention in industry and academia to provide higher voltage levels with lower harmonics, power losses, and cost. This study proposes a new asymmetrical MLI topology with reduced component count (RCC). The proposed topology can be extended in a three-phase structure and both modular and cascaded configurations to generate the required number of voltage levels for high-voltage applications. To minimize the power losses and the voltage stress on the switches, this configuration has the potential to produce negative polarity without an H-bridge configuration, thereby the active switches are reduced to only three switches in the conduction path. Due to the possibility of applying different switching patterns, this article proposes a new solution by employing particle swarm optimization (PSO) algorithm to determine the optimized dc sources’ magnitude. To improve the voltage quality and minimize the total harmonic distortion (THD), the optimal switching angle (OSA) modulation technique is applied to determine the optimum switching angles by the PSO algorithm. Moreover, the proposed topology’s effectiveness compared to the conventional cascaded H-bridge (CHB) MLI with 15-levels is illustrated by providing comparative results that express fewer power losses. Finally, the proposed topology’s feasibility and its optimization approach are validated by a single-phase prototype utilizing 15- and 25-levels.

Sliding mode controller for extraction and supply of photovoltaic power using switched series parallel sources reduced switch count multilevel inverter

The reduced switch count multilevel inverter (RSC-MLI) is the latest trend in power electronic converters due to reduction in the switch count and cost. However, a large number of RSC-MLIs have not yet reached to the application level because of the absence of modularity, unequal load-sharing among DC sources and the absence of switching redundancies. On the other hand, multilevel dc-link (MLDCL) and switched series parallel sources (SSPS) RSC-MLI topologies are modular structures with adequate switching redundancies and can be an alternative to conventional cascaded H-bridge (CHB) for grid-connected photovoltaic (PV) systems. Therefore, in this paper, a comprehensive comparison among CHB, MLDCL and SSPS topologies has been carried out for grid connected PV application. Based on the outcome, an asymmetric 11 kV three-phase 11-level SSPS RSC-MLI is chosen. In this combination, a common non-linear sliding mode controller (SMC) is developed for generating maximum PV power from asymmetric single-stage PV sources by linearizing the non-linear PV system using an effective feedback linearization scheme. The PV power extracted is delivered to the grid by controlling SSPS RSC-MLI using another SMC. The performance of the system under wide variations of insolation levels is verified in MATLAB and further validated in hardware-in-the-loop OPAL-RT controller.

Performance Evaluation of Cascaded and Reduced Switch Multilevel Inverter Using Modified Carrier Based PWM Technique

This paper proposes an improved harmonic distorted modified triangular carrier-based multicarrier pulse width modulation for generating the switching pulses of a multilevel inverter. This modified triangular wave consists of a triangular wave bearing a close resemblance to an ‘M’ shaped wave. The design of this carrier signal has been optimized to maintain a low level of total harmonic distortion (THD), while increasing the fundamental o/p voltage to ensure the effective DC voltage utilization. Moreover, this optimization reduces the switching losses and improve the efficiency of the power inverter. With the help of this carrier signal, High-frequency alternative phase opposition disposition pulse width modulation (APODPWM) is generated. This new control scheme has been applied to seven levels of conventional cascaded H-bridge with reduced switch multilevel inverter. The output is compared with conventional carrier-based APODPWM. The comparison is made in terms of THD, fundamental output voltages and inverter losses. To ensure quality performance, conventional carrier and modified carrier-based multicarrier PWM topologies are used for the Cascaded seven-level inverter with reduced switch seven-level inverter having a carrier frequency of 2 kHz and modulation index of 0.8-1.30. According to the simulation results, by using the proposed modulation scheme the THD and the switching loss were reduced by 9.64[%] and 4.2[%] respectively. Besides, the proposed modulation technique increases the fundamental output voltages. The total simulation process is done in MATLAB Simulink environment.
 GUB JOURNAL OF SCIENCE AND ENGINEERING, Vol 6(1), Dec 2019 P 12-19

Design and Validation of a Generalized Multilevel Inverter with Simplified Switching Technique

—This paper proposes a generalized 3-phase cascaded multilevel inverter (CMLI) along with a simplified space vector pulse width modulation (SVPWM) based on 2-level inverter (2LI) topology. While conventional cascaded H-bridge inverters (CHBIs) call for a number of DC sources which increase the cost and complexity of their implementation, the proposed CMLI requires one DC source only. On the other hand, the complexity of SVPWM lies in the switching diagram that consists of a large number of triangles comprising uneven numbers of switching vectors. The generalized 3-phase CMLI proposed in this paper is aimed at reducing the number of switching vectors of each triangle. The hypothesis of the proposed CMLI-SVPWM is firstly illustrated through extensive simulation analysis using MATLAB/SIMULINK software. Feasibility of the proposed inverter is then validated through experimental measurements on a hardware prototype. Results reveal the superiority of the proposed inverter over existing ones in terms of the quality of the output voltage and current waveforms and the overall efficiency.

Cascaded Multilevel Converter Topology for Large-Scale Photovoltaic System With Balanced Operation

Cascaded H-bridge (CHB) multilevel converters are promising candidates for large-scale grid-connected photovoltaic systems (megawatt to gigawatt). However, the conventional CHB multilevel converter cannot ensure the inter-module and inter-phase power balance, resulting in imbalanced grid currents. Therefore, in this paper, a new topology consisting of CHB multilevel converters and interleaved-boost full-bridge LLC (IB-FBLLC)-based three-port dc-dc isolation converters is proposed. In this proposed topology, a common dc bus made up of the low-voltage-side ports of IB-FBLLC-based three-port dc-dc converters can completely solve the inherent power imbalance issues. Moreover, the design parameters of dc-dc converters considering the minimization of the input current ripple and optimization of switching frequency range are discussed in detail. Simulation results of the three-phase system and experimental results of the single-phase system clearly verify the effectiveness and feasibility of the proposed topology and control strategies.

Control Strategy of DC-Link Voltage for Single-Phase Back-to-Back Cascaded H-Bridge Inverter for MV Drive With Interfacing Transformer Having Tertiary Winding

This paper describes a dc-link voltage control method of a single-phase back-to-back cascaded H-bridge inverter (SBCI) for a medium-voltage motor drive system. The main advantage of the SBCI topology over the conventional regenerative cascaded H-bridge topology with a three-phase active front-end (AFE) is a simple system structure, which is composed of an input transformer, a power cell, a current sensor, etc. However, the challenging points of the SBCI are larger voltage ripple in the dc-link capacitor and imbalance of dc-link voltages of each phase. The asymmetric dc-link voltage of each power cells could cause unstable operation such as over-modulation due to the lack of the dc-link voltage of a particular phase and result in over-voltage or under-voltage faults. In this paper, the control strategy of the dc-link voltage for the SBCI that uses the negative-sequence voltage of the converter is described. The proposed control method is verified with a computer simulation whose target is a 6.6-kV–1.25-MW medium-voltage drive system. Also, through the experimental setup with the prototype SBCI whose power rating is 16.2 kVA, the dc-link voltage of each AFE has been controlled within a 0.5% error of its reference value at the full load.

A Novel Hybrid Multilevel PWM Technique for Power Rating Enhancement in Improved Hybrid Cascaded Diode Clamped Multilevel Inverter

In this article, an improved hybrid topology called cascaded diode clamped half bridge multi-level inverter is proposed upon a conventional cascaded H-bridge (CHB) multi-level inverter (MLI) which has the limitation to withhold a specific cell voltage due to the constraint on the device voltage stress. The proposed topology will ensure the enhancement of cell voltage capability double times, reduces the device stress, modularity in structure, and allows even power distribution. As a result, the user can now integrate two numbers of active dc sources to a cell. This ensures the efficiency of power enhancement in the applications like on/off grid-connected renewable energy system which require the power to be converted from dc to ac or vice versa. The proposed topology is compared extensively with the conventional CHB MLI at different loads. Hybrid pulse width modulation technique allows to operate the individual half bridge. The simulation and experimental results confirm the performance and efficiency of this proposed topology. A mathematical model of the proposed topology has been derived for the better feasibility of this topology extension to various other applications.

Design and analysis of a transformerless STATCOM based on hybrid cascaded multilevel converter

This paper presents a new concept of Static Synchronous COMpensator (STATCOM) based on a Hybrid Cascaded Multilevel Converter (HCMC). The HCMC consists of a two- level voltage converter and a wave-shaping circuit formed by cascaded H-bridge Sub-Modules (SM). Firstly, the operation principle and overall control strategy of HCMC are presented. After that, some key parameters including size of capacitors, numbers of sub-modules are in-depth analyzed. And then, a thorough comparison between the proposed HCMC-based STATCOM and conventional cascaded H-bridge based STATCOM is made, which turns out that the proposed HCMC-based STATCOM requires less number, size and stored energy of capacitors and has less power loss. Finally, a 35 kV/±50 Mvar HCMC-based STATCOM simulation model is constructed in PSCAD/EMTDC software platform. The simulation results validate the feasibility of the proposed HCMC-based STATCOM and the correctness of the analysis.

A Cascaded Multilevel Inverter Using Only One Battery with High-Frequency Link and Low-Rating-Voltage MOSFETs for Motor Drives in Electric Vehicles

Cascaded H-bridge (CHB) multilevel inverters are widely used in industrial applications, such as medium-voltage conversion and motor drives. However, the DC bus voltage in the electric vehicles is limited and it might not meet the requirements of the inverters for conventional motor drives. This paper presents a solution to drive the conventional motor (3Φ/AC 220 V) with inadequate DC bus voltage (DC 144 V) in an electric vehicle without any extra step-up circuits. The solution consists of a CHB inverter as a motor drive and a high-frequency (HF) transformer to balance the voltage. The multilevel CHB inverter improves the voltage and the current waveforms. High-frequency link (HFL) is used to create several isolated DC sources for the system and it can improve the power density. Besides, it replaces bulky line-transformers in the conventional CHB inverters, and the volume is reduced. Also, the inverter has bidirectional power flow ability, which can improve the efficiency in motor drives. As a result, the reduction of the step-up circuits is achieved and the topology can be used in the electric vehicles that are powered by only one 144 V-battery. The details and the principles of the control algorithm is discussed and an experiment based on a four-level CHB inverter with one DC 30 V power source is carried out to validate the proposed characteristics.

Multilevel Converter Based on Cascaded Three-Leg Converters with Reduced Voltage and Current

In this paper, a modularity concept using standard three-leg converters is addressed. Three-phase cascaded topologies composed of standard three-leg converters are investigated. They are composed of three, nine, twenty-one, or $n$ three-leg converters. It permits the reduction levels of currents and voltages on switches when compared with a conventional three-phase module or a cascaded H-bridge structure. In this way, three-leg cascaded converters are suitable to be applied in scenarios of high current in which other cascaded topologies become less attractive and high voltage. Furthermore, the proposed arrangement brings advantages such as modularity that leads to convenient construction, easy maintenance, and extension to higher voltage and current levels. A dynamic model is developed and a pulse-width modulation strategy is designed to the converter command accordingly with reference voltage. Discussions about fault tolerance and dc-link capacitor currents are also carried out. Comparisons in terms of converter rating, harmonic distortion, and semiconductor power losses between the proposed and conventional cascaded H-bridge topologies have been carried out. Simulation and experimental results are presented as well.