Performance analysis of novel fault‐tolerant multilevel inverter with a pristine methodology for fast and exhaustive real‐time failure of switches

Abstract

SummaryMultilevel inverter (MLI) provides a high power density, though the number of devices increases the chances of failures increases, reducing the reliability of power converter. It is essential to detect, isolate, and reconfigure the faults which arises in MLI. The research proposed here is capable of accomplishing the complete fault tolerance against single and multiple devices for both open circuit and short circuit faults. The control algorithm for operation of single‐pole‐double‐throw (SPDT) relays. This methodology is capable of completely preserving the normal operating condition in post‐fault condition also. The output voltage waveform matches by voltage sensors connected across load, and the controllers sense the faults originated from the variation in the look‐up‐table (LUT) and also categorize the nature of the faults. Field‐programmable gate array (FPGA)‐based controller sends a command signal through SPDT to isolate the faulty switches by redundant switches. In this way, the output power across the load is preserved. This research article also covers the comparative study that is made with the existing fault‐tolerant structures. The reliability comparison shows the better performance indices over conventional cascaded H‐bridge (CHB) inverter. The simulation and experimental results validate the effectiveness of control methodology to achieve complete fault tolerance.