Continuous-wave Laser Lateral Crystallization Research Articles

Analysis of Continuous-Wave Laser Lateral Crystallized Polycrystalline Silicon Thin Films with Large Tensile Strain

Randomly oriented polycrystalline silicon (poly-Si) thin films with a typical grain size of 20×2 µm2 grown by continuous-wave laser lateral crystallization (CLC) were obtained. It was found that CLC poly-Si thin films have a large tensile strain corresponding to 0.6% of single-crystalline Si lattice in the in-plane direction. These results suggest that there is a possibility that not only grain size but also the large tensile strain in in-plane direction can affect thin film transistor (TFT) performance.

7.4: A 2.4‐in. VGA LCD by CW‐Laser Lateral Crystallization Poly‐Si TFTs with Excellent TFT Uniformity

AbstractA low power (lower than 50mW) and high resolution (332ppi) VGA LCD with integrated 6‐bit digital data drivers has been developed using CLC (CW‐Laser Lateral Crystallization) technology. Logic operations at 3V and low power analog buffer circuits are realized by improved uniformity of TFT characteristics. Integration of digital drivers with line‐at‐a‐time driving scheme is achieved by fine lithography technology (2μm pitch wiring).

Process Integration on Glass Substrate by CW Laser Lateral Crystallization (CLC)

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Submicron-scale characterization of poly-Si thin films crystallized by excimer laser and continuous-wave laser

Stress and defects in polycrystalline silicon (poly-Si) for thin-film transistor (TFT) were investigated on the aspect of difference of techniques between excimer laser annealing (ELA) with extremely short pulse duration and continuous-wave laser lateral crystallization (CLC). Micro-Raman spectroscopy was used for characterization. Mapping measurements with high spatial resolution were carried out for the optical-phonon mode at ∼520 cm−1 to observe distribution of stress and defects. Defects were characterized also by local-vibration modes (LVMs) in ∼2000 cm−1 region, where LVMs were induced by terminating dangling bonds at defects with hydrogen atoms. Significant tensile stress was found for both ELA and CLC, which magnitude is dominated by the thermal stress. The stress in ELA poly-Si tends to relax in the vicinity of grain boundaries. Densities of defects in grains and dangling bonds at grain boundaries in CLC poly-Si films were apparently smaller than those in ELA films. Those differences are attributed to cooling rates of ELA and CLC. The defects in CLC poly-Si distribute extending along the laser scan direction parallel to TFT channel current, which is effective to prevent the deterioration of TFT characteristics by residual defects.

High Performance Low Temperature Polycrystalline Silicon Thin Film Transistors on Non-alkaline Glass Produced Using Diode Pumped Solid State Continuous Wave Laser Lateral Crystallization

High performance low temperature polycrystalline silicon (poly-Si) thin film transistors (TFTs) with large grains were created using diode pumped solid state (DPSS) continuous wave (CW) laser lateral crystallization (CLC), employing fabrication processes at 450°C. Field-effect mobilities of 566 cm2/Vs for the n-channel and 200 cm2/Vs for the p-channel were obtained for a thick Si film (100–150 nm) on a 300×300 mm non-alkaline glass substrate. The high performance of the TFTs is attributed to the predominantly (100)-oriented very large grains. With a decreasing Si-film thickness, the grain size decreases, and the surface orientation of the grain changes from (100) to other orientations. These effects lead to reduced field-effect mobility with decreasing Si-film thickness, but it is easy to obtain a high field-effect mobility of over 300 cm2/Vs, even with a 50 nm thick Si film, without special processing techniques. A complementary metal oxide semiconductor (CMOS) ring oscillator was fabricated using a thin Si film 65 nm thick to demonstrate the high circuit performance of CLC poly-Si TFTs by applying the simplest CMOS process technology. A delay of 400 ps/stage at a gate length of 1.5 µm and a supply voltage of Vdd=5.0 (V) was produced on a large non-alkaline glass substrate utilizing a fabrication temperature of 450°C. This crystallization method will lead to the fabrication of high-performance and cheap Si-LSI circuits on large non-alkaline glass substrates.

Application of CW Laser Crystallization for Display Devices.

High-performance poly-Si TFTs were created using the diode pumped solid-state (DPSS) continuous-wave (CW) laser lateral crystallization (CLC) method through fabrication processes at no higher than 450 °C. With decreasing Si film thickness, the grain size became finer and the surface orientation of the grains changed from (100) to other orientations. These effects reduced the field-effect mobility as the Si film became thinner, but with the CLC method we can still obtain a high field-effect mobility of over 300 cm2/Vs without applying special processing techniques, even from a Si film as thin as 50 nm. We expect this crystallization method to lead to the fabrication of high-performance Si-LSI circuits on large non-alkaline glass substrates.

12.3: High Throughput CW‐Laser Lateral Crystallization for Low‐Temperature Poly‐Si TFTs and Fabrication of 16 bit SRAMs and 270MHz Shift Registers

AbstractThroughput improvement and fabrications of 4×4 bit SRAMs and 270 MHz shift registers are described for the CW‐Laser Lateral Crystallization (CLC) of amorphous‐Si on glass substrate. For the pixel array, effective area‐crystallization rate is improved to 48cm2/s for 171ppi and 68cm2/s for 119ppi by 16 sub‐laser‐beams and 2m/s scanning speed.