Continuous-time Digital Signal Processing Research Articles

A Wide Tuning Range Delay Element for Event-Driven Processing of Low-Frequency Signals in 28-nm FD-SOI CMOS

This letter presents a widely tunable digital delay element suitable for low-power low-frequency continuous-time digital signal processing systems. The design uses features of the 28-nm fully depleted silicon-on-insulator (FD-SOI) CMOS technology to precisely control currents in the pA range and significantly reduce the leakage power. The measured tuning range is significantly larger than prior art covering more than 3 decades from 30 ns to 100 $\mu \text{s}$ making it suitable for CT-DSP low-frequency filters. At 0.7-V supply voltage, the dynamic power consumption is 15 fJ/event with a residual power consumption due to leakage of 14 pW.

Reconstruction of Signals From Level-Crossing Samples Using Implicit Information

This paper focuses on the recovery of bandlimited signals from level-crossing samples by exploiting not only the knowledge of when given levels are crossed by the input, but also the implicit information that the signal stays between neighboring levels in the time intervals between the level crossings. We propose to use the technique of projection onto convex sets (POCS) for perfect signal reconstruction from either the level crossings or the associated implicit information. Two POCS algorithms are proposed: iterative POCS and one-step POCS. While the one-step POCS is based on matrix inversion, the iterative projections can be implemented using a chain of standard circuit operations: a low-pass filter and a clipping circuit, respectively. The perfect signal recovery of the infinite projection iteration can be viewed as the completion of the nonperfect input reconstruction achieved in continuous-time digital signal processing from level crossings. The comparative analysis of simulation results for both iterative and one-step POCS algorithms show the importance of a good selection of the initial guess for the POCS reconstruction.

A Mind for All Seasons

It is always fascinating to follow (and learn from) the scientific contributions of an accomplished researcher, particularly so when one works in the same area. Over four decades, Yannis Tsividis has made substantial contributions to circuits and systems at several levels: device modeling, circuit simulation methods, integrated circuit design, and signal processing techniques?each one an area on which an entire academic career could possibly be spent. During his PhD and for several years thereafter, he contributed to several IC designs, starting from the first integrated MOS opamp. Then, while investigating bandgap references and starting to write a book on circuits, he made his foray into device modeling, mainly of the MOS transistor. This work, spanning seven years culminated in the famous book, Operation and Modeling of the MOS Transistor, now in its third edition. Around the late seventies, switched-capacitor filters began finding widespread use in the telecom industry. Yannis started investigating analysis methods for switched-capacitor networks which eventually resulted in SWITCAP, a popular and highly efficient tool for simulating switched capacitor circuits. In the early 1980s, he began working on continuous-time filters?an area that received bulk of his attention for the next two decades. In the last decade, he has been investigating continuous-time digital signal processing, wherein analog signals are quantized and processed without being sampled. This has led to a number of techniques and offshoots into other areas of electronics.

Asynchronous signal processing for brain-computer interfaces

Brain-computer interfaces (BCIs) provide a way to monitor and treat neurological diseases. An important application of BCIs is the monitoring and treatment of epilepsy, a neurological disorder characterized by recurrent unprovoked seizures, symptomatic of abnormal, excessive or synchronous neuronal activity in the brain. BCIs contain an array of sensors that gather and transmit data under the constrains of low-power and minimal data transmission. Asynchronous sigma delta modulators (ASDMs) are considered an alternative to synchronous analog to digital conversion. ASDMs are non-linear feedback systems that enable time-encoding of analog signals, from which the signal can be reconstructed. An efficient reconstruction of time-encoded signals can be achieved using a prolate spheroidal waveform (PSW) projection. PSWs have finite time support and maximum energy concentration within a given bandwidth. The ASDM time-encoding is related to the duty-cycle modulation and demodulation, which shows that sampling is non-uniform. For transmission of data from BCI, we propose a modified orthogonal frequency division multiplexing (OFDM) technique using chirp modulation. Our method generalizes the chirp modulation of binary streams with non-uniform symbol duration. Our theoretical results relate to recent continuous-time digital signal processing and compressive sampling theories.

Continuous-Time Digital Controller for High-Frequency DC-DC Converters

<para xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> This paper introduces a voltage mode digital controller for low-power high-frequency dc-dc switch-mode power supplies (SMPS) that has fast transient response, approaching physical limitations of a given power stage. In steady state, the controller operates as a conventional pulsewidth modulation regulator and during transients it utilizes a novel fast voltage recovery mechanism, based on real-time processing of the output voltage in digital domain. This continuous-time digital signal processing mechanism is implemented with a very simple processor consisting of a set of asynchronous comparators, delay cells, and combinatorial logic. To eliminate the need for current measurement and calculate the optimal switching sequence of the power stage transistors, the processor performs a capacitor charge balance algorithm, which is based on the detection of the output voltage peak/valley point. The effectiveness of the controller is demonstrated on an experimental 5 W, 5 V to 1.8 V, 400 kHz buck converter. The converter recovers from load transients through a single on-off action of the power switch, virtually reaching the shortest possible time, limited by the values of the power stage filter components only. </para>

Continuous-time digital signal processing

Digitally processing quantised (but not sampled) signals produces no aliasing and reduces the in-band quantisation error. Techniques for accomplishing such processing are proposed. Experimental evidence is included.