Continuous Readout Mode Research Articles

The O2 software framework and GPU usage in ALICE online and offline reconstruction in Run 3

The O² software framework and GPU usage in ALICE online and offline reconstruction in Run 3

Rate-capability of the VMM3a front-end in the RD51 Scalable Readout System

The VMM3a is an Application Specific Integrated Circuit (ASIC), specifically developed for the readout of gaseous detectors. Originally developed within the ATLAS New Small Wheel (NSW) upgrade, it has been successfully integrated into the Scalable Readout System (SRS) of the RD51 collaboration. This allows, to use the VMM3a also in small laboratory set-ups and mid-scale experiments, which make use of Micro-Pattern Gaseous Detectors (MPGDs). As part of the integration of the VMM3a into the SRS, the readout and data transfer scheme was optimised to reach a high rate-capability of the entire readout system and profit from the VMM3a’s high single-channel rate-capability of 3.6Mhits/s. The optimisation focused mainly on the handling of the data output stream of the VMM3a, but also on the development of a trigger-logic between the front-end cards and the DAQ computer. In this article, two firmware implementations of the non-ATLAS continuous readout mode are presented, as well as the implementation of the trigger-logic. Afterwards, a short overview on X-ray imaging results is presented, to illustrate the high rate-capability from an application point-of-view.

A new imaging technology based on Compton X-ray scattering.

A feasible implementation of a novel X-ray detector for highly energetic X-ray photons with a large solid angle coverage, optimal for the detection of Compton X-ray scattered photons, is described. The device consists of a 20 cm-thick sensitive volume filled with xenon at atmospheric pressure. When the Compton-scattered photons interact with the xenon, the released photoelectrons create clouds of secondary ionization, which are imaged using the electroluminescence produced in a custom-made multi-hole acrylic structure. Photon-by-photon counting can be achieved by processing the resulting image, taken in a continuous readout mode. Based on Geant4 simulations, by considering a realistic detector design and response, it is shown that photon rates up to at least 1011 photons s-1 on-sample (5 µm water-equivalent cell) can be processed, limited by the spatial diffusion of the photoelectrons in the gas. Illustratively, if making use of the Rose criterion and assuming the dose partitioning theorem, it is shown how such a detector would allow obtaining 3D images of 5 µm-size unstained cells in their native environment in about 24 h, with a resolution of36 nm.

The ALICE Muon IDentifier (MID)

During the LHC Run-I (2010–2013) and Run-II (2015–2018), the selection of interesting events for muon physics in ALICE was performed with a dedicated muon trigger system, composed of 72 single-gap phenolic Resistive Plate Chambers (RPCs) operated with current front-end electronics (ADULT FEE) that provides no amplification for the detector pulses. From Run-III starting in 2021 on, in order to fully profit from the increased luminosity of Pb-Pb collisions, the ALICE experiment will run in continuous readout (triggerless) mode and the Muon TRigger system (MTR), therefore, plays the role of a Muon IDentifier (MID). The read-out electronics is being upgraded in order to support continuous readout. Furthermore, in order to increase the RPC rate capability and to mitigate possible aging effects, it is advantageous to operate the detectors with a lower gain avalanche mode by using higher sensitive FEE. Therefore, we decided to replace the current FEE cards with new ones named Front-End Electronics Rapid Integrated Circuit (FEERIC) equipped with an amplification stage. Also, an upgrade of the threshold distribution system to the front-end will allow one to tune thresholds at the single front-end card level, while this was previously only possible at the single-RPC level. Finally, since some of the RPCs currently installed in ALICE have accumulated charges significantly comparable to the value that is expected in their lifespan, roughly 25% of the detectors are planned to be replaced by new ones constructed with new phenolic high-pressurized laminates (HPL). A detailed description of the MTR upgrade and of its current status will be presented in this contribution.

Space-point calibration of the ALICE TPC with track residuals

In the LHC Run 3, starting in 2021, the upgraded Time Projection Chamber (TPC) of the ALICE experiment will record minimum bias Pb–Pb collisions in a continuous readout mode at an interaction rate up to 50 kHz. This corresponds to typically 4-5 overlapping collisions during the electron drift time in the detector. Despite careful tuning of the new quadruple GEM-based readout chambers, which fulfill the design requirement of an ion backflow below 1%, these conditions will lead to space-charge distortions of several centimeters that fluctuate in time. They will be corrected via a calibration procedure that uses the information of the Inner Tracking System (ITS), which is located inside, and the Transition Radiation Detector (TRD) and Time-Of-Flight system (TOF), located around the TPC, respectively. By using such a procedure the intrinsic track resolution of the TPC of a few hundred micrometers can be restored. The required online tracking algorithm for the TRD, which is based on a Kalman filter, is presented. The procedure matches extrapolated ITS-TPC tracks to TRD space-points utilizing GPUs. Subsequently these global tracks are refitted neglecting the TPC information. The residuals of the TPC clusters to the interpolation of the refitted tracks are used to create a map of spacecharge distortions. Regular updates of the map compensate for changes in the TPC conditions. The map is applied in the final reconstruction of the data. First performance results of the tracking algorithm will be shown.

The Front-End Electronics for the Tracking System of the ALICE Muon Spectrometer

A review of the two generations of front-end electronics for the muon spectrometer of the ALICE experiment at the Large Hadron Collider is presented. The basic elements of the front-end electronics are application-specific integrated circuits that are used in 1.1 × 106 measuring channels and devices for communication with the data-acquisition system. The first generation of the electronics operates in the trigger mode and is characterized by an input throughput of 3 × 103 events/s at an output data rate of 3.2 Gbit/s. The second generation is designed to operate under conditions of a high luminosity of the collider at input count rates of up to 105 events/s. Signal processing is performed in the continuous readout mode. The communication devices with the data-acquisition system use application-specific chips that provide optical communication with a data transfer rate of 0.8 Tbit/s.

IBEX: Versatile Readout ASIC With Spectral Imaging Capability and High Count Rate Capability

IBEX is a novel mixed-mode CMOS application-specific integrated circuit (ASIC), developed at DECTRIS Ltd., dedicated to the readout of hybrid photon counting semiconductor pixel detectors. The chip has been strictly designed in a radiation tolerant enclosed transistor layout and is fabricated in a 110-nm CMOS technology with eight metal layers. It consists of a $256\times 256$ matrix of $75\times 75\,\,\mu \text {m}^{2}$ pixels, which results in an overall chip size of $19.27\times 19.76$ mm2 with periphery, supply, and I/O pads included. A so-called merging mode allows for an increased pixel size of $150\times 150\,\,\mu \text {m}^{2}$ . The pixel readout electronics supports electrons and holes collection, and consists of a charge sensitive preamplifier with programmable gain, a shaper, and two comparators that allow for two independent energy thresholds. In the merging mode, the number of energy thresholds is increased up to four. In order to minimize the pixel-to-pixel energy threshold variation, each pixel comparator can be adjusted with a 6-bit trim digital-to-analog converter. The ASIC can operate in a continuous readout mode with two independent 16-bit counters or in a high counting range mode with a single 32-bit counter per energy threshold level. The chip features counter overflow handling and an instant retrigger technology with an adjustable retrigger time for a significantly improved high-rate counting performance. The ASIC offers a selectable external data bus width of 4, 8, or 16-bit. The count rate limit of the readout chip dc-coupled with a silicon sensor lies at around 10 Mcts/s/pix. The measurements show an electronic pixel noise of $89\,\,e^{-}$ rms and the detectable photon energy range between 3 and 160 keV.

32k Channel Readout IC for Single Photon Counting Pixel Detectors with Pitch, Dead Time of 85 ns, Offset Spread and 2% rms Gain Spread

This paper presents a readout integrated circuit called UFXC32k, designed for hybrid pixel semiconductor detectors used in X-ray imaging applications. The UFXC32k integrated circuit, designed in a CMOS 130 nm process, contains about 50 million transistors in the area of $9.64\;\hbox{mm} \times 20.15\;\hbox{mm}$ . The core of the IC is a matrix of $128 \times 256$ square-shaped pixels of ${\hbox{75}}\;\mu\hbox{m}$ pitch. Each pixel contains a charge sensitive amplifier, a shaper, two discriminators, and two 14-bit ripple counters. The analog front-end electronics allow processing of sensor signals of both polarities (holes and electrons). The UFXC32k chip is bump-bonded to a pixel silicon sensor and is fully characterized using X-ray radiation. The measured equivalent noise charge for the standard settings is equal to $123 {{\rm e}^ - }\;\hbox{rms}$ (for the peaking time of 40 ns) and each pixel dissipates $26\;\mu\hbox{W}$ . Thanks to the use of trim blocks working in each pixel independently, an effective offset spread calculated to the input is only $9 {{\rm e}^ - }\;\hbox{rms}$ with a gain spread of 2%. The maximum count rate per pixel depends mainly on effective CSA feedback resistance. Dead time in the front end can be set as low as 85 ns. In the continuous readout mode, a user can select the number of bits read out from each pixel to optimize the UFXC32k frame rate, e.g., for a readout of 2 bits/pixel with 200 MHz clock, the frame rate is equal to 23 kHz.

High frame rate measurements of semiconductor pixel detector readout IC

We report on high count rate and high frame rate measurements of a prototype IC named FPDR90, designed for readouts of hybrid pixel semiconductor detectors used for X-ray imaging applications. The FPDR90 is constructed in 90nm CMOS technology and has dimensions of 4mm×4mm. Its main part is a matrix of 40×32 pixels with 100μm×100μm pixel size. The chip works in the single photon counting mode with two discriminators and two 16-bit ripple counters per pixel. The count rate per pixel depends on the effective CSA feedback resistance and can be set up to 6Mcps. The FPDR90 can operate in the continuous readout mode, with zero dead time. Due to the architecture of digital blocks in pixel, one can select the number of bits read out from each counter from 1 to 16. Because in the FPDR90 prototype only one data output is available, the frame rate is 9kfps and 72kfps for 16 bits and 1 bit readout, respectively (with nominal clock frequency of 200MHz).

A Prototype Pixel Readout IC for High Count Rate X-Ray Imaging Systems in 90 nm CMOS Technology

We report on the design of a prototype IC called PX90 dedicated for readout of hybrid semiconductor detectors used for X-ray imaging applications. The PX90 has dimensions of 4 mm × 4 mm and was designed in CMOS 90 nm technology with 9 metal layers. The core of the IC is a matrix of 40 × 32 pixels with 100 m × 100 m pixel size. A 60 m × 60 m square passivation opening in each pixel allows connecting PX90 to a semiconductor detector using stud bump bonding technique. Each pixel contains two charge sensitive amplifiers with Krummenacher feedback scheme, two second stage amplifiers, two discriminators and two 16-bit ripple counters. The stages are DC-coupled and the front-end electronics uses a fully differential readout scheme. To minimize the effective threshold spread at the discriminators inputs, one 8-bit and one 7-bit trim DACs are used. The PX90 can operate in continuous readout mode and in readout mode separate from exposure. The readout of each pixel has some additional functionality, like compression mode or readout of only given number of bits from each pixel. The data are read out via a single LVDS output with 200 Mbps rate.

RG64—High Count Rate Low Noise Multichannel ASIC With Energy Window Selection and Continuous Readout Mode

We report on the performance of a low noise and high count rate readout ASIC with binary architecture and energy window selection for X-ray imaging applications using semiconductor detectors. The ASIC called RG64 is designed in 0.35 mum CMOS process and its total area is 3900times5000 mum2. The core of RG64 consists of 64 readout channels. Each channel is built of a charge sensitive amplifier with a second order shaper of peaking time 75 ns, two independent discriminators with an 8-bit offset correction circuit and two independent 20-bit counters with RAM memory buffers. The ENC of the circuit reaches the value of about 126 el. rms with 1 pF input load and 5 mW power consumption per single channel. The mean gain in the multichannel ASIC is about 50 muV/el., with the dispersion from channel to channel of 0.9% (on one sigma level). The deviation of the effective threshold voltage spread for given energy can be reduced to less than 7 el. rms (calculated to the charge sensitive amplifier input). High count rate measurements have been performed up to 2 Mcps of average rate of input pulses, both for AC and DC coupled silicon strip detectors with X-ray photons of energy 8.04 keV. The RG64 can operate both in the continuous readout mode and in the readout mode separate from exposure.

Silicon Drift Detectors development for position sensing

Novel Silicon Drift Detectors (SDDs) with multi-linear architecture specifically intended for 2D position sensing and imaging applications are presented and their achievable spatial, energy and time resolution are discussed. The capability of providing a fast timing of the interaction with nanosecond time resolution is a new available feature that allows operating the drift detector in continuous readout mode for coincidence imaging applications either with an external trigger or in self-timing. The application of SDDs with multi-linear architecture to Compton electrons’ tracking within a single silicon layer and the achieved experimental results will be discussed.

Arrays of InP-based Avalanche Photodiodes for Photon Counting

Arrays of InP-based avalanche photodiodes (APDs) with InGaAsP absorber regions have been fabricated and characterized in the Geiger mode for photon-counting applications. Measurements of APDs with InGaAsP absorbers optimized for 1.06 <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">mu</i> m wavelength show dark count rates (DCRs) <20 kHz for room-temperature operation with photon detection efficiency (PDE) up to 50% and a reset or dead time of 1s. APDs with InGaAs absorbers optimized for 1.55 μm wavelength and 240 K temperature have DCRs <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&lt;</i> 20 kHz, PDE up to 45%, and a reset time of ~6 <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">mu</i> s. Arrays for both wavelengths have been fabricated and packaged with GaP microlenses (of 100 and 50 μm pitch) and CMOS readout integrated circuits (ROICs). Comparisons are made between ROICs that operate in the framed-readout mode as well as those that operate in continuous-readout mode.

A Search for Radial Velocity Oscillations in Procyon

I describe here a new technique for precision radial velocity measurements, using an iodine absorption cell in front of the slit of a high resolution spectrograph. A CCD in a continuous readout mode records a timeseries of stellar spectra with a duty cycle of unity. In January 1987, observations were obtained on two clear nights with bad seeing. No oscillations were detected in the data, but the technique shows promise for significantly better results under better conditions.