Conduction Mode Power Factor Correction Research Articles

Power Loss Model for GaN-Based MHz Critical Conduction Mode Power Factor Correction Circuits

Wide bandgap (WBG) devices allow power factor correction (PFC) circuits to operate at megahertz (MHz), which improves power density. In low-power applications, critical conduction mode (CrM) boost PFC circuits are widely used due to its simple structure and minimized turn-on loss. Compared with the kilohertz (kHz) operation, MHz PFC in CrM yields larger inductor valley current during the zero voltage or valley switching turn-on, and significant grid current zero-crossing distortion, both of which are not considered in conventional PFC behavioral models. As a result, the conventional PFC design tool shows substantial inaccuracy in the estimation of switching frequency, inductor current envelopes, and power loss. This article analyzes these issues and proposes an improved power loss model to aid the design of MHz CrM PFC. Experimental results are presented to validate the accuracy.

Dynamic Strategy for Efficiency Estimation in a CCM-Operated Front-End PFC Converter for Electric Vehicle Onboard Charger

This paper presents a method for efficiency estimation of boost-derived continuous conduction mode power factor correction (CCM-PFC) converters for electric vehicle (EV) onboard chargers. The proposed methodology incorporates converter nonidealities, especially caused by magnetic components. The value of magnetizing inductance in an inductor or transformer core does not remain constant over variable current levels, which causes nonuniform power losses at different current levels. The method proposed in this paper considers a time-variant inductance over various current levels and accordingly establishes a dynamic model of loss estimation. As a proof-of-concept verification, the approach is applied to three different PFC topologies for EV applications and the estimated conversion efficiencies exhibit good agreement with experimentally obtained efficiency values over a wide range of load power from 400 W to 4.6 kW. The deviation of the efficiency predicted from the experimental data is considerably lower in comparison with the existing estimation methods with fixed inductance assumption.

Control method for improving the response of single‐phase continuous conduction mode boost power factor correction converter

Continuous conduction mode power factor correction AC–DC converters are widely employed as the front stage in power supplies with medium or high output power. The second-order reactive input power in single-phase systems causes second-order ripple in the DC-link voltage. The speed of voltage regulation is thus limited by the second-order frequency in seeking to achieve low distorted input current. This study presents a fast second-order voltage estimation method, wherein an integrator is used for the estimation of second-order voltage ripple to obtain rapid voltage feedback without ripple and thereby cope with the limitations imposed by the second-order frequency. This approach greatly expands the bandwidth of the voltage control loop beyond the second-order frequency while reducing the total harmonic distortion associated with the input current. This also makes it possible to reduce the DC capacitance to reduce costs. The authors opted for full digital control using a TI F28335 DSP IC, in conjunction with feedback plus feedforward control to facilitate the design of the current loop. A feedback current corrector is used to reduce distortion associated with the input current over a wide load range. The effectiveness of the proposed control method was confirmed with some simulation and experimental results.

Design and Analysis of an Interleaved Boundary Conduction Mode (BCM) Buck PFC Converter

This paper presents the design considerations and analysis for an interleaved boundary conduction mode power factor correction buck converter. A thorough analysis of the harmonic content of the AC line current is presented to examine the allowable voltage gain (K value) for meeting the EN61000-3-2, Class D standard while maximizing efficiency. The results of the harmonic analysis are used to derive the required value of K and therefore the output voltage necessary to meet the class D requirements for a given AC line voltage. The discussed design consideration and harmonic current analysis are verified on a 300W universal line experimental prototype converter with an 80V output. The measured efficiencies remain above 96% down to 20% of the full load. The input current harmonics also meet the IEC61000-3-2 (class D) standard.

Universal Digital Controller for Boost CCM Power Factor Correction Stages Based on Current Rebuilding Concept

Continuous conduction mode power factor correction (PFC) without input current measurement is a step forward with respect to previously proposed PFC digital controllers. Inductor volt-second (vs <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">L</sub> ) measurement in each switching period enables digital estimation of the input current; however, an accurate compensation of the small errors in the measured vs <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">L</sub> is required for the estimation to match the actual current. Otherwise, they are accumulated every switching period over the half-line cycle, leading to an appreciable current distortion. A vs <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">L</sub> estimation method is proposed, measuring the input (v <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">g</sub> ) and output voltage (v <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">o</sub> ). Discontinuous conduction mode (DCM) occurs near input line zero crossings and is detected by measuring the drain-to-source MOSFET voltage v <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ds</sub> . Parasitic elements cause a small difference between the estimated voltage across the inductor based on input and output voltage measurements and the actual one, which must be taken into account to estimate the input current in the proposed sensorless PFC digital controller. This paper analyzes the current estimation error caused by errors in the ON-time estimation, voltage measurements, and the parasitic elements. A new digital feedback control with high resolution is also proposed. It cancels the difference between DCM operation time of the real input current, (T <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">DCM</sub> <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">g</sup> ) and the estimated DCM time (T <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">DCM</sub> <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">reb</sup> ). Therefore, the current estimation is calibrated using digital signals during operation in DCM. A fast feedforward coarse time error compensation is carried out with the measured delay of the drive signal, and a fine compensation is achieved with a feedback loop that matches the estimated and real DCM time. The digital controller can be used in universal applications due to the ability of the DCM time feedback loop to autotune based on the operation conditions (power level, input voltage, output voltage...), which improves the operation range in comparison with previous solutions. Experimental results are shown for a 1-kW boost PFC converter over a wide power and voltage range.

Single switch three‐phase ac to dc converter with reduced voltage stress and current total harmonic distortion

A three-phase ac/dc converter with low-voltage stress and current total harmonic distortion (THD) for micro-scale wind turbines is proposed in this study. A coupled inductor and buffering capacitors are integrated in the proposed converter to reduce the voltage stresses on the main switch and diodes. Moreover, the discontinuous conduction mode power factor correction technique is adopted to reduce the generator current THD. Corresponding operation principles of the proposed converter are also analysed and illustrated. A prototype with rated output power 200 W was constructed for evaluating the validity and performance of the proposed converter. From the experimental results, it can be seen that the voltage stress of all the active switches and diodes is reduced to half of the output voltage. Owing to the reduced voltage stress, the generator current THD and converter efficiency are both improved with respect to the conventional three-phase single switch ac/dc converter. The efficiency is improved to about 92% which is 10% higher than the conventional single switch rectifier and the current THD is reduced by 2–6%.

Research on Self-Drive of Critical Conduction Mode Power Factor Correction Converters Based on Charge Pump

The charge pump, which is used to realize self-drive in power factor correction (PFC) converters working in critical conduction mode, was studied in this paper. The charge pump was a RCD network made up of a resistor, a capacitor and a diode, and could be divided into three kinds of modality. The state equation of each modality and the connection between them was build, and theoretical waveform was figured. The design guideline in form of equations was also proposed considering the voltage variation and the time constant of the charge pump. Finally, a 200W prototype was build, and the experimental results matches well with the theoritical analysis.

Control Loop Design for a PFC Boost Converter With Ripple Steering

In this paper, an average switch model approach to the power stage modeling, feedback compensation network design, and dynamic analysis of power factor correction (PFC) boost converters with ripple steering is presented. The model is expressed by the derivation of power stage transfer functions for a conventional boost converter and then followed by the derivation of the power stage transfer functions for a boost converter with ripple steering. A detailed design procedure and comparison of both voltage and current feedback loops are given in a conventional PFC boost converter and boost converter with ripple steering. Experimental and simulation results of a prototype boost converter converting universal ac input voltage to 400 V dc at 1.6 kW are given to verify the proof of concept and analytical work reported. The experimental results demonstrate that the model can correctly predict the steady-state behavior of a continuous conduction mode PFC boost converter with ripple steering.

High power factor transformerless single-stage single-phase ac to high-voltage dc converter with voltage multiplier

This study proposes a transformerless single-stage single-phase ac to high-voltage dc converter based on Cockcroft–Walton (CW) voltage-multiplier circuit with only adding one bi-directional switch and one boost inductor. This study also derives a new method of circuit representation for CW voltage multiplier, which simplifies the equivalent circuit and is convenient for simulation. Compared with conventional CW voltage multiplier, the proposed converter provides half-wave symmetry and low-distorted line current, improved power factor at the ac source and a regulated dc output voltage for wide load range. In addition, a current-fed analysis approach is used to derive a general expression of the output voltage ripple as function of the load to facilitate the design of the system parameters. A commercial average-current-control continuous conduction mode power factor correction integrated circuit (IC) is used to implement the control strategy of the proposed converter that does not need the multiplier and sensing of the input ac voltage; this strategy simplifies the design and reduces the control circuit components. A 500 W prototype is built for testing. Both simulation and experimental results demonstrate the validity of the proposed converter.

Control of multiple single-phase PFC modules with a single low-cost DSP

In this paper, a new control scheme is proposed for controlling multiple single-phase power-factor-correction (PFC) modules with a single low-cost digital signal processor (DSP). The proposed scheme allows for multiple PFC modules of different current ratings to be operated in parallel and controlled via a single DSP. DSP-based control handles simple current sharing and provides size reduction. The paper describes a current sense technique for each PFC module and a closed-loop control algorithm for output voltage and input current control for operating multiple modules. In the example design, switching frequency is set at 120 kHz and two continuous conduction mode PFC stages are operated in parallel and controlled via a single TMS320LF2407 DSP. Experimental results show that the proposed scheme is capable to be used for modern switching power supplies.