Conduction Angle Research Articles

Determining the Control Objectives of a Switched Reluctance Machine for Performance Improvement in Generating Mode

This paper presents a methodology to determine the control objectives of conduction angle control in generating mode of operation in a switched reluctance machine. First, the performance in motoring mode of control is compared with generating mode for different operating points. Then, the key optimization objectives are established to improve a switched reluctancemachine's performanceingenerating mode. A multi-objective optimizer is used to select the conduction angles. The proposed generating-specific objectives are maximizing source current per torque and minimizing torque ripple. These objectives are then compared with the motoring-specific objectives, such as maximizing average torque and minimizing torque ripple for a wide speed range. Finally, the proposed generating objectives have been validated experimentally using a three-phase 12/8 SRM.

Decoupled Control Scheme for THD Reduction and One Specific Harmonic Elimination in the Modular Multilevel Converter

This article proposes a decoupled control scheme for the modular multilevel converter (MMC) to reduce the total harmonic distortion (THD) and eliminate one specific harmonic. First, to realize the decoupled control between the ac and dc paths of the MMC, an improved nearest level control (INLC) method is proposed. It applies the <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">round</i> function to generate the ac output voltage levels, instead of the arm output voltage levels. Thus, a staircase wave is generated by the INLC method. Then, by adding an additional pulse to each quarter of the staircase wave, one specific harmonic can be eliminated without optimizing each conduction angle. Furthermore, a decoupled circulating current fuzzy control method is proposed to suppress the second-order harmonic and balance the arm energy. By this decoupled control structure, the output voltage and the circulating current can be controlled independently. Taking the fifth-order harmonic as an example, simulation and experimental results validate that the proposed scheme can simultaneously realize THD reduction and one specific harmonic elimination in the MMC output voltage.

Влияние параметров питающей сети на стабильность фазового регулирования при контактной сварке

Resistance welding in large-scale manufacturing is carried out with a significant number of disturbances, the cumulative effect of which may exceed the capabilities of modern control equipment. Most resistance welding control systems used in industry to compensate for existing disturbances provide welding current phase control depending on the measured parameters characterizing the process of welded joint formation. The efficiency of such controllers is largely determined by the accuracy of measuring and setting the phase control parameters, which include the opening and conduction angles of welding thyristors. The paper shows that when switching on a contact machine, a phase shift of the mains voltage occurs in the load mode relative to the mains voltage in the idle mode. Using a simplified electric equivalent circuit of a contact welding machine, the paper describes the nature of the phase shift of the mains voltage. Circuit active resistance and inductance are selected as parasitic parameters of the mains. The authors simulated the electrical processes in the contact machine according to the three-loop equivalent circuit. The study shows the influence of mains parasitic parameters on the phase regulation stability, the features of the obtained current and voltage oscillograms. Depending on the mains and contact welding machine parameters, the phase shift magnitude ranges from fractions to units of an electrical degree. With welding current parametric stabilization by the mains voltage, the influence of mains parasitic parameters can be neglected. When the regulator operates in the mode of maintaining the secondary current numerical value, a decrease in the generated current relative to the specified one is observed. The authors proposed and tested a technique for determining the parasitic parameters of the supply mains based on the results of a short circuit test.

Open-Circuit Fault Research on Asymmetric Delta-Polygon 18-Pulse Autotransformer Rectifier Unit for More Electric Aircraft

In aviation aircraft, autotransformer rectifier units (ATRUs) have been widely used as front-end rectifiers. The comprehensive analysis of its operating characteristics under the fault is beneficial to assessing the hazards of the faults and developing a fault diagnosis scheme. This article investigates two types of open-circuit (OC) faults in delta-polygon 18-pulse ATRU, namely, diode OC fault and input OC fault. First, the effects of the diode OC fault on five aspects are quantitatively analyzed: diode conduction angle, output voltage ripple, winding current, input current harmonics, and diode and transformer winding losses. Next, the operating characteristics of ATRU are investigated under input OC fault, and the quantitative effects of the five aspects above are also calculated. Then, based on the affected intervals of dc output voltage, a fault diagnosis idea dealing with two types of OC faults is discussed. Meanwhile, the predictive maintenance objects after the fault location are also summarized. Finally, the simulation and experimental results validate the theoretical analysis and discussion. This work is very significant for guiding the fault detection, fault location, and predictive maintenance of ATRUs.

Grid Current Quality Improvement for Three-Phase Diode Rectifier-Fed Small DC-Link Capacitance IPMSM Drives

In order to improve the grid current quality of the small dc-link capacitance (SDC) motor drives fed by three-phase diode rectifier, a grid current control method based on regulation of the rectifier current sixth harmonic is proposed in this paper. Considering the 120° maximum conduction angle of the rectifier diodes, a 120° rectangular waveform with low total harmonic distortion (THD) is selected as the grid current reference. Based on the relationship between the grid current and the rectifier current, the proposed scheme shapes the grid current into the selected 120° rectangular waveform by regulating the rectifier current sixth harmonic. In this way, the grid current THD of the SDC system is significantly reduced. Since the regulation of the rectifier current harmonic is independent of the speed and motor current control loops, the proposed method avoids the complicated controller and the cumbersome parameter tuning in the grid current control process. The experimental results demonstrate the effectiveness of the proposed method.

Buck converter with magnetic-coupled inductors for power factor corrector

The step-down dc-to-dc converter for application in power factor corrector is proposed and analysed in this paper. Unlike a conventional buck converter containing a single inductor and output capacitor, the proposed converter uses two magnetic-coupled inductors and two output capacitors connected in series. The output voltage of such a coupled inductor buck converter is equal to the sum of voltages of these capacitors. The direct interaction of the input voltage occurs only with a part of the output voltage. This allows increasing a conduction angle in the power factor corrector (PFC) on the basis of the proposed converter and, as a result, reducing the total harmonic distortions and increasing a power factor to satisfy current standard requirements. A detailed analysis of the operation of the proposed converter is presented. The reliability of the analysis is confirmed by a small discrepancy between the results of calculation, modeling and experiment.

Characterization and Analysis of Hot Carrier Degradation Under DC and Large-Signal RF Stress in a PDSOI Floating-Body NFET-Based Power Amplifier Cell Under WiFi Operating Conditions

This paper presents an extensive experimental analysis of hot carrier degradation (HCD) due to DC and large-signal RF stress on a power amplifier (PA) cell in the sub-7GHz frequency band. The reported PA cell is fabricated in a 45-nm RFSOI technology and consists of a single n-channel floating body partially depleted SOI FET. The impact of HCD on the class, conduction angle ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\theta $ </tex-math></inline-formula> ), and performance of the PA cell is analyzed under DC and large-signal RF stress conditions. Generation of defects and their types, i.e., whether oxide or interface traps, are understood using a combination of RF and DC stress conditions. Our detailed analysis distinguishes HCD mechanisms dominated by oxide and interface traps by studying time slope exponents, changes in the subthreshold swing, threshold voltage, and peak transconductance. The impact of RF stress on the PA cell lifetime is also extracted using a semiempirical model.

Optimization of Switched Reluctance Machine Drives Using Multi-Task Learning Approach

One of the major challenges for controlling the drive of switched reluctance machines (SRMs) is to have a proper conduction angle with the working point of the motor. This is due to the non-linear relationship of the flux-linkage with the position of the rotor. The optimization problem in SRM motors should be solved using multi-objective optimization methods because the objective functions are constantly in competition and a compromise should be established between them. In this study, we propose a multi-task learning (MTL) method to optimize this problem. The obtained results of the introduced algorithm were compared with the NSGA-II algorithm. This comparison was focused on two aspects of discipline and quality. Moreover, the covering rate of Pareto front for these two algorithms was evaluated. The accuracy of the proposed method was evaluated and the results showed that the proposed solution is efficient for the optimization problem of SRMs.

Minimum Field Current Increment Control for Doubly Salient Electro-Magnetic Generator With Improved Dynamic Performance

The dynamic response of conventional doubly salient electro-magnetic generator (DSEG) system with uncontrolled rectification is slow, owing to its large time constant resulting from the large energy storage capacitance and field winding inductance. In this article, the minimum field current increment control strategy is proposed for the DSEG system with angular position control (APC) rectification to solve this problem. Based on the ampere-second balance of the energy storage capacitor on the load side, the output voltage estimation model of APC is established to analyze the working characteristics of APC under different conditions in detail. Then, the method to minimize the field current increment by controlling the conduction angle is put forward to improve the dynamic response, because the smaller variation corresponds to the better dynamic performance. Finally, the experiments on a 12/8 pole DSEG system with controlled rectification are implemented to validate the effectiveness of the proposed control strategy, and the improved dynamic performance is observed in the results.

A Novel IPT Converter With Current-Controlled Semi-Active Rectifier for Efficiency Enhancement Throughout Supercapacitor Charging Process

During the typical constant current (CC) charging process, the supercapacitor has a pretty wide-range load variation. However, an inductive power transfer (IPT) converter can maintain high efficiency only within a certain load range around its optimum load point. Once the supercapacitor load resistance is far away from the optimum point, which usually happens in low charging power levels, i.e., the smaller load resistances, the IPT converter will suffer from the dramatic efficiency degradation and thus a step-up load transformation is required throughout the whole charging process. In this article, a novel current-controlled semi-active rectifier (CCSAR)-based IPT converter is proposed to fulfill this requirement. The characteristic of step-up load transformation is first identified and implemented by controlling the conduction angle of the CCSAR to enhance the efficiency in the charging process. The desired charging CC is then regulated by tuning the operating frequency of the IPT inverter. To coordinate these two objectives, a bivariate control is adopted here to achieve fast, direct, and precise current output with enhanced efficiency performance over the whole load range during the CC charging process. Finally, experiment results validate the theoretical analysis well.

Analysis of harmonic influence of improved PFC circuit on SS4G electric locomotive

Abstract Compared with active filter, PFC circuit has simple structure and convenient operation. Introducing it into SS4G electric locomotive can greatly reduce system harmonics. Therefore, firstly, the corresponding PFC circuit is built, and the suppression measures of peak section and discontinuous section are proposed. By improving the discontinuous section, the waveform conduction angle is expanded from 129.564° to 162.882°. Accordingly, the current harmonic at the input side is reduced from 27.38% to 16.19%. After the voltage multiplier is further introduced, the harmonic is reduced to 15.77%. Then, the circuit is designed to absorb the high-order harmonic power in the peak section, and the harmonic is further reduced by about 0.33% to 15.44%. Two small order smoothing capacitors are connected in parallel in the load section to further absorb higher harmonics, which can reduce harmonics to 9.95%. Because the discontinuous section will also produce some spikes in the improvement process, improving the spikes can reduce the harmonics by 4.42% to 5.53%. Then the final improved circuit is introduced into SS4G circuit, and the current harmonic content of the circuit is reduced from 30.02% to 15.59%. The improved PFC circuit has achieved good results in SS4G.

Performance improvement based on adaptive commutation strategy for switched reluctance motors using direct torque control

This research presents an improved direct instantaneous torque controller (DITC) for switched reluctance motors (SRMs). It incorporates a novel adaptive real-time commutation mechanism. The proposed method can effectively enhance the torque profile and efficiency of the machine by proper real-time adjustment of both the turn-on and the turn-off angles. First, an initial value of the turn-on angle is selected to achieve the highest torque generation capability. Then, with a real-time adjustment around the pre-selected initial angle, the instantaneous torque error can be further compensated. Hence, the torque ripple is minimized.Regarding the turn-off angle, an initial value is selected to satisfy the minimum required conduction angle of SRM. Then, this value is continuously adjusted at each electrical cycle by utilizing a phase current detector to force the outgoing phase current to decay to a less effective value before the negative slope of the inductance profile. Therefore, this prevents serious negative torque generation. The proposed strategy fully utilizes the torque generation capability of the motor with a minimized torque ripple, besides the phase currents, are generated in optimal conduction range to enhance the motor efficiency. The simulations and experiments have been carried out on a 3-phase 750 W 12/8 SRM to validate the proposed method's feasibility and effectiveness.

A Compact 0.2–0.3-V Inverse-Class-F23 Oscillator for Low 1/f 3 Noise Over Wide Tuning Range

We introduce a new mode of oscillation in an <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">LC</i> -tank: an inverse class-F <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">23</sub> . In contrast to the conventional class-F oscillators, in which a high value of the real impedance (i.e., resistance) is presented to the third (in class-F <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> ) or/and to the second (in class-F <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> /class-F <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">23</sub> ) oscillator harmonics via an auxiliary resonance, here low resistive impedances (resembling a non-ideal short) are presented at both the second and third harmonics. This is made possible by tight magnetic coupling in the differential and common modes, respectively, afforded by a new compact 2:3 transformer. Being largely free from the harmonics in the voltage waveform and their possible deleterious phase shift effects on the flicker noise up-conversion, the phase noise performance in the flicker and thermal regions is further improved by narrowing the conduction angle. The 2:3 step-up transformer also provides a high passive gain to help with the startup in face of low supply. The switched-capacitor banks and cross-coupled transistor pair are carefully integrated under the transformer with a special arrangement of native (high-resistivity) substrate layer to mitigate their effect on the oscillation while reducing the area by 30%. The proposed digitally controlled oscillator (DCO) is implemented in 28-nm CMOS and achieves −95 dBc/Hz and −118 dBc/Hz at 100 kHz and 1 MHz offsets, respectively, while operating at a 0.3 V supply. The measured <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$1/f^{3}$ </tex-math></inline-formula> corner stays within 60 to 100 kHz over the 35% tuning range (TR) (from 2.02 to 2.87 GHz). This results in a figure-of-merit (FoM) with normalized TR (FoM <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">T</sub> ) of −196 and −199 dB at 100 kHz and 1 MHz offsets, respectively, is a record in the space of ≤0.5 V and ≤1 mW.

전기차용 BLDC 와이퍼 전동기의 소음 저감을 위한 최적의 도통각 제어

This paper proposes optimal conduction angle for noise reduction in xEV BLDC wiper motors. Fuzzy logic simulation is performed to review the noise influences by conduction angle. After confirming that the current and torque ripple change according to the parameter change, and the optimized control method and parameters from the simulation to the controller is reflected. A test is conducted to reduce noise in a specific frequency range. Noise influences are verified through Fast Fourier Transform analysis on current wave forms and noise test results.

Calculation and Analysis of Eddy-Current Loss in Switched Reluctance Motor

The eddy-current loss of switched reluctance motor (SRM) is studied and analyzed in this paper. As a significant part of core loss, eddy-current loss has a great influence on motor performance. First, the average magnetic flux waveforms in every distributed region are derived from the magnetic equivalent circuit (MEC) model. Based on this, each harmonic of magnetic density is obtained by adopting the fast Fourier transform (FFT) method for further calculation. Then, each harmonic eddy-current loss is computed by sinusoidal magnetic density and the total eddy-current loss in different region of motor is derived by superposing of them. Therefore, the calculated results at different speed and conduction angles of each region are analyzed. Finally, the 3D finite element (FE) model is established in software FLUX and the experimental platform of the SRM prototype is built.

A Comprehensive Harmonic Analysis of Current-Mode Power Amplifiers

This work presents a comprehensive theoretical analysis of current-mode power amplifiers as a function of input power for different biasing classes under the common simplifying assumption of constant transconductance and hard current cut-off/saturation. Typically, the theoretical analysis of power amplifier performance and behavior are carried out only at maximum output power. However, to achieve high data-rates, modern telecommunication systems adopt signals characterized by a very high peak-to-average power ratio, thus it is useful to analyze the power amplifier behavior as a function of power back-off. Moreover, in many cases, to enhance the efficiency and/or to apply harmonic shaping techniques, a clipped drain-source current, which approaches a square wave, is required. The classical analysis can be extended to low power levels only under the assumption of power-independent conduction angle, which is true only for class-A and class-B amplifiers, and does not take into account possible waveform clipping at maximum current. This work presents a complete theoretical Fourier analysis of FET-based power amplifiers as a function of quiescent drain-source current at any input power level and accounting for the clipped current case, up to the square-wave limit, reorganizing and completing the material that can be found in classical textbooks in the field.

Phase noise suppression in LC oscillators: Tutorial

AbstractThis paper presents a comprehensive study of phase noise (PN) suppression in LC‐tank oscillators. The goal of this study is to provide designers with the latest techniques for reducing PN in cross‐coupled oscillators. To this end, we begin with a discussion of two prevalent PN models in oscillators: Hajimiri and Demir. We prefer the Hajimiri model because it does not involve very complicated math, and it offers engineers better insight into designing low‐PN oscillators in the two‐PN close‐in regions in an oscillator spectrum (1/f2 and 1/f3). In 1/f2 region, we show that a need for a large output‐voltage swing leads to Class D and B oscillators, and a large output‐current swing results in Class C oscillators. Also, reduction of the impulse sensitivity functions (ISFs) of an oscillator core can happen in Class F oscillators. A few solutions are presented for mitigating flicker noise up‐conversion, such as adding resistances, controlling the oscillation amplitude, decreasing the conduction angle, guiding the high‐frequency harmonics of current, and shifting the phase of VGS against VDS. We also provide a comparison of recent state‐of‐the‐art literature to show what constitutes a good PN in both 1/f2 and 1/f3 regions in cross‐coupled oscillators. We conclude that a cross‐coupled oscillator can reach the best performances in 1/f3 and 1/f2 PN regions if the oscillator is designed in Class C with the K block and uses the techniques of narrowing the conduction angle, the tail inductor, and the modified tank simultaneously.

Quasi Power Factor Correction for High Efficient AC/DC Converter

Harmonic pollution and low power factor in power systems caused by power converters have been of great concern. To overcome these problems several converter topologies using advanced semiconductor devices and control schemes have been proposed. This investigation is to identify a low cost, small size, efficient and reliable ac to dc converter to meet the input performance index of UPS. The performance of single phase and three phase ac to dc converter along with various control techniques are studied and compared. This project presents a novel ac/dc converter based on a quasi-active power factor correction (PFC) scheme. In the proposed circuit, the power factor is improved by using an auxiliary winding coupled to the transformer of a cascade dc/dc fly back converter. The auxiliary winding is placed between the input rectifier and the lowfrequency filter capacitor to serve as a magnetic switch to drive an input inductor. Since the dc/dc converter is operated at high-switching frequency, the auxiliary windings produce a high frequency pulsating source such that the input current conduction angle is significantly lengthened and the input current harmonics is reduced. Since the use of a single inductor, the cost z reduced a lot and the efficiency of the system is improved. The power factor is maintained constant by using a buffer capacitor in parallel to the system for compensating the inductive components. It eliminates the use of active switch and control circuit for PFC, which results in lower cost and higher efficiency. Finally an R- load is applied and simulation results are presented

Phase noise analysis of the connected-sources parallel quadrature oscillator

In this work, the operation mechanism of the Connected-Sources Parallel Quadrature Oscillator (CSPQO) is investigated meticulously through a novel perspective. It is proven that, unlike Disconnected-Sources Parallel Quadrature Oscillator (DSPQO), conduction angles of the switching and coupling transistors vary versus the coupling factor in CSPQO. This perspective leads to formulating CSPQO's drain currents to derive closed-form expressions for its phase noise for the first time. A comprehensive phase noise analysis for CSPQO is presented using Hajimiri's phase noise theorem. There are less than 2% and 1dB errors for oscillation amplitude and phase noise calculations. Besides, an inclusive comparison is performed between DSPQO and CSPQO, and it is established that CSPQO has a better performance for coupling factors less than 1. It is shown that a coupling factor of 0.35 is an optimum design point for CSPQO to have better phase noise and Figure of Merit (FoM) performances compared to DSPQO.

Generalized voltage estimation of TCSC-compensated transmission lines for adaptive distance protection

The variable performance of the thyristor-controlled series compensator (TCSC) system represents a vital challenge for conventional distance relays. Most existing algorithms are based on the measured data at two ends of the TCSC-compensated lines. However, some of single-end algorithms need to modify the distance relay for the series capacitor (SC) only. This paper introduces a generalized algorithm to estimate the voltage drop across the TCSC. The distance relay uses the estimated TCSC voltage drop for terminal voltage compensation. The second objective of the proposed algorithm is to estimate the conduction angle of the thyristor-controlled reactor (TCR) branch under different modes of operation. This algorithm is effective for different TCSC modes such as the capacitive or the inductive modes, in addition to the method of firing angle of synchronization current or voltage synchronization modes. The main benefit of the proposed algorithm is presenting a parameter-less distance scheme for TCSC-compensated transmission line. A 400-kV overhead transmission line test system is simulated in MATLAB/SIMULINK package® and the numerical modeling is implemented in the MATLAB® script in order to evaluate the proposed algorithm effectiveness. The proposed technique is tested under several stress conditions that may face the conventional distance relay. The results illustrate the effective performance of the proposed algorithm.