Compound Semiconductor Devices Research Articles

Performance of a central delivery system for metalorganic precursors

Currently, the III-V compound semiconductor epi industry uses roughly 10,000 kg of TMGa per year. Virtually all of this TMGa is distributed in stainless-steel bottles of 2.5 kg content or less. At the point of use these bottles are temporarily installed as part of the OMVPE reactor and replaced and returned to the manufacturer when depleted. This traditional distribution system is costly to operate and its performance lags behind the performance of a properly designed and set up central delivery system. The precision and control of the vapor concentration entering the reaction chamber has a direct impact on the yield of epi films for every III-V compound semiconductor device, from LEDs to data and communications lasers to solar cells. Central delivery does improve concentration precision and with it yield in the most cost efficient way. We report on performance of a central delivery system for TMGa, a high-consumption organometallic compound and compare this performance to the performance of traditional onboard sources.

Reflections on 50 years of Compound Semiconductor Materials and Devices

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Molecular Beam Epitaxy Growth of High Mobility Compound Semiconductor Devices for Integration with Si CMOS

AbstractWe report on a direct epitaxial growth approach for the heterogeneous integration of high speed III-V devices with Si CMOS logic on a common Si substrate. InP-based heterojunction bipolar transistor (HBTs) structures were successfully grown on patterned Si-on-Lattice-Engineered-Substrate (SOLES) substrates using molecular beam epitaxy. DC and RF performance similar to those grown on lattice-matched InP were achieved in growth windows as small as 15×15μm2. This truly planar approach allows tight device placement with InP-HBTs to Si CMOS transistors separation as small as 2.5 μm, and the use of standard wafer level multilayer interconnects. A high speed, low power dissipation differential amplifier was designed and fabricated, demonstrating the feasibility of using this approach for high performance mixed signal circuits such as ADCs and DACs.

Integration of Compound Semiconductor Devices and CMOS (CoSMOS) with Die to Wafer Bonding

On the Compound Semiconductor Devices and CMOS (CoSMOS) program, HRL Laboratories, LLC is developing technology for intimate integration of silicon complementary metal-oxide- semiconductor (CMOS) devices with 400 GHz InP heterogeneous bipolar transistor (HBTs) to form complex integrated circuits. This research is investigating innovative microfabrication approaches, including adhesive bonding techniques, for transistor-scale integration of compound semiconductor and silicon-based transistors. We have successfully fabricated large area HBT's on thin (~1 µm) InP epitaxial layers transferred to silicon substrates with a die to wafer bonding process that preserves the growth orientation of the epitaxial layers bonded to the target substrate.

Integration of Compound Semiconductor Devices and CMOS (CoSMOS) with Die to Wafer Bonding

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Characterization of high-purity arsine and gallium arsenide epilayers grown by MOCVD

Impurities present in the metal organic chemical vapor deposition (MOCVD) process gases and precursors can have a significant effect on the performance of III–V compound semiconductor devices. High-purity arsine purified using chemical, adsorption and distillation techniques, has been characterized for impurities by using high sensitivity gas analysis methods and low temperature photoluminescence (PL) of GaAs epilayers. Permanent gas, hydrocarbon and dopant impurities can all be removed using these purification methods to below the detection limit of instrumentation (low nmol mol −1–pmol mol −1, depending on method). Capability to remove water vapor to single digit nmol mol −1 levels is also demonstrated and cylinder depletion studies show that gas-phase arsine, with consistently low H 2O, can be delivered from the cylinder, even well after phase break. Low temperature PL measurements are made on 10 μm GaAs/GaAs grown with three different arsine sources. Well-resolved near-band emission characteristics of high-purity n-type GaAs is obtained with high-purity distilled arsine. PL of epilayers grown with less pure arsine show the presence of Ge as well as elevated levels of Mg and Zn, incorporated from the trimethylgallium. The incorporation of O from an arsine cylinder containing H 2O at 200 nmol mol −1 results in reduced full width at half maximum (FWHM) of the near-band emission and decreased ( D 0, X) and ( F, X) intensity, highlighting the importance of minimizing H 2O impurity.

Transistor Level Integration of Compound Semiconductor Devices and CMOS (CoSMOS

ABSTRACTIn the COSMOS program, HRL Laboratories, LLC. is developing technology for intimate integration of CMOS devices with 400 GHz InP HBTs to form complex integrated circuits. This research is investigating innovative approaches to the transistor-scale integration of compound semiconductor and silicon-based transistors so as to enable revolutionary advances in science, devices, circuits, and systems.

P-Type δ-Doped Layers in GaAs Isolated by He+ Bombardment

Ion implantation is an essential process for production of modern III-V compound semiconductor devices and circuits and has been proven as a successful method to convert a conductive layer into a highly resistive one. Due to its simplicity, precise depth control and compatibility with planar technologies, ion implantation is a potential alternative for mesa etching. Selective masking of the semiconductor surface with photoresist followed by ion irradiation is an efficient and practical way to isolate closely spaced devices. Irradiation of GaAs by ions results in resistivity increase as a consequence of free carrier removal by trapping at defects introduced by the irradiation. Delta-doping is a well known technique which spatially confines the dopants to one atomic layer during epitaxial growth of semiconductor materials. In the present work a dose dependence of sheet resistance of delta- doped GaAs structures, irradiated by He+ ions, was inve stigated. It was found that a threshold dose for electrical isolation of the structures was determined by the energy of ions and by the concentration of initial doping.

High quality interlayer dielectric for 4H–SiC DMOSFETs

In this work useful weight percentages of boron and phosphorus in boro-phospho-silicate-glass (BPSG) interlayer dielectric (ILD) films to getter mobile ions effectively in 4H–SiC DMOSFET structures are developed, considering the limitations, such as the required low glass flow temperature, and the possible hygroscopic nature of the films and formation of crystalline BPO4 particles, which may occur for high B and P weight percentages. The B and P weight percentage viscous flow temperature contours and empirical inequalities representing the above-mentioned limitations are developed and discussed. Results of this work are useful for both silicon and compound semiconductor device technologies.

Recent advances in MOCVD process technology for the growth of compound semiconductor devices

This paper gives an overview of the current state of the technology of metal-organic vapor phase epitaxy (MOVPE), which has established itself as the method of choice for the mass production of (opto)electronic semiconductor devices. The use of in situ reflectometry and emissivity corrected surface temperature measurement for the improvement of process yield is covered as well as recent advances in the growth on larger wafers. Employing novel methods of ex situ characterization to assess the bow of the sapphire wafer during growth, we achieved blue-emitting multi-quantum well (MQW) structures on 4 inch substrates with 1.3 nm standard deviation of the wavelength. It is shown that the thickness of the substrate as well as the off-cut of the sapphire surface must be taken into account and correctly matched.

Improvement of Impact Ionization Effect and Subthreshold Current in InAlAs/InGaAs Metal–Oxide–Semiconductor Metamorphic HEMT With a Liquid-Phase Oxidized InAlAs as Gate Insulator

The oxidation of InAlAs and its application to InAlAs/InGaAs metal-oxide-semiconductor metamorphic high-electron mobility transistors (MOS-MHEMTs) are demonstrated in this study. After the highly selective gate recessing of InGaAs/InAlAs using citric buffer etchant, the gate dielectric is obtained directly by oxidizing the InAlAs layer in a liquid-phase solution at near room temperature. As compared to its counterpart MHEMT, the fabricated InAlAs/InGaAs MOS-MHEMT exhibits a larger tolerance to gate bias, higher breakdown voltage, lower subthreshold current, improved gate leakage current with the effectively suppressed impact ionization effect, and improved radio-frequency performance. Consequently, the liquid-phase oxidation may also be used to produce gate oxides and as an effective passivation on III-V compound semiconductor devices

Using MOVPE growth to generate tomorrow's solar electricity

Growing interest in renewable energy combined with the excellent performance of compound-semiconductor solar cells inspires a vision of large-scale deployment of solar systems using these cells. Three-junction, GaInP/Ga(In)As/Ge solar cells have demonstrated an efficiency of 39%. Many companies are developing solar concentrator systems based on these commercially available cells. This paper reviews compound-semiconductor solar-cell technology from the viewpoint of researchers experienced with metal organic vapor-phase epitaxy (MOVPE) growth of other compound-semiconductor devices. We describe the generic structure of today's multijunction solar cells and some of the challenges of implementing these structures. Several new device structures are currently being investigated toward achieving efficiencies above 40%. The potential for growth of this technology is huge, because high-efficiency (multijunction) concentrator systems have a chance to capture a significant part of the large-scale electricity photovoltaic market.

Passivation of III/V-based Compound Semiconductor Devices Using High-Density Plasma Deposited Silicon Nitride Films

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Development and control of MOVPE growth processes for devices using reflectance anisotropy spectroscopy and normalized reflectance

AbstractThe use of the optical in situ techniques reflectance anisotropy (RA) and normalized reflectance (NR) for metal‐organic vapour‐phase epitaxy (MOVPE) growth processes of compound semiconductor devices is reviewed. The RA signal detects small deviations in the doping profile during growth of hetero‐bipolar transistors and correlates to the emission wavelength of edge‐emitting laser structure via its sensitivity to the quantum well composition. The NR signal is crucial for the alignment of distributed Bragg reflectors (DBR) in vertical‐cavity surface‐emitting lasers. With simultaneously performed RA and NR measurements the doping profile as well as the DBR alignment can be determined in situ. The composition monitoring in quaternary InGaAsP grown on InP is demonstrated using the RA signal for the As:P ratio while the NR signal is used for the Ga:In ratio. For AlGaInP on GaAs the NR signal is sensitive to both the aluminium and the indium content. Therefore these effects have to be separated via the determination of the growth efficiency of the respective materials using the growth rate calculated from the NR signal. (© 2005 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim)

Strong market dynamics

The semiconductor industry (both silicon and compound semiconductor devices, equipment and materials), with its turnover in excess of $200bn per year, has provided a continuum of electronic and optoelectronic performance successes for over 50 years, supported by the continuing improvement in the performance of device design and materials technology. Yet at the same time, the whole industry has had to depend on the consistency and quality of its developing, but carefully nurtured supply chain. However, in many industry supply segments, sales volumes have become very high (multi-billion dollars per year) and competition and consolidation have led to a contraction in the number of players in a given market segment. In the early days of semiconductors, tens of viable supply companies in a supply market segment was the norm, but today three or four major players may often control 70 to 80% of the market. The costs of material, energy and research are increasing, placing much of the future technology in the hands of very large companies.

Special issue in honour of Prof. Marc Ilegems

Special issue in honour of Prof. Marc Ilegems

Air-bridge interconnection and bondpad process for non-planar compound semiconductor devices

We present a versatile metallic air-bridge process that can be used either for high relief compound semiconductor devices or interconnections schemes. Our technology uses conventional contact photolithography and does not require dry-etching techniques allowing a fast fabrication time, reliable production and cost effectiveness. It is based on the use of only one photoresist and one electroplating step.

Drain-voltage dependency of memory effects in W-CDMA base station digital predistortion linearizers with compound semiconductor power amplifiers

With regard to wideband predistortion type power amplifiers, such as shared amplifiers used in W-CDMA base stations, the memory effects associated with RF power amplifiers degrade power efficiency. Aiming to solve this problem, we find that a high-voltage compound semiconductor device has sufficient ACLR performance to mitigate these memory effects. We tested two kinds of compound-semiconductor devices, namely, a GaAs FET and a GaN HEMT. The GaAs FET, with an operating voltage (Vop) of 12 V, a saturation output of 240 W, and a push–pull configuration, was used as a low-voltage device. The GaN HEMT, with Vop of 50 V, a saturation output of 200 W, and a push–pull configuration as well, was used as a high-voltage device. The test results for these devices in a predistortion linearizer configuration show that the high-voltage device (the GaN HEMT) achieved excellent characteristics in terms of distortion suppression and drain efficiency in four-carrier W-CDMA applications. © 2005 Wiley Periodicals, Inc. Microwave Opt Technol Lett 45: 551–554, 2005; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.20876

RF and Thermal Design of Compound Semiconductor Devices using MEMS Approach

RF and Thermal Design of Compound Semiconductor Devices using MEMS Approach

Low frequency noise as a reliability diagnostic tool in compound semiconductor transistors

Low frequency (LF) noise can be used as a diagnostic technique to analyse the quality and reliability of electron devices. Different reviews of the fundamental and excess LF noise sources in compound semiconductor transistors have been published in previous papers [1,2,3]. Examples of experimental correlation between LF noise and parasitic effects (i.e. electrical performance degradation) or failure mechanisms will be described for various compound semiconductor devices.