Complex Digital Signal Processing Research Articles

Design Tradeoffs and Challenges in Practical Coherent Optical Transceiver Implementations

This tutorial discusses the design and ASIC implementation of coherent optical transceivers. Algorithmic and architectural options and tradeoffs between performance and complexity/power dissipation are presented. Particular emphasis is placed on flexible (or reconfigurable) transceivers because of their importance as building blocks of software-defined optical networks. The paper elaborates on some advanced digital signal processing (DSP) techniques such as iterative decoding, which are likely to be applied in future coherent transceivers based on higher order modulations. Complexity and performance of critical DSP blocks such as the forward error correction decoder and the frequency-domain bulk chromatic dispersion equalizer are analyzed in detail. Other important ASIC implementation aspects including physical design, signal and power integrity, and design for testability, are also discussed.

Low Power, Area Efficient & HighPerformance Carry Select Adder on FPGA

LOW-POWER, area-efficient, and high-performance VLSI systems are increasingly used in portable and mobile devices, multi standard wireless receivers, and biomedical instrumentation. An adder is the main component of an arithmetic unit. A complex digital signal processing (DSP) system involves several adders. An efficient adder design essentially improves the performance of a complex DSP system. A ripple carry adder (RCA) uses a simple design, but carry propagation delay (CPD) is the main concern in this adder. Carry look-ahead and carry select (CS) methods have been suggested to reduce the CPD of adders. A conventional carry select adder (CSLA) is an RCA configuration that generates a pair of sum words and output carry bits corresponding the anticipated input-carry (cin = 0 and 1) and selects one out of each pair for final-sum and final output-carry . A conventional CSLA has less CPD than an RCA, but the design is not attractive since it uses a dual RCA. In the existing designs, logic is optimized without giving any consideration to the data dependence. In this paper, we prepared an analysis on logic operations occupied in conventional and BEC-based CSLAs to study the data dependence and to identify redundant logic operations. Based on this study, we have planned a new logic formulation for the CSLA. The major contribution in this paper is logic formulation based on data dependence and optimized carry generator (CG) and carry select unit Based on the proposed logic formulation, we have found a capable logic design for CSLA. Due to better logic units, the projected CSLA involves significantly less ADP than the existing CSLAs. We have shown that the SQRT-CSLA using the proposed CSLA design involves nearly 32% less ADP than that of the corresponding SQRT-CSLA.

Heterogeneous trench-assisted few-mode multi-core fiber with graded-index profile and square-lattice layout for low differential mode delay.

We propose a kind of heterogeneous trench-assisted graded-index few-mode multi-core fiber with square-lattice layout. For each core in the fiber, effective area (A(eff)) of LP(01) mode and LP(11) mode can achieve about 110 μm(2) and 220 μm(2). Absolute value of differential mode delay (|DMD|) is smaller than 100 ps/km over C + L bands, which can decrease the complexity of digital signal processing at the receiver end. Considering the upper limit of cladding diameter (D(cl)) and cable cutoff wavelength of LP(21) mode in the cores located at the inner layer, we set core pitch (Λ) as 43 μm. In this case, D(cl) is about 220.4 μm, inter-core crosstalk (XT) is lower than -40 dB/500 km and the relative core multiplicity factor (RCMF) reaches 15.93.

Digital Filter Multiple Access PONs With DSP-Enabled Software Reconfigurability

Digital filter multiple access (DFMA) passive optical networks (PONs) are, for the first time to our knowledge, proposed and extensively investigated, where digital signal processing (DSP)-enabled, software-reconfigurable, digital orthogonal filtering is employed in each individual optical network unit (ONU) and the optical line terminal to enable all ONUs to dynamically share the transmission medium under the control of the centralized software-defined controller and the transceiver-embedded DSP controllers. The DFMA PONs fully support software-defined networking with the network control further extended to the physical layer. As digital filtering is the fundamental process at the heart of the proposed DFMA PONs, the filtering-induced tradeoffs among upstream transmission capacity, filter design flexibility, and filter DSP complexity are examined, based on which optimum filter design guidelines are identified for various application scenarios. Furthermore, the performance characteristics of the DFMA PONs are also numerically explored in terms of maximum achievable upstream transmission capacity, differential ONU launch power dynamic range, and ONU count-dependent minimum received optical power.

Spectrally Efficient Enhanced-Performance Bidirectional Coherent PON With Laserless 10 Gb/s ONU [Invited

We present and experimentally characterize a spectrally efficient, bidirectional, ultradense wavelength-division multiplexing passive optical network (PON) (2 × 120 Gb/s at 50 GHz) over 30 km standard single-mode fiber. This is achieved using a 4 GHz grid with partial spectrum overlapping, Nyquist-shaped 16-ary quadrature amplitude modulation, and digital frequency shifting. This scheme is based on a laserless, self-homodyne PON with centralized wavelength control. We achieve reduced impact of the Rayleigh back-scattering effect due to Nyquist-pulse shaping and frequency upshifting. Self-homodyne detection relaxes the laser linewidth requirement and digital signal processing complexity at the optical network unit. To demonstrate the extra benefit of the proposed PON system, we also experimentally and theoretically evaluate the impact of nonlinear Raman crosstalk in video overlay. Compared to a baseband Nyquist signal and baud rate non-return-to-zero equivalent, the proposed system improves the carrier-to-Raman crosstalk ratio of video overlay by 4 and 6 dB, respectively.

Performance of Direct-Detection Mode-Group-Division Multiplexing Using Fused Fiber Couplers

We present an end-to-end performance evaluation of a mode-group-division multiplexing system that uses direct detection instead of coherent detection, avoiding complex digital signal processing. The system transmits four data channels through a step-index fiber supporting six spatial modes comprising four mode groups, considering the twofold degeneracy of the LP $_{\it lm}$ modes for $l \neq 0$ . Multiplexing and demultiplexing is performed using two- and three-core fused fiber couplers, each one phase-matched to a group of degenerate modes. These devices are analyzed through a field-based model that describes, for the first time to our knowledge, crosstalk between all the fiber modes. Propagation through the few-mode fiber is modeled considering differential modal attenuation, intermodal dispersion, chromatic dispersion, and both intergroup and intragroup modal coupling. The end-to-end link is described by a concatenation of matrix operators describing the optical field transfer functions for the multiplexer, fiber, and demultiplexer. Error-free transmission of four 32-Gb/s OOK-modulated data channels through a 1-km link proves the feasibility of the proposed direct-detection mode-group-division multiplexing approach.

Is complex signal processing for bone conduction hearing aids useful?

ObjectivesTo establish whether complex signal processing is beneficial for users of bone anchored hearing aids.MethodsReview and analysis of two studies from our own group, each comparing a speech processor with basic digital signal processing (either Baha Divino or Baha Intenso) and a processor with complex digital signal processing (either Baha BP100 or Baha BP110 power). The main differences between basic and complex signal processing are the number of audiologist accessible frequency channels and the availability and complexity of the directional multi-microphone noise reduction and loudness compression systems.ResultsBoth studies show a small, statistically non-significant improvement of speech understanding in quiet with the complex digital signal processing. The average improvement for speech in noise is +0.9 dB, if speech and noise are emitted both from the front of the listener. If noise is emitted from the rear and speech from the front of the listener, the advantage of the devices with complex digital signal processing as opposed to those with basic signal processing increases, on average, to +3.2 dB (range +2.3 … +5.1 dB, p ≤ 0.0032).DiscussionComplex digital signal processing does indeed improve speech understanding, especially in noise coming from the rear. This finding has been supported by another study, which has been published recently by a different research group.ConclusionsWhen compared to basic digital signal processing, complex digital signal processing can increase speech understanding of users of bone anchored hearing aids. The benefit is most significant for speech understanding in noise.

Rate-Adaptive Coded Modulation for Fiber-Optic Communications

Rate-adaptive optical transceivers can play an important role in exploiting the available resources in dynamic optical networks, in which different links yield different signal qualities. We study rate-adaptive joint coding and modulation, often called coded modulation (CM), addressing non-dispersion-managed (non-DM) links, exploiting recent advances in channel modeling of these links. We introduce a four-dimensional CM scheme, which shows a better tradeoff between digital signal processing complexity and transparent reach than existing methods. We construct a rate-adaptive CM scheme combining a single low-density parity-check code with a family of three signal constellations and using probabilistic signal shaping. We evaluate the performance of the proposed CM scheme for single-channel transmission through long-haul non-DM fiber-optic systems with electronic chromatic-dispersion compensation. The numerical results demonstrate improvement of spectral efficiency over a wide range of transparent reaches, an improvement over 1 dB compared to existing methods.

Mathematical model of completely optical system for detection of mode propagation parameters in an optical fiber with few-mode operation for adaptive compensation of mode coupling

In this article we propose a method for optical-domain compensation of distortions caused by the mode coupling in communication systems with mode division multiplexing. The proposed method is based on the spatial-spectral interrelation between the mode composition and the laser beam electromagnetic field distribution and on the using of a real-time programmable diffractive optical element implemented with a spatial light modulator. This method is promising to reduce the computational complexity of MDM-systems and increase significantly the modal channel baud rate due to exclusion of complex digital signal processing when mode-coupling compensating.

Enhanced 10 Gb/s operations of directly modulated reflective semiconductor optical amplifiers without electronic equalization

We report enhanced 10 Gb/s operation of directly modulated bandwidth-limited reflective semiconductor optical amplifiers. By using a single suitable arrayed waveguide grating we achieve simultaneously WDM demultiplexing and optical equalization. Compared to previous approaches, the proposed system results significantly more tolerant to seeding wavelength drifts. This removes the need for wavelength lockers, additional electronic equalization or complex digital signal processing. Uniform C-band operations are obtained experimentally with < 2 dB power penalty within a wavelength drift of 10 GHz (which doubles the ITU-T standard recommendations).

16$\,\times\,$125 Gb/s Quasi-Nyquist DAC-Generated PM-16QAM Transmission Over 3590 km of PSCF

We report on a transmission experiment over high-performance pure silica core fiber (PSCF) of 16 Nyquist wavelength-division-multiplexed (Nyquist-WDM) channels at a symbol rate of 15.625 GBaud, using polarization-multiplexed (PM) 16 symbols quadrature amplitude modulation (16QAM), resulting in a per-channel raw bit rate of 125 Gb/s. The channel spacing is 16 GHz, corresponding to 1.024 times the symbol rate. The interchannel crosstalk penalty is drastically reduced through the confinement of the signal spectrum within a near-Nyquist bandwidth, achieved with digital filtering and digital-to-analog converters (DACs) operating at 1.5 samples/symbol. The optical line is a recirculating loop composed of two spans of high-performance PSCF with erbium-doped fiber amplifiers only. The transmission distance of 3590 km at a target line bit-error rate (BER) of 1.5 10-2 is achieved at a raw spectral efficiency (SE) of 7.81 b/s/Hz. Assuming a commercial hard forward error correction with 20.5% redundancy, capable of handling the target BER, the net SE is 6.48 b/s/Hz, the highest so far reported for multithousand kilometer transmission of PM-16QAM at ≥ 100 Gb/s per channel. These results demonstrate the feasibility of very high SE DAC-enabled ultra-long-haul quasi-Nyquist-WDM transmission using PM-16QAM with current technologies and manageable digital signal processing complexity.

Teaching DSP Implementation: The Big Picture

Starting a digital signal processing (DSP) implementation course can be a daunting task, especially with the advanced DSP algorithms, complex DSP processor architectures and sophisticated development tools that are developed to satisfy consumer demands. These courses can be split into disciplines such as control, audio and video. In this paper the authors are addressing the concerns associated with fast-growing DSP chips and tools and the impact they have on teaching DSP implementation. The authors also provide solutions, advice and suggestions on how to select a DSP, set a DSP implementation course and the associated laboratory hardware and software that fit a specific application.

A 2.5 V 109 dB DR ΔΣ ADC for Audio Application

Abstract— A 2.5 V feed-forward second-order delta-sigma modulator for audio application is presented. A 9-level quantizer with a tree-structured dynamic element matching (DEM) was employed to improve the linearity by shaping the distortion resulted from the capacitor mismatch of the feedback digital-to-analog converter (DAC). A chopper stabilization technique (CHS) is used to reduce the flicker noise in the first integrator. The prototype delta-sigma analog-to-digital converter (ADC) implemented in a 65 nm 1P8M CMOS process occupies 0.747 mm 2 and achieves 109.1 dB dynamic range (DR), 85.4 dB signal-to-noise ratio (SNR) in a 24 kHz audio signal bandwidth, while consuming 14.75 mW from a 2.5 V supply. Index Terms —Delta-sigma modulator, feed-forward, dynamic element matching, chopper stabilization I. I NTRODUCTION Recent advances of CMOS technology have enabled the high quality signal processing in the multi-media and communication systems and have resulted in a great demand for the high resolution analog-to-digital converters (ADCs). Among various ADC architectures, the delta-sigma ADC offers high dynamic range by using oversampling and noise shaping properties. Moreover, as it requires only simple and relatively high-tolerance analog components with fast and complex digital signal processing to achieve high resolution, it is very well-suited for the digital CMOS process. The theoretical signal-to-quantization noise ratio (SQNR) of the delta-sigma ADC is given by Eq. (1)

Phase Noise Induced Error-rate Floors in Intradyne QPSK Systems with Quadruple Carrier Phase Extraction – Comparison of Block and Sliding Processor Unit Update

The phase noise performance of Digital signal Processing (DSP) Processor Units (PU's) with classical block, modified block and sliding updates, are compared. Using sliding update may provide better phase noise tolerance than the block updates for large block size at the expense of much more complex DSP receiver implementation. A modified block update is proposed which in a simple way eliminates the need for phase unwrapping. In the limit of large phase noise it is advisable to avoid carrier phase extraction entirely and to rely on simple differential phase detection.

Exploring the Concurrency of an MPEG RVC Decoder Based on Dataflow Program Analysis

This paper presents an in-depth case study on dataflow-based analysis and exploitation of parallelism in the design and implementation of a MPEG reconfigurable video coding decoder. Dataflow descriptions have been used in a wide range of digital signal processing (DSP) applications, such as applications for multimedia processing and wireless communications. Because dataflow models are effective in exposing concurrency and other important forms of high level application structure, dataflow techniques are promising for implementing complex DSP applications on multicore systems, and other kinds of parallel processing platforms. In this paper, we use the client access license (CAL) language as a concrete framework for representing and demonstrating dataflow design techniques. Furthermore, we also describe our application of the differential item functioning dataflow interchange format package (TDP), a software tool for analyzing dataflow networks, to the systematic exploitation of concurrency in CAL networks that are targeted to multicore platforms. Using TDP, one is able to automatically process regions that are extracted from the original network, and exhibit properties similar to synchronous dataflow (SDF) models. This is important in our context because powerful techniques, based on static scheduling, are available for exploiting concurrency in SDF descriptions. Detection of SDF-like regions is an important step for applying static scheduling techniques within a dynamic dataflow framework. Furthermore, segmenting a system into SDF-like regions also allows us to explore cross-actor concurrency that results from dynamic dependences among different regions. Using SDF-like region detection as a preprocessing step to software synthesis generally provides an efficient way for mapping tasks to multicore systems, and improves the system performance of video processing applications on multicore platforms.

On the Suitability of GRID Service Technology for Distributed Measurements Based on Complex Digital Signal Processing Algorithms

Digital signal processing algorithms are nowadays playing an increasingly more important role in most measurement processes. Furthermore, in the presence of poorly digitized data, reliable and repeatable measurement results can often be assured by complementing the adopted procedure with a suitable processing stage. The realization of a ldquocollectionrdquo of measurement algorithms to be shared among researchers and technicians who work on similar topics should, thus, be advisable. Complex algorithms, however, suffer from critical drawbacks, in terms of computational burden and hardware resources, when applied to very long acquired records. The authors suggest the adoption of GRID Service as an innovative solution to provide researchers with a ldquocollectionrdquo of measurement algorithms and concurrently overcome the cited drawbacks. GRID Service is a new hardware/software approach that is capable of merging the higher computational performance of parallel GRID computing with key mechanisms and standards of Web service. It would be very possible to migrate complex measurement algorithms into services that are available and accessible on the Internet. As an application example, the authors present a GRID service mandated to power measurement in digital wireless communication systems.

AsAP: A Fine-Grained Many-Core Platform for DSP Applications

Many emerging and future applications require significant levels of complex digital signal processing and operate within limited power budgets. Moreover, dramatically rising VLSI fabrication and design costs make programmable and reconfigurable solutions increasingly attractive. the ASAP project addresses these challenges with a chip multiprocessor composed of simple processors with small memories, achieving high energy efficiency and throughput in a small chip area.

Unscented Transform: A Powerful Tool for Measurement Uncertainty Evaluation

An original approach for uncertainty evaluation in indirect measurements is presented hereinafter. The approach applies the unscented transform to the measurement model (i.e., the functional relationship between output and input quantities) in order to gain a reliable estimate of output expectation and standard deviation (measurement uncertainty). Thanks to some useful properties of the transform, notable limits of the current GUM recommendations can be overcome. In particular, reliable estimates are also granted in the presence of nonlinear and/or nonanalytical measurement models or complex digital signal processing algorithms. A number of numerical tests are conducted on simulated and actual measurement data. Remarkable concurrence between obtained estimates and those granted by Monte Carlo simulations confirms the efficacy of the proposed approach

Constrained algorithmic IP design for system-on-chip

In the system on chip design context, RTL design of complex digital signal processing coprocessors can be improved by using algorithmic description as input for the synthesis process. System integration, that is a major step in SoC design, requires taking into account communication and timing constraints to design and integrate dedicated hardware accelerator. In this paper, we propose a design flow based on formal models that allows high-level synthesis under input/output timing constraints of DSP algorithms. Based on a generic architecture, the presented method provides automatic generation of customized hardware components. We show the effectiveness of our approach in a case study of a maximum a posteriori (MAP) algorithm for turbo decoding.

Performance analysis of multiprocessor DSPs: a stream-oriented component model

This article introduces a composable component model that can be used for performance analysis of complex digital signal processing (DSP) systems consisting of several computation resources communicating via some shared media. It reviews different methods of analyzing the performance of such communication-centric systems, including simulation, trace-based simulation, and symbolic methods. Finally, a component model that can be used to formally state the relationship between the usage and the processing capabilities of different computation and communication resources is established.