Compensation Of Free Carriers Research Articles

Microscale Engineering of n-Type Doping in Nanostructured Gallium Antimonide: AC Impedance Spectroscopy Insights on Grain Boundary Characterization and Strategies for Controlled Dopant Distribution.

This paper investigates the microscale engineering aspects of n-type doped GaSb to address the challenges associated with achieving high electrical conductivity and precise dopant distribution in this semiconductor material. AC impedance spectroscopy is employed as a reliable technique to characterize the microstructural and electrical properties of GaSb, providing valuable insights into the impact of grain boundaries on overall electrical performance. The uneven distribution of dopants, caused by diffusion, and the incomplete activation of introduced dopants pose significant obstacles in achieving consistent material properties. To overcome these challenges, a careful selection of alloying elements, such as bismuth, is explored to suppress the formation of native acceptor defects and modulate band structures, thereby influencing the doping and compensator formation processes. Additionally, the paper examines the effect of microwave annealing as a potential solution for enhancing dopant activation, minimizing diffusion, and reducing precipitate formation. Microwave annealing shows promise due to its rapid heating and shorter processing times, making it a viable alternative to traditional annealing methods. The study underscores the need for a stable grain boundary passivation strategy to achieve significant improvements in GaSb material performance. Simple grain size reduction strategies alone do not result in better thermoelectric performance, for example, and increasing the grain boundary area per unit volume exacerbates the issue of free carrier compensation. These findings highlight the complexity of achieving optimal doping in GaSb materials and the importance of innovative analytical techniques and controlled doping processes. The comprehensive exploration of n-type doped GaSb presented in this research provides valuable insights for future advancements in the synthesis and optimization of high-conductivity nanostructured n-type GaSb, with potential applications in thermoelectric devices and other electronic systems.

Domain switching kinetics in ferroelectric-resistive BiFeO3 thin film memories

We fabricated (00l) BiFeO3 (BFO) thin films in different growth modes on SrRuO3/SrTiO3 substrates using a pulsed laser deposition technique. X-ray diffraction patterns show an out-of-plane lattice constant of 4.03 Å and ferroelectric polarization of 82 µC/cm2 for the BFO thin film in a layer-by-layer growth mode (2D-BFO), larger than 3.96 Å and 51 µC/cm2 for the thin film in the 3D-island formation growth mode (3D-BFO). The 2D-BFO thin film at 300 K shows switchable on/off diode currents upon polarization flipping near a negative coercive voltage, which is nevertheless absent from the above 3D-BFO thin film. From a positive-up–negative-down pulse characterization technique, we measured domain switching current transients as well as polarization–voltage (Pf–Vf) hysteresis loops in both semiconducting thin films. Pf–Vf hysteresis loops after 1 µs-retention time show the preferred domain orientation pointing to bottom electrodes in a 3D-BFO thin film. The poor retention of the domains pointing to top electrodes can be improved considerably in a 2D-BFO thin film. From these measurements, we extracted domain switching time dependence of coercive voltage at temperatures of 78–300 K. From these dependences, we found coercive voltages in semiconducting ferroelectric thin films much higher than those in insulating thin films, disobeying the traditional Merz equation. Finally, an equivalent resistance model in description of free-carrier compensation of the front domain boundary charge is developed to interpret this difference. This equivalent resistance can be coincidently extracted either from domain switching time dependence of coercive voltage or from applied voltage dependence of domain switching current, which drops almost linearly with the temperature until down to 0 in a ferroelectric insulator at 78 K.

Effect of GaN Buffer Layer Growth Pressure on the Device Characteristics of AlGaN/GaN High-Electron-Mobility Transistors on Si

AlGaN/GaN High-electron-mobility transistor (HEMT) structures on silicon were grown by Metalorganic chemical vapor deposition (MOCVD) with various growth pressures during the growth of 1.5 µm thick GaN. The grown samples were characterized by X-ray diffraction, secondary ion mass spectroscopy, and photoluminescence analysis which revealed increased dislocation density, high C impurity compensation of free carriers and yellow luminescence for low pressure samples. For GaN grown at 200 Torr pressure, the formation of highly resistive buffer with C concentration as high as 3.8 ×1017 cm-3 leads to reduced buffer leakage over one order of magnitude and an enhanced breakdown voltage of 425 V for a HEMT with gate–drain spacing of 4 µm. However, unlike atmospheric pressure grown samples, the presence of unintentional C in the semi-insulating GaN degraded the channel conduction and resulted in severe current collapse.

Compensation Effects in 7 MeV C Irradiated n-Doped 4H-SiC

The defects produced by irradiation with 7 MeV C+ induce a change in the electrical properties of 4H-SiC Schottky diodes. Capacitance-voltage and Current-voltage characteristics of the diodes fabricated in epilayers doped with different nitrogen concentrations were monitored before and after irradiation with different fluences. The Capacitance-voltage curves show free carrier compensation after low fluence irradiation and it was found that the reduction of carriers per ion induced vacancy increases with nitrogen content. The forward current-voltage characteristics of the diodes show an increase in the series resistance after irradiation. This change is mainly related to the high compensation occurring around the end of the ion range.

Free-carrier compensation in ferromagnetic ion-implanted SnO2:Co

Magnetron sputtered SnO2 thin films on fused silica substrates were doped with 3, 5, and 7at.% Co by the ion-implantation technique leading to ferromagnetic order at room temperature. Transmission electron microscopy combined with energy loss spectroscopy confirms the absence of Co clusters which are larger than the resolution of ∼1nm. Electrical transport measurements using the Van der Pauw method show a high resistivity of the undoped SnO2 which increases with the Co concentration. The lower valence of Co with respect to Sn causes a compensation of donor electrons by localized holes.

Impact of deep levels on the electrical conductivity and luminescence of gallium nitride codoped with carbon and silicon

The impact of C incorporation on the deep level spectrum of n-type and semi-insulating GaN:C:Si films grown by rf plasma-assisted molecular-beam epitaxy (MBE) was investigated by the combination of deep level transient spectroscopy, steady-state photocapacitance, and transient deep level optical spectroscopy. The deep level spectra of the GaN:C:Si samples exhibited several band-gap states. A monotonic relation between systematic doping with C and quantitative trap concentration revealed C-related deep levels. A deep acceptor at Ec−2.05eV and a deep donor at Ec−0.11eV are newly reported states, and the latter is the first directly observed deep level attributed to the CGa defect. A configuration-coordinate model involving localized lattice distortion revealed strong evidence that C-related deep levels at Ec−3.0eV and Eν+0.9eV are likely identical and associated with the yellow luminescence in C-doped GaN films. Of the deep levels whose trap concentration increase with C doping, the band-gap states at Ec−3.0 and 3.28eV had the largest concentration, implying that free-carrier compensation by these deep levels is responsible for the semi-insulating behavior of GaN:C:Si films grown by MBE. The differing manner by which C incorporation in GaN may impact electrical conductivity in films grown by MBE and metal-organic chemical-vapor deposition is discussed.

DLTS of low-energy hydrogen ion implanted n-Si

We have used deep level transient spectroscopy and capacitance–voltage measurements to study the influence of low-energy hydrogen ion implantation on the creation of defects in n-Si. In particular, we have studied the ion fluence dependence of the free carrier compensation at room temperature, and we have measured the generation of VO–H complex and VP-pair in ion implanted samples. The 7.5keV H ions created defects in the top 0.3μm of samples, which resulted in carrier compensation to depths exceeding 1μm. This effect is not due to defects created by ion channeling but is rather due to the migration of defects as demonstrated using binary collision code MARLOWE.

Influence of negative ion resputtering on ZnO:Al thin films

The influence of negative ion resputtering (NIR) by oxygen ions during sputter deposition of aluminum doped zinc oxide (ZnO:Al) thin films is investigated. A planar rf diode sputter deposition source with a ceramic ZnO:Al2O3 (98 wt %:2 wt %) target is used for deposition at 250, 500 and 1000 W. The resulting thin films are characterized by four point probe, Hall measurements, secondary ion mass spectrometry (SIMS), x-ray diffraction (XRD), and atomic force microscopy (AFM). The resistivity and carrier concentration show an order of magnitude variation between 2×10−2 and 1.5×10−3 Ω cm and 7.2×1019 and 5.4×1020 cm−3, respectively, with the position on the substrate and deposition power. The Hall mobility changes are small, from 4.7 to 11.5 cm2/V s. Data from SIMS show that the variations in electrical properties do not result from contamination by alkali metals or changes in the Al dopant concentration. Spectra from XRD have one predominant peak near 34.4° indicating that the film is wurtzite and strongly textured in the (002) basal direction. All peaks are lower in 2θ than literature values, which indicates an expanded lattice in the c direction. Grain size estimates based on AFM data suggest that changes in grain size are not large enough to cause the changes in electrical properties. Compensation of free carriers by interstitial oxygen ions due to implantation and Frenkel pair generation resulting from an energetic oxygen ion flux are consistent with the data, and are postulated to be the mechanisms by which NIR influences the electrical properties of ZnO. The flux of negative ions is estimated to be 1% of the total ion flux. The correlation between NIR and the influence of deposition parameters is discussed.

Electrical characterization of impurity-free disordering-induced defects in n-GaAs using native oxide layers

Defects created in rapid thermally annealed n-GaAs epilayers capped with native oxide layers have been investigated using deep-level transient spectroscopy (DLTS). The native oxide layers were formed at room temperature using pulsed anodic oxidation. A hole trap H0, due to either interface states or injection of interstitials, is observed around the detection limit of DLTS in oxidized samples. Rapid thermal annealing introduces three additional minority-carrier traps H1 (EV+0.44 eV), H2 (EV+0.73 eV), and H3 (EV+0.76 eV). These hole traps are introduced in conjunction with electron traps S1 (EC-0.23 eV) and S2 (EC-0.45 eV), which are observed in the same epilayers following disordering using SiO2 capping layers. We also provide evidence that a hole trap whose DLTS peak overlaps with that of EL2 is present in the disordered n-GaAs layers. The mechanisms through which these hole traps are created are discussed. Capacitance–voltage measurements reveal that impurity-free disordering using native oxides of GaAs produced higher free-carrier compensation compared to SiO2 capping layers.

Trap-limited migration of vacancy-type defects in 7.5 keV H−-implanted Si

We have investigated the generation and migration of defects in crystalline Si following their introduction at room temperature by low-energy hydrogen ions in a region confined to the near-surface region. The fluence dependence of free carrier compensation and creation of electrically active defects in the n-type samples was monitored by capacitance–voltage and deep level transient spectroscopy measurements, respectively. The defects were responsible for free carrier compensation to depths exceeding ∼1 μm beyond the top ∼0.25 μm region of samples where they were generated. We describe a close relationship between generation of the VO–H complex and the VP pair on the free carrier compensation.

Post-annealing-induced free-carrier compensation in shallow-buried δ layers of GaAs(100)

The influence of post-annealing on the spatial redistribution of silicon dopants in δ-doped GaAs(100) was studied by high-resolution electron energy-loss spectroscopy (HREELS). Samples with different δ-layer depths (100, 200 and 300 Å) were investigated. As follows from the model calculations, plasmons of the two-dimensional electron gas in the δ layer couple to phonons, giving rise to the plasmaron modes ω − and ω +. The lower-energy plasmaron ω − causes an appreciable broadening of the quasi-elastic peak in HREEL spectra, compared with that of undoped GaAs(100). However, the post-annealing affects the energy-loss spectra of the samples differently. For the samples with the δ-doping plane at a depth of 200 or 300 Å, the quasi-elastic peak broadening still persists even after annealing at up to 580°C. In contrast, after annealing of the sample with the δ-doping plane at a depth of 100 Å, the broadening of the quasi-elastic peak is no longer indicated and the energy-loss spectrum appears to be very similar to that of the undoped sample. This effect manifests the full free-electron compensation in this sample, contrary to the samples with the deeper position of the δ layer beneath the surface. The free-electron compensation is explained by the trapping of free electrons by acceptor defects, which are effectively produced at the surface during annealing, and also by defects formed within the δ-doped layer. The irregular variation of the areal free-electron density in the δ layers during annealing to successively higher temperatures is interpreted as a result of a complex redistribution of the silicon dopants.

Morphology and photoluminescence improvements from high-temperature rapid thermal annealing of GaN

Rapid thermal annealing of GaN in an Ar or N2 ambient up to 1100 °C is shown to improve surface morphology and photoluminescence intensity. For both ambients the average rms surface roughness as determined by atomic force microscopy decreases from ∼4 nm on the as-grown material to ∼1 nm after a 1100 °C anneal. The band-edge luminescence intensity was increased by a factor of 4 after a 1100 °C anneal in a N2 ambient and a factor of 2 for annealing at 1100 °C in an Ar ambient as compared to as-grown material. The 1100 °C anneal improves the ratio of band edge to deep-level luminescence and also reduces the electron concentration and mobility. The reduction in mobility can be explained in terms of a two-band conduction mechanism where defect band conduction dominates at the lower carrier densities or an increase in the free-carrier compensation ratio.

DEEP LEVELS AND FREE-CARRIER COMPENSATION IN NITROGEN-IMPLANTED GaAs

This work presents a detailed study of deep and shallow level defects in nitrogen implanted n-type GaAs. Deep-level transient spectroscopy (DLTS) measurements show four electron traps and one hole trap in 140 keV nitrogen implanted GaAs after a dose of 1×1013cm-2 and a thermal annealing at 800℃ for 30 min: E1(0.111) ,E2(0.234) ,E3(0.415) ,E4(0.669) ,and H(0.545). Meanwhile,only E4 and H(0.545) defects are observed in 10 keV nitrogen-implanted GaAs after a dose of 5×1014cm-2 and the same annealing treatment. It oncluded that E2 and E3 correspond to the damages due to the high-energy implantation, E4 may be complex of intrinsic defect and implantation damage, H(0.545)is a nitrogen-related deep-level and may contribute to the free-carrier compensation in the nitrogen-implanted n-type GaAs.

Electrical properties of He+ ion-implanted GaInP

The electrical properties of high resistivity GaInP layers produced by He+ ion implantation have been studied. Thick high-resistivity layers (ρ > 107 Ω-cm) were obtained using multi-energy implants (80 keV, 120 keV, and 150 keV). Current-voltage (I-V) measurements of mesa diodes with two ohmic contacts indicate that in the temperature range from 200 to 300K, the dominant current flow mechanism in both n-type and p-type implanted materials is Poole-Frenkel emission, especially in the range of high electric field (>105 V/cm). The thermal activation energy Ea and the potential barrier height Φo of the generated deep levels are 0.16±0.005 eV and 0.33±0.005 eV, respectively. At low temperature, the hopping current dominates at low and moderate applied electric fields, and the I-V curves show an ohmic characteristic. The high-temperature annealing behavior of the implanted GaInP indicates that the compensation of free carriers in the material is dominated by damage-related levels, which are annealed out at high temperatures. In regard to typical alloying cycles of metal contacts in device fabrication, it is worth noting that the resistivity is still as high as 2 × 108 Ω-cm for n-type samples (5 × 107 Ω-cm for p-type) after 350°C annealing, which suggests that multi-energy He+ implantation is suitable for implant isolation in the GaInP device technology.

Electrical properties of oxygen ion-implanted InP

The effect of oxygen ion implantation on defect levels and the electrical properties of undoped InP (n-type) and Sn-doped InP have been investigated as a function of postimplant annealing at temperatures of 300 and 400° C. The surface interruption by ion bombardment was studied by a non-invasive optical technique—photoreflectance (PR) spectroscopy. Current-voltage (I-V) characterization and deep level transient spectros-copy (DLTS) were carried out. The free carrier compensation mechanism was studied from the microstructure behavior of defect levels associated with O+ implantation. Free carriers may be trapped in both residual and ion-bombardment-induced defect sites. Rapid thermal annealing (RTA) performed at different temperatures showed that if residual traps were removed by annealing, the compensation efficiency will be enhanced. Post-implant RTA treatment showed that at the higher temperature (400°C), trapped carriers may be re-excited, resulting in a weakened compensation. Comparing the results of undoped and Sn-doped InP indicated that the carrier compensation effect is substrate doping dependent.

Damage Related Defect Levels in Oxygen Implanted GaAs and InP

ABSTRACTOxygen ion-implantation can be used to create high resistivity regions in GaAs and InP. We have studied the low dose oxygen implantation in GaAs and InP by photoreflectance spectroscopy (PR), deep level transient spectroscopy (DLTS) and current-voltage (I-V) characteristics. Rapid thermal annealing (RTA) treatments were carried out at different temperatures after implantation to study the annealing temperature effect. The surface disturbance by implantation was studied by PR. Free carrier compensation was observed in every implanted sample and gave improved I-V properties. By DLTS tests, one electron trap with Ea = Ec-0.15eV and a hole trap with Ea = Ev + 0.76eV in the starting GaAs wafer disappeared after O+ implantation due to carrier compensation. In undoped InP, three new electron traps with Ea = Ec-0.47eV, 0.28eV and O.lleV were created after O+ implantation which are believed to be damage related. The comparison of the results from undoped and n-type doped InP indicated that the carrier compensation effect is substrate doping dependent.

Defects in pulsed laser and thermal processed ion implanted silicon

The evolution of the nature and concentration of the defects produced by 100 or 300 keV As ions at fluences 1 to 4×10−12 cm−2 inn-type, Fz Silicon doped with 1015 to 1016 cm−3 has been studied as function of thermal treatments (in the range 500°–900 °C) and of the energy density (in the range 0.3–0.6 J cm−2) of a light pulse from a ruby laser (15 ns, 0.69 μm). Deep-level transient spectroscopy (DLTS) combined with capacitance — voltage (C-V) measurements were used to get the characteristics (energy level, crosssection for the capture of majority carriers) of the defects and theirs profiles. The difficulties encountered in the analysis of the results, due to the large compensation of free carriers in the implanted region and to the abrupt defect and free carrier profiles, are discussed in detail and the corrections to apply on the C-V characteristics and the DLTS spectra are described. The defects resulting from the two types of treatments are found to be essentially the same. Only, for laser energies higher than ∼0.5 J cm−2, the laser treatment appears to introduced new defects (atE≧0.32 eV) which should result from a quenching process. The fact that a laser energy smaller than the threshold energy for melting and recrystallization is able to anneal, at least partially, the defects produced by the implantation, demonstrates that the annealing process induced by the laser pulse is not a purely thermal process but is enhanced by a mechanism involving ionization.

Defects introduced by high temperature electron irradiation in n-GaAs

Bulk Czochralski and VPE layers of n-GaAs have been irradiated with 1 MeV electrons at about 300°C, temperature at which primary defects are not stable. Up to seven electron traps are thus observed to be introduced. The dominant trap (I1) has an activation energy and a capture cross section very close to the so-called EL2 center, which suggests that EL2 could be introduced by a high temperature electron irradiation. The introduction rate of I1 is about 1cm-1, that is the same order of magnitude as those of the traps (E-traps) introduced by a room temperature irradiation, and two orders of magnitude larger than those of the traps observed after the annealing (200–300°C) of the E-traps. With a starting dopant concentration of 2×1016cm-3, we have obtained a quite complete compensation of free carriers after a total fluence of 1017e/cm2.

Selective carrier removal using oxygen implantation in GaAs

It has been reported that free-carrier compensation can be achieved using oxygen implantation and can remain stable even after annealing at temperatures up to 900°C. It is demonstrated that carrier removal rate is drastically dependent on the initial donor species. It is very likely that carrier removal in Si-doped layers takes place via formation of Si-O complexes.

The growth of buffered GaAs mesfet structures by LPE

Layers of LPE GaAs have been grown with background carrier levels in the low 1014 cm−3 range by systematic bakeouts of the Ga melts together with between-run loading in a dry N2 environment. High resistivity layers in the range 103-104Ω cm have been grown by making use of the compensation of free carriers by the out diffusion of Cr from the substrate. Intentional Cr-doping from the melt resulted in layers with poor surface morphologies. Buffered MESFET structures have been grown which show near ideal carrier concentration profiles and which do not exhibit interfacial space charge effects.