Common-mode Capacitors Research Articles

Common Mode Current Measurements in Traction Systems for Electric Vehicles

The market for partly or fully electrified vehicles is expanding fast. The number of sources and loads that are connected to the vehicles traction voltage systems (TVS) increase and thus also the ElectroMagnetic Compatibility (EMC) requirements on these sources and loads. These requirements should make sure that neither function nor lifetime of any source or load is severely affected by another. The EMC requirements include both Common Mode (CM) and Differential Mode (DM) voltages and currents created by the modulation of the various power electronic converters involved as well as intentional and parasitic impedances of the TVS and reach up to at least 10 MHz for CM and 100 kHz for DM. This article presents a theory for the dimensioning of CM-capacitances in an Electric Machine Drive (EMD) that is confirmed by measurements on a commercial electrical Volvo truck. The conclusions point out a recommendation for selection of the CM-capacitances of the EMD vs. the CM capacitance of the Electrical traction Machine (EM). As a rule of thumb the recommendation is that the CM-capacitance of the EMD is around 50 times the CM-capacitance of the EM and mounted inside the EMD to avoid big loops of CM currents in the vehicle.

Analysis and Measurement of Non-Intrinsic Differential-Mode Noise in a SiC Inverter Fed Drive and Its Attenuation Using a Passive Sinusoidal Output EMI Filter

The analysis, measurement, and attenuation of non-intrinsic differential-mode (NDM) and common-mode (CM) noise in an induction motor (IM) drive are discussed in this paper. In a voltage source inverter (VSI) fed drive, the NDM noise is caused by the excitation of the CM capacitance paths by the line to ground voltage. A measurement method at the input side of IM is proposed to separate intrinsic differential-mode (IDM), NDM, and CM noise from the total line current. It is substantiated that the NDM noise constitutes a significant portion of the measured DM noise. Hence, a passive sinusoidal output electromagnetic interference (EMI) filter (PSOEF) is presented to attenuate the NDM and CM noise. PSOEF is designed using line inductor & capacitor with the same resonance frequency to attenuate the NDM and CM noise. PSOEF has an advantage of reduced size and number of CM components as compared to conventional sinusoidal output EMI filter (CSOEF). The designed PSOEF is presented with space vector pulse width modulation (PWM) and CM voltage reduction PWM to analyze the attenuation performance, circulating current, and filter loss. The proposed measurement method and the design of PSOEF are experimentally validated on a SiC VSI switching at 200 kHz.

Integrating 10-kV SiC MOSFET Into Battery Energy Storage System With a Scalable Converter-Based Self-Powered Gate Driver

In the hardware design of battery energy storage system (BESS) interface, in order to meet the high-voltage requirement of grid side, integrating 10-kV silicon-carbide (SiC) MOSFET into the interface could simplify the topology by reducing the component count. However, the conventional gate driver design is challenging and inextensible in BESS, since the high-voltage rating and high dv/dt bring the requirements of high-voltage isolation and low common-mode capacitance. Therefore, in this article, a scalable converter-based self-powered (SCS) gate driver is further proposed. A 5-kV input power extracting converter based on a voltage-balanced SiC MOSFET stack is constructed to self-power the gate driver, which exhibits simplification of basic topology and sufficient gate driver power handling capability regardless of the switching requirement of main loop power device. Besides this, the power extracting converter is designed to act as a clamping resistor-capacitor-diode (RCD) snubber circuit, which makes the SCS gate driver scalable to the series connection of power devices. Analysis and design consideration are given in detail, followed by the experimental verification using 10-kV/10-A SiC MOSFETs.

Estimation of Number of Cores for Preventing Common-Mode Inductor Saturation in Railway Traction Inverters

In the traction system of rolling stock, the common-mode (CM) voltage is over 500 V, so the inductors that suppress the CM current are prone to saturation. To prevent saturation, the traction inverter needs many numbers of cores inside CM inductors, but the required number of cores has been determined empirically. This paper proposes a method calculate the approximate number of nanocrystalline cores to avoid saturation of CM inductors in railway traction inverters without circuit simulation. Using the only the CM capacitance of traction motor and the core characteristics on the datasheet, the maximum flux density of the inductor is calculated. Comparing calculated results of the maximum flux density with the results measured with a 1500 V DC inverter indicates that the proposed method can better identify the occurrence of saturation than the methods based on CM current presented in the literature. Furthermore, for the entire CM voltage range from 500 V to 3000 V, the minimum number of cores which saturation is prevented by the proposed calculation method is shown to be in reasonable agreement with the simulation results.

A Compact Double-Sided Cooling 650V/30A GaN Power Module With Low Parasitic Parameters

Compared with silicon and silicon carbide devices, the unique electrical and structural characteristics of gallium nitride high electron mobility transistors (GaN HEMTs) make them have different requirements for power module integration. This article proposes a novel integration scheme for the high-voltage lateral GaN HEMT dies without bonding wires. Based on the proposed integration scheme, a compact 650 V/30 A GaN power module with low parasitic parameters and high thermal performance is designed. The GaN dies are sandwiched between two ceramic substrates to improve thermal performance and ensure consistent thermal expansion coefficients. The multiple copper layer structure is used to increase wiring flexibility to reduce parasitic parameters. The design of gate and power loop layouts is discussed, and the common-mode (CM) capacitance is optimized. A comprehensive reliability evaluation is also carried out for this integration scheme. Finally, a double-sided cooling 650 V/30 A full-bridge GaN power module with 2.4 cm×1.3 cm×0.17 cm is fabricated. The thermal resistance is reduced by 30%–48% compared with the conventional single-sided cooling module. The power loop and gate loop inductances are reduced to 0.94 nH and 2 nH, respectively, and the CM capacitance is limited to 2.5 pF. The maximum d <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">v</i> /d <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">t</i> of the drain–source voltage is high as 150 V/ns with only 10% overshoot. Based on the power module, a 3.3-kW two-phase interleaved buck converter is developed. It has 820 W/in <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sup> power density and 98.85% peak efficiency.

Prediction and Analysis of Conduction Electromagnetic Interference in Communication Power

Conducted electromagnetic interference (EMI) in power electronic equipment is an important factor restricting the development of power electronics technology, and the research is of great hot and difficulty. The prediction of conducted EMI is to effectively guide the design of EMI filters. On the one hand, the selection of commonmode capacitance and inductance values can be guided by the analysis of propagation path impedance; on the other hand, various passive devices are analyzed by simulation the influence of parasitic parameters on conducted EMI can guide the selection of filter capacitors and inductors. In this paper, we take the widely used switching power supply as an example, a novel EMI conduction modelling is proposed, the impedance analysis method is used to model the high-frequency parasitic parameters, the model was built for predicting the conducted EMI accurately of switching power supply.

Liquid-Cooled Heat Sink Optimization for Thermal Imbalance Mitigation in Wide-Bandgap Power Modules

Abstract Power semiconductor die placement on substrates used in high-power modules is generally optimized to minimize electrical parasitic (e.g., stray inductance, common-mode capacitance), taking into account the minimum spacing between semiconductor dies for thermal decoupling. The layout assumes sufficient heat spreading and transfer from dies to the cooling structure. Insulated metal substrate-based power module designs may lead to asymmetrical thermal resistance across the dies, which may cause significant temperature differences among the devices. Such unintentional thermal asymmetries can lead to oversizing the cooling system design or underusing the semiconductor power processing capability. This article proposes a thermal imbalance mitigation method that uses evolutionary optimized liquid-cooled heat sinks to improve the thermal loading among devices.

Characterization of Low-Inductance SiC Module With Integrated Capacitors for Aircraft Applications Requiring Low Losses and Low EMI Issues

Future aircrafts will be composed of high number of power converters having always higher power density and efficiency. In order to increase performance of such converters, a good option is the use of silicon carbide (SiC) transistors. Although these components reduce losses when compared to their silicon-based counterpart, they increase switching speed and overshoot during commutation, which can cause serious electromagnetic interference issues and overvoltages on loads connected to these converters. For that reason, power modules containing SiC transistors must have the lowest possible parasitic inductance. This article presents a multilevel low-inductance SiC power module designed to optimize a three-phase 540 V/15 kVA inverter for modern aircrafts. Precise dynamic characterization is performed in order to accurately determine switching energies and to show improvement of loss performance of this power module when compared to discrete components and also to power modules from the market. Inverter input and output common mode current reduction due to integrated common mode capacitors in the power module is experimentally shown.

Estimation of Parasitic Capacitance of Common Mode Noise in Vehicular Applications: An Unscented Kalman Filter-Based Approach

Parasitic capacitance has a considerable impact on conductive electromagnetic interference (EMI), especially on the common mode (CM) noise. In vehicular applications, such as more electric aircraft and electrical vehicles, the value of CM stray capacitance can vary during the drive cycle, due to some change in environmental, and operating conditions, resulting in fluctuations in EMI level. Designing EMI filters according to potentially overestimated CM capacitance results in additional weight, volume, and cost which should be avoided. In this paper, for the first time, the parasitic capacitance relevant to CM noise is estimated in real-time using unscented Kalman filter (UKF). The UKF is employed due to its ability in dealing with nonlinearity and stochastic nature of the EMI as well as the measurement noises. The proposed method is tested on a typical dc-dc buck converter in different operating conditions. The effectiveness of the proposed method is tested using some hardware-in-the-loop experiments using dSPACE1104 development platform.

Capacitance of UR-Core and C-Core Common Mode Inductors

An important aspect of all power processing equipment is common-mode current generation. Common-mode current leads to electromagnetic noise and potential equipment malfunction. Common-mode inductors are often used to reduce common-mode current. However, their effectiveness is limited by their capacitance. In this paper, common-mode capacitance models of two related classes of common mode inductors are set forth. These models include an improved method of calculating the layer-to-layer capacitance. Means of reducing capacitance by use of multiple inductors is discussed. The methodology for calculating capacitance is experimentally validated using several common mode inductors. Finally, the use of the model in a multi-objective optimization-based common mode inductor design algorithm is demonstrated.

Voltage distribution in the windings of high temperature inverter-fed motors

PurposeHigh-temperature (HT°) motors are made with inorganic coils wound with a ceramic-coated wire. They must be carefully designed because the HT° insulating materials have a lower breakdown voltages than the polymers used for insulating standard machines.Design/methodology/approachThe voltage distribution between stator coils is computed with high-frequency (HF) equivalent circuits that consider the magnetic couplings and the stray capacitances. Two time scales are used for getting a fast computation of very short voltage spikes. For the first step, a medium time scale analysis is performed considering a simplified equivalent circuit made without any stray capacitance but with the full PWM pattern and the magnetic couplings. For the second step, a more detailed HF equivalent circuit computes voltage spikes during short critical time windows.FindingsThe computation made during the first step provides the critical time windows and the initial values of the state variables to the second one. The rise and fall time of the electronic switches have a minor influence on the maximum voltage stress. Conversely, the connection cable length and the common-mode capacitances have a large influence.Research limitations/implicationsHF equivalent circuits cannot be used with random windings but only to formed coils that have a deterministic position of turns.Practical implicationsThe proposed method can be used designing of HT° machine windings fed by PWM inverter and for improving the coils of standard machine used in aircraft’s low-pressure environments.Originality/valueThe influence of grounding system of the DC link is considered for computing the voltage spikes in the motor windings.

A Gate Drive With Power Over Fiber-Based Isolated Power Supply and Comprehensive Protection Functions for 15-kV SiC MOSFET

This paper presents a 15kV silicon carbide (SiC) MOSFET gate drive, which features high common-mode (CM) noise immunity, small size, light weight, and robust yet flexible protection functions. To enhance the gate-drive power reliability, a power over fiberbased isolated power supply is designed to replace the traditional design based on isolation transformer. It delivers the gate-drive power by laser light via optical fiber over a long distance (>1 m), so a high isolation voltage (>20 kV) is achieved, and the circuit size and weight are reduced. More importantly, it eliminates the parasitic CM capacitance coupling the power stage and control stage, and thus eradicates the control signal distortion caused by high dv/dt in switching transients of the high-voltage SiC devices. In addition, the gate-drive circuit design integrates comprehensive protection functions, including the overcurrent protection, undervoltage/overvoltage lockout, active miller clamping, soft turn off, and fault report. The overcurrent protection responds within 400 ns. The experimental results from a 15kV double-pulse tester are presented to validate the design.

Design and Implementation of Integrated Common Mode Capacitors for SiC-JFET Inverters

This paper deals with the issue of electromagnetic interference (EMI) in SiC-JFET inverter power modules, and proposes a solution to limit conducted emissions at high frequencies. SiC-JFET inverters can achieve very fast switching, thereby reducing commutation losses, at the cost of a high level of EMI. In order to limit conducted EMI emissions, it is proposed to integrate small-value common-mode (CM) capacitors, directly into the power module. High-frequency noise, which is usually difficult to filter, is then contained within the module, thus keeping it far from the external network. This approach is in line with the current trend toward the integration of various functions (such as protection, sensors or drivers) around power devices in modern power modules. To demonstrate this concept, the resulting CM noise was investigated, and compared with a standard configuration. Simulations were used to design the integrated capacitors, and measurements were carried out on an experimental SiC-JFET half-bridge structure. A significant reduction was achieved in the experimentally observed CM conducted emissions, with a very minor influence on the switching waveforms, losses, and overall size of the system. The benefits and limitations of this design are discussed for the case of mid-power range inverters for aircraft applications.

Common-Mode Voltage Reduction Pulsewidth Modulation Techniques for Three-Phase Grid-Connected Converters

This paper experimentally investigates the performance of three-phase voltage source pulsewidth modulation (PWM) converter, with the grid interfaced photovoltaic energy conversion system being the main application. In such applications the ground leakage current [common mode current (CMC)] should be much less than an ampere and this is difficult to obtain in transformerless (direct) connected systems. With the target being the reduction of the common mode voltage (CMV) and CMC, the converter performance is investigated thoroughly. Conventional PWM methods [space vector PWM (SVPWM) and discontinuous PWM (DPWM)] and recently developed reduced common mode voltage PWM (RCMV-PWM) methods [active zero state PWM (AZSPWM) and near state PWM (NSPWM)] are considered. The performance of a 1-kW rated PWM rectifier with additional common-mode capacitor emulating a PV system has been experimentally investigated. It is shown that the CMV and CMC of the tested RCMV-PWM methods is significantly less than conventional methods. In particular, NSPWM yields the best overall performance including low ground leakage current, low inverter output (phase current) and input (dc-link current) ripple, and low switching losses. Accounting for the parasitic capacitance effect, the resonant frequency of the common-mode circuit is identified and it is used in the converter design for the purpose of avoiding resonances involving large CMV-CMC. This paper aims help the design engineer select the appropriate PWM method for grid-connected applications and provides some design rules of thumb.

Modeling and Characterization of Incomplete Shielding Effect of GND on Common-Mode EMI of a Power Converter

Common-mode (CM) electromagnetic interference (EMI) noise of a power converter is mostly due to the displacement current of the parasitic CM capacitance distributed between earth and the corresponding dynamic circuit node with very large dv/dt. In the layout of the printed circuit board (PCB) of a power converter, the power ground (GND) is an important factor to mitigate CM EMI, because it could act as a shield between earth and the dynamic circuit node. Taking a buck converter as an example, this paper proposes a method to evaluate the incomplete shielding effectiveness of GND on CM EMI emission. It first builds up a CM EMI model for the converter. The CM model is then used to analyze the shielding mechanism of GND on CM EMI. Numerical simulations are performed for comparison of shielding effectiveness of GND with different layouts. The simulation results show that the shielding effectiveness of GND increases conditionally with the mutual capacitance between the GND and the dynamic circuit node. The evaluation method and the simulation results are validated through experimental results.

Use of a $C_{z}$ Common-Mode Capacitor in Two-Wire and Three-Wire Offline Power Supplies

In a two-wire (no chassis ground) input offline power supply system, a filter capacitor is often connected between the primary side and the secondary side of the transformer for common-mode electromagnetic interference reduction. For three-wire offline power supplies, such a capacitor is also sometimes used for the same purpose. It is unclear how this filter capacitor works. In this paper, an explanation of the noise suppression mechanism of such a capacitor is given. From the understanding of the mechanism, it is noted that when properly connected, works fine, but when improperly connected, it makes the noise performance even worse. Suggestions were made with regard to a proper connection for a variety of converter configurations with different variations.

Measurement-Based Method to Characterize Parasitic Parameters of the Integrated Power Electronics Modules

A measurement-based method for extracting the parasitic parameters of active power electronics modules (IPEMs) is proposed. Parasitic inductances and capacitances inside the IPEM can all be extracted using this method without destroying the structure. The linearized model is derived from impedance measurement and it is valid from low frequency to frequencies as high as 100 MHz. Extracted parameters are compared to those from commercial software and the results are in good agreement. A parallel resonance method is proposed for the characterization of common-mode capacitances

A Novel Output Filter Topology to Reduce Motor Overvoltage

When an induction machine is supplied with a voltage-source pulsewidth-modulation (PWM) inverter, a ringing voltage overshoot appears at motor terminals due to steep PWM voltage pulse propagation along the motor cable. It has been reported that in particular situations, when very long motor cables are used and retrofit installations, the overvoltage could stress motors with poor insulation. This paper presents a novel inverter output filter topology consisting of an LC filter which has the star point of the common-mode capacitors clamped to the + and - dc-link rails by the means of two diodes. The proposed filter drastically reduces the voltage overshoot at the motor terminals, thus reducing motor insulation stress. This is a cheap alternative to more known industrial solutions.

Effects of parasitics on the control of voltage source inverters

Advancements in AC industrial drives have been propelled through improvements in power electronics and control hardware. Improvements in insulated gate bipolar transistors (IGBTs) allowed faster switching speeds, which provides lower thermal losses. Digital signal processors and improved control algorithms allow AC drives to address applications previously handled by DC drives. Capacitive coupling between the IGBT, power structure, and control platform components influence drive dynamics and contributes to signal and waveform distortion. This differential and common mode capacitance is often disregarded as parasitics and not considered in designing the control. This paper decouples the major contributors to motor waveform distortion, analyzes them, quantifies them, and presents a correction strategy. Simulations validate the analysis and experimental results demonstrate the strategy's benefits.