Combination Of Rapid Thermal Annealing Research Articles

Shaping Perovskites: In Situ Crystallization Mechanism of Rapid Thermally Annealed, Prepatterned Perovskite Films.

Understanding and controlling the crystallization of organic–inorganic perovskite materials is important for their function in optoelectronic applications. This control is particularly delicate in scalable single-step thermal annealing methods. In this work, the crystallization mechanisms of flash infrared-annealed perovskite films, grown on substrates with lithographically patterned Au nucleation seeds, are investigated. The patterning enables the in situ observation to study the crystallization kinetics and the precise control of the perovskite nucleation and domain growth, while retaining the characteristic polycrystalline micromorphology with larger crystallites at the boundaries of the crystal domains, as shown by electron backscattering diffraction. Time-resolved photoluminescence measurements reveal longer charge carrier lifetimes in regions with large crystallites on the domain boundaries, relative to the domain interior. By increasing the nucleation site density, the proportion of larger crystallites is increased. This study shows that the combination of rapid thermal annealing with nucleation control is a promising approach to improve perovskite crystallinity and thereby ultimately the performance of optoelectronic devices.

Effect of rapid thermal annealing on bulk micro-defects and plastic deformation in silicon during high temperature processing

We studied how rapid thermal annealing (RTA) affects bulk micro-defects (BMDs) and plastic deformation in Si wafers processed at high temperatures. BMDs caused by oxygen precipitation at 1200 °C were investigated in Si wafers as a function of annealing time with and without RTA and pre-annealing. Only the pre-annealed RTA wafer revealed an average BMD size of ~50 nm after annealing at 800 °C for 2 h and subsequently at 1000 °C for 4 h, and such wafers retained BMDs after annealing at 1200 °C for 500 min. The relationship between BMDs and plastic deformation was investigated for Si wafers subjected to RTA at various temperatures. Dislocations were generated and propagated after the simulated CMOS heat treatment as RTA temperature increased because of the low dislocation pinning effect produced by the reduction in residual oxygen while precipitated oxygen concentration increased. Incident angle deviation in the rocking curve indicated a high degree of plastic deformation caused by high RTA temperature after performing a realistic device fabrication process. We propose that a combination of RTA and a pre-annealing process can improve the internal gettering efficiency during high temperature processing, which controls BMDs. This would balance the residual oxygen and preventing plastic deformation.

Atomic-Layer-Deposition Assisted Formation of Wafer-Scale Double-Layer Metal Nanoparticles with Tunable Nanogap for Surface-Enhanced Raman Scattering

A simple high-throughput approach is presented in this work to fabricate the Au nanoparticles (NPs)/nanogap/Au NPs structure for surface enhanced Raman scattering (SERS). This plasmonic nanostructure can be prepared feasibly by the combination of rapid thermal annealing (RTA), atomic layer deposition (ALD) and chemical etching process. The nanogap size between Au NPs can be easily and precisely tuned to nanometer scale by adjusting the thickness of sacrificial ALD Al2O3 layer. Finite-difference time-domain (FDTD) simulation data indicate that most of enhanced field locates at Au NPs nanogap area. Moreover, Au NPs/nanogap/Au NPs structure with smaller gap exhibits the larger electromagnetic field. Experimental results agree well with FDTD simulation data, the plasmonic structure with smaller nanogap size has a stronger Raman intensity. There is highly strong plasmonic coupling in the Au nanogap, so that a great SERS effect is obtained when detecting methylene blue (MB) molecules with an enhancement factor (EF) over 107. Furthermore, this plasmonic nanostructure can be designed on large area with high density and high intensity hot spots. This strategy of producing nanoscale metal gap on large area has significant implications for ultrasensitive Raman detection and practical SERS application.

Reduction of residual stress in SiO2‐matrix silicon nano‐crystal thin films by a combination of rapid thermal annealing and tube‐furnace annealing

AbstractIn this work, SRO thin films were prepared by magnetron sputtering and converted to Si nano‐crystals (Si‐NCs) by rapid thermal annealing (RTA). Further tube‐furnace annealing was performed on the Si‐NC films in order to reduce residual stress. The residual stress in the Si‐NC thin films after RTA at 1100 and 1200 °C were determined as 2.41 and 1.87 GPa, respectively, and the following tube‐furnace annealing can obviously decrease the residual stress. The residual stress decreased with increasing annealing temperature and time. The following tube‐furnace annealing at 1100 °C for 60 min and 1000 °C for 180 min reduced the residual stress to 1.46 and 1 GPa, respectively, for the Si‐NC thin films with prior RTA at 1200 °C. The reduction of residual stress was ascribed to the larger density of extended defects and the lower surface‐to‐volume ratio of the thin films.

Multi-layer stacked OHA and AHA tunnel barriers for charge trap flash non-volatile memory application

The tunnel barrier engineering technology is expected to provide faster programming and erasing (P/E) speeds as well as longer data retention for next generation non-volatile memory (NVM) devices. In this study, we fabricated the charge trap flash (CTF) memory devices with engineered tunneling barrier by stacking ultra thin SiO 2, HfO 2 and Al 2O 3 layers. Because the as-deposited tunneling barriers have charge trapping characteristic, the rapid thermal annealing (RTA) and forming gas annealing (FGA) processes were conducted at various temperatures to eliminate the charge trapping property in multiply stacked tunnel barriers. As a result, it is found that the optimized heat treatment condition to reduce the charge trapping and to enhance the tunneling efficiency of tunneling barriers is a combination of RTA at 800 °C and FGA at 450 °C processes. Then, metal–Al 2O 3–HfO 2–Al 2O 3–HfO 2–SiO 2–Si (MAHAHOS) structure and metal–Al 2O 3–HfO 2–Al 2O 3–HfO 2–Al 2O 3–Si (MAHAHAS) structure memory devices were fabricated and the memory characteristics were compared. The MAHAHAS structure memory device showed faster program and erase speed, stable data retention and endurance characteristics than the MAHAHOS structure memory device. Therefore, the tunnel barrier composed of Al 2O 3/HfO 2/Al 2O 3 stacked layer is applicable to embedded memory devices in System-On-Glass as a low temperature process.

Phonon confinement effect on nanocrystalline LiCoO 2 studied with Raman spectroscopy

A systematic investigation on nanocrystalline LiCoO 2 has been carried out using Raman spectroscopy. We synthesized nanocrystalline LiCoO 2 (ca. 20–50 nm) through a combination of rapid thermal annealing at various annealing temperatures and a sol–gel method assisted with a triblock copolymer surfactant. Powder X-ray diffraction measurements revealed the formation of LiCoO 2. The crystallite size of LiCoO 2 from the Scherrer equation strongly depended on the annealing temperature. The crystallite size was confirmed by SEM and TEM measurements. Raman shifts of the A 1g and E g modes for nanocrystalline LiCoO 2 exhibited a broadening and a frequency shift according to the crystallite size. While the frequency shift could be ascribed to a structural strain at the surface, the broadening was due to the phonon confinement effect produced by narrow crystal boundaries.

Silicon Nanowires by Aluminum-Induced Crystallization of Amorphous Silicon

This paper discusses controlled studies on the effect of stress on the formation of silicon nanowires (SiNWs) produced by aluminum-induced crystallization (AIC) of plasma-enhanced chemical vapor deposited amorphous silicon (a-Si:H). The impact of stress on the growth of SiNWs was completely decoupled from other factors such as a-Si:H and Al deposition parameters and rapid thermal annealing conditions. This study shows, that AIC of a-Si:H can be used to fabricate SiNWs through the combination of rapid thermal annealing and stress adjustment.

Two-Step Annealing for Nickel-Induced Crystallization of Amorphous Silicon Films

Nickel (Ni)-induced crystallization of amorphous silicon has been studied with a novel two-step annealing process for reducing the long annealing time and improving the structural and electrical properties of polycrystalline silicon (poly-Si) films. Two-step annealing is a combination of rapid thermal annealing (RTA) and conventional furnace annealing (CFA). In the two-step annealing, RTA was employed at 550°C for 10 min and CFA was used at 500°C for various annealing times (5,10,15, and 20 h) in ambient. The poly-Si films prepared using two-step annealing have a more uniform, larger grain size and MILC rate compared to those prepared by CFA alone. Additionally, poly-Si films prepared by RTA plus 5 h of CFA exhibit a lower resistivity of than those processed with 25 h of CFA.

Annealing effects on the interface and insulator properties of plasma-deposited Al/SiOxNyHz/Si devices

We have studied and compared the effects of conventional annealing in a forming gas atmosphere (430 °C, 20 min) and rapid thermal annealing (RTA) in an inert Ar atmosphere (400–1000 °C, 30 s) on Al/SiOxNyHz/Si devices. The samples were deposited by the electron cyclotron resonance plasma method at low temperature (T = 200 °C). The devices were characterized by surface photovoltage measurements before applying contacts and by capacitance–voltage measurements.All the as-deposited samples containing N had positive flat-band voltage, which corresponds to negative charge in the insulator and/or in the interface states (QINS). Additionally, trapping of positive charge is observed when measuring from inversion to accumulation after measuring from accumulation to inversion. This behaviour is tentatively attributed to the presence of defects related to N, such as the K centre (N3≡Si↑) or the N dangling bond (Si2=N↑), which may be present in a negatively charged state. For samples of SiO2 composition, with a negligible N content, QINS is positive. High densities of interface states (Dit), above 1012 eV−1 cm−2, are observed in the as-deposited samples.Both the annealing in a forming gas atmosphere and the RTA result in the change of the sign of QINS from negative to positive and a decrease of its absolute value, as well as a decrease of Dit of about one order of magnitude. The trapping of positive charge is also greatly reduced. These improvements of the electrical properties are attributed to the passivation of defects by H present in the forming gas atmosphere or in the SiOxNyHz film itself in a non-bonded state. For RTA temperatures above 700 °C the properties of the devices degrade due to the release of H. The combination of RTA and annealing in a forming gas atmosphere results in the best properties.

Properties of lead lanthanum titanate ferroelectric thin films by rapid thermal annealing

Properties of lead lanthanum titanate ferroelectric thin films by rapid thermaal annealing at various temperatures were investigated. The grain sizes of the films are about 20 nm from 500—850°C. The remanent polarization Pr and the coercive field Ec of typical sampels are about 5.3 μml C/cm2 and 102KV/cm, respectively. The dielectric constant is about 370, the dielectric loss tangent is less than 2% at 1KHz. Forthermore, grain sizes, morphologies, dielectric and ferroelectric properties of the thin films annealed by rapid thermal annealing (RTA) process, conventional furnace annealing (CFA) process and thermal annealing process of combination of RTA with CFA were compared

Micro‐Raman study of BaTiO3 thin films prepared by the metallo‐organic decomposition technique

AbstractA micro‐Raman probe was used to characterize thin films of barium titanate synthesized by metallo‐organic decomposition and rapid thermal annealing techniques. All films were found to be polycrystalline aggregates with perovskite as the primary phase. The optimum film processing procedure as evidenced by the micro‐Raman probe was a combination of rapid thermal annealing at 950°C in an oxygen or argon atmosphere. Fourier transform infrared spectra indicated that samples annealed in a vacuum show higher carbon contamination than those receiving the same heat treatment in an oxygen or argon atmosphere.

A New Annealing Method to Obtain High Quality Poly-Si

ABSTRACTA new annealing method, a combination of rapid thermal annealing (RTA) and furnace annealing, has been developed to obtain a high quality poly-Si from a-Si deposited by LPCVD. This method produces a large grain poly-Si with good uniformity, which may result from the growth of relatively defect-free nucleus generated at a high temperature by RTA. Poly-Si thin film transistors fabricated by this new annealing method have higher field effect mobility and better uniformity compared with those by the conventional furnace annealing.

The use of rapid thermal annealing for studying contamination in silicon

Contamination of silicon wafers by transition metals is known to degrade device performance sharply. Transition metal contamination can arise from several sources. Here, we present a fast method to detect contamination consisting of the combination of rapid thermal annealing which is known to activate metallic impurities and diffusion length measurements by the surface photovoltage technique which needs no permanent contacts.

Spatial localization and diffusion of atomic silicon in delta-doped GaAs

Spatial localization and diffusion of atomic Si is studied inσ-doped GaAs by employing capacitance-voltage (CV) measurements and rapid thermal annealing. It is found that diffusion and segregation are irrelevant inσ-doped GaAs grown at temperatures below 550° C. Combination of rapid thermal annealing and capacitance-voltage profiling is a novel method which is most sensitive to diffusion and it is shown that this method is able to detect diffusion on a length scale of 10A. CV-profile widths broaden from⪯40A to 137A upon rapid thermal annealing at 1000° C for 5 sec. The diffusion coefficient and the activation energy of atomic Si-diffusion in GaAs are determined to beDo = 4 × 10−4 cm2/s andEa = 2.45 eV, respectively. The basic theory of CV-measurements on a quantum-mechanical electron system is developed.

Early stages in thin film metal–silicon and metal–SiO2 reactions under rapid thermal annealing conditions: The rapid thermal annealing/transmission electron microscopy technique

A simple and fast structural characterization technique for thin film solid-phase reactions has been developed, based on a combination of rapid thermal annealing and transmission electron microscopy (the ‘‘RTA/TEM technique’’). The technique is used to investigate fast interfacial reactions in layered Si/Ni/Si, Si/Co/Si, Si/Ti/Si, and SiO2/Ti/SiO2 films. In contradiction to first-phase rules, all three metal–Si systems exhibit nucleation of multiple ‘‘first’’ silicides; under certain conditions, an amorphous (metal+Si) mixture exists prior to this nucleation. The simultaneous study of Si–Ti and SiO2–Ti reactions with RTA/TEM can quickly determine processing ‘‘windows’’ when selective silicidation is required.