CNTFET Devices Research Articles

Carbon nanotube field-effect transistor based pH sensors

Field-effect transistor (FET) biosensor has received widespread attention due to their unique high-sensitivity properties. In conventional FET biosensors, the complicated interaction between the sample solution and the semiconductor channel always results in poor stability. Especially for FET-based pH sensors, the interface failure caused by the harsh acid-base working environment makes accurate, continuous, and low hysteresis pH measurement quite challenging. Here, we report a carbon nanotube (CNT)-FET pH sensor with enhanced environmental stability by introducing HfO2 film into the gate insulator. The proposed devices show desired immunity to environmental interference including various chemical and physical factors. More importantly, we verified the feasibility of this CNT-FET device for continuous pH sensing, which demonstrates a sensitivity of 67.62 mV/pH, a wide pH range of 1.34–12.68, and low hysteresis of 500 pA with pH switching loops of 4.22–10.24. This work not only realizes a high-performance pH sensor but also paves the way for the development of FET biosensors with high environmental stability, which is of great significance for FET biosensors to maintain normal working performance in complex systems.

Impact of gate misalignment on the performance of CNTFET: TFET vs MOSFET

CNTFET device structures are gaining more research interest as conventional FET structures are reaching their scaling limits. One of the most crucial effects that could occur in the fabrication on the nanometer scale is the gate misalignment. In this paper, we report on a study of the impact of gate misalignment on the performance of MOSFET and TFET CNT-based device architectures. Given the fact that gate misalignment can occur on any side of the gate, extensive simulations have been carried out to account for the gate misalignment towards the source and the drain sides. We scrutinize how the misalignment influences the device performance parameters like ON-current, subthreshold swing SS, overall gate capacitance and cut-off frequency. Moreover, these “Figure of Merits” are calculated for two cases, one of which uses a single oxide all over the device various regions and the other incorporates a low-k oxide spacer material over the source and the drain regions while a high-k gate oxide material is utilized over the channel region. Simulation results show that MOSFETs are more immune to the fabrication process variations than TFETs.

(Invited) Controlling CNT-Biomolecule Interfaces -and Their Orientation- to Tune Electrostatic Gating in CNT-Based Biosensing Devices

The development of novel bioelectronics interfaces via the bottom-up assembly of platforms capable of monitoring and exploiting biomolecular interactions with nanoscale control is a central challenge in nanobiotechnology. Biomolecular interactions can be used to electrostatically gate conductance in nanomaterials-based field effect transistors (FETs), but this can be exploited far more effectively than currently done by defining the interface between the biomolecule and the transducer. This strategy forms the basis of greatly improved electrical-based biosensors and offers great potential for building next generation biosensing devices.We will first present different approaches to control the assembly of carbon nanotube (CNT)-protein interfaces towards the fabrication of bioelectronic devices, with a particular focus on the development of real-time biosensors with engineered protein interfacing. We will report the construction of nanoscale protein-based sensing devices designed to present proteins in defined orientations; this allowed us to control the local electrostatic surface presented within the Debye length, and thus modulate the conductance gating effect upon binding incoming protein targets.[1] We systematically tested how protein orientation dictates current response through a CNT-FET device by defining the interface site on the capture protein. Presentation of different protein-protein electrostatic surfaces within the Debye length led either to increase or decrease in conductance: defined and homogenous attachment allows distinctive conductance profiles to be sampled based on the unique electrostatic features of individual proteins, and can support the identification of preferred proteins orientations for optimal sensing. In our case this was done for the detection of a range of concentrations of a class b-lactamase enzymes, that degrade antibiotics, in the context of investigating antimicrobial resistance (AMR).Additionally, we will present the controlled assembly of CNT–GFP hybrids employing DNA as a linker, with protein attachment occurring predominantly at the terminal ends of the nanotubes, as designed.[2] The electronic coupling of the proteins to the nanotubes was confirmed via in-solution fluorescence spectroscopy, that revealed an increase in the emission intensity of GFP when linked to the CNTs. The strategies presented here are of general applicability for the controlled assembly of CNT-protein interfaces toward biosensing and optoelectronics applications.Finally, we will report the tuning of electrostatically gated conductance changes in CNT-aptamer biosensing FETs. We have developed diverse strategies for the construction of such nanoscale devices via in-solution assembly and (self)organization on surfaces. We will discuss how this can lead to distinct conformational changes of the CNT-bound aptamers upon biomarker recognition , leading to opposite electrical response of our biosensors , i.e. increase or decrease in current.[3] These studies highlight the need to define CNT-biomolecule interfaces in order to control and tune by design the electrostatic gating in CNT-based devices, toward the construction of optimized biosensors.[1] Angew. Chem. Int. Ed. 2021, 60, 20184 –20189[2] Biomolecules 2021, 11(7), 955[3] in preparation

Analysis of Limits of CNTFET Devices through the Design of a Differential Amplifier

In this paper, in order to analyze the limits of CNTFET devices, we study the behavior of a differential amplifier based on CNTFET for application between 50 GHz and 500 GHz, determining the highest gain achievable with low noise level. In particular the examined circuit presents a differential input and single ended output, in which each CNTFET is composed by a single CNT, having the same diameter. The analysis is done without considering embedding parasitic effects since our aim is to study the intrinsic limits of CNTFET. We find a solution that is near optimum for gain and noise. In particular we obtain that, using CNTFETs whose channel length is 25 nm, it is possible to reach 27.0 dB gain at 50 GHz and 19.7 dB gain at 500 GHz with a noise spectral power density noise 95 nV/Hz1/2 and 85 nV/Hz1/2 respectively.

Low power, high-performance reversible logic enabled CNTFET SRAM cell with improved stability

Abstract With aggressive scaling of device feature size, performance of conventional MOS SRAM is affected and reliability, leakage power dissipation, and testing related issues arise due to short channel effects. So CNTFET device is promising and ideal candidate to replace existing MOS technology because of its excellent performance and high thermal stability. In this paper design and analysis of CNTFET SRAM cell, Reverse Logic enabled SRAM (RL-SRAM) and RL-SRAM with body bias is presented at 32 nm using Vdd 0.7 V. Adiabatic technique is incorporated in SRAM cell that uses reversible logic, plays an important role to reduce power consumption by recycling the energy stored at node capacitance instead of dissipating in form of heat. By incorporating of reversible logic with SRAM, 60.72% and 65.20% reduction in leakage power dissipation and improvement of 55.34% and 64.77% in delay is achieved for CNTFET RL-SRAM and RL-SRAM with body bias respectively in comparison of CNTFET SRAM cell. Results are also compared with previous work [1] , which shows significant improvement in average power consumption, delay, and leakage power dissipation is achieved using CNTFET SRAM cell design without affecting the system performance. Stability of the memory cell is also examined by using butterfly curve and N-curve analysis.

Design and analysis of different full adder cells using new technologies

<span>CMOS transistors are most widely used for the design of computerized circuits, when scaling down the nanometer technology these devices faces the short channel effects and causes I-V characteristics to depart from the traditional MOSFETs, So the researchers have developed the other transistors technologies like CNTFET and GNRFET. Carbon nanotube field effect transistor is one of the optimistic technologies and it is a three terminal transistor similar to MOSFET. The semiconducting channel between the two terminals called source and drain comprises of the nano tube which is made of carbon. Graphene nano ribbon filed effect transistor is the most optimistic technology here the semiconducting channel is made of graphene. When contrasted with barrel shaped CNTFETs, GNRFETs can be prepared in situ process, transfer-free and silicon compatible, thus have no passage related and alignment problems as faced in CNTFET devices. This paper presents different 1-bit Full Adder Cells (FACs) like TG MUX-based FAC (TGM), MN MUX-based FAC (MNM), proposed TG Modified MUX-based FAC (TGMM) and another proposed MN Modified MUX-based FAC (MNMM) are designed using different technologies like CNTFET and GNRFET at 16nm technology with supply voltage of 0.85v and simulation is done by using Synopsys HSPICE Tool and the proposed designs are best when compared to the TGM and MNM FACs in terms of Static and Dynamic powers Dissipations and Delay.</span>

Simulation and investigations on semiconductor materials and devices with surround gate geometry for high performance and low power nano scale applications

All The device with surround gate geometry provides a better way to scale down the dimensions and optimization of power and performance for nano scale applications. The superior gate control can be obtained by novel materials and innovative techniques for various regions of the nano scale device. The surround gate (SG) field effect transistor provides high gain, high trans-conductance, reduced short channel effects and conditions for scaling the technology to sub nano scale. The device has been modeled using SILCAVO Atlas3d and DevEdit3D module also used for creating the device structure with integration of multiple layers of different materials. In this paper surround gate device input (ID-VGS) and output (ID-VDS) characteristics have been intensively studied and parameters including ION/IOFF ratio, DIBL, sub threshold slope extracted and compared with the conventional devices. The silicon nanowire field effect transistor (SiNWFET) with surround gate geometry at 0.6 V applied between source and drain exhibits threshold voltage (VTH) 0.204 V, drain induced barrier lowering (DIBL) 172 mV/V, sub-threshold swing (SS) 104.23 mV/dec, ION=440.1μA, IOFF=1.04 μA and ION/IOFF ratio 4.24e+02. The results demonstrate improvement in device parameters for the SiNWFET device as compared to other conventional MOSFETs. The result obtained for SiNWFET are also compared with FinFET and CNTFET devices. This research also investigates the integration of alternate channel, dielectric and gate materials into novel GAA device structure.

Arc discharge technique to fabricate nanocarbon gas sensing platform

Abstract The nanocarbon materials have got great attention in various applications due to their peculiar electrical properties. This report discusses the fabrication technique of nanocarbon sensors on PCB templates using the decomposition of methane between small gaps 2–5 mm of graphite electrodes. The growth mechanism of the carbon strand between small gaps of graphite electrodes governs by dielectrophoresis. The developed nanocarbon based sensor is characterized through current-voltage characteristics at different gas flow rates of methane gas. The structural morphology of the grown nanocarbon materials is explored by SEM images and the images recorded under the high-resolution optical microscope. The fabricated gas sensing platform works well and shows response under air and methane environment. The arc discharge decomposition of methane technique might have promising applications for sensor fabrication as well as for carbon-based nanoelectronics devices such as CNTFET devices.

A Review of Carbon Nanotubes Field Effect-Based Biosensors

Field effect-based biosensors (BioFETs) stand out among other biosensing technologies due to their unique features such as real time screening, ultrasensitive detection, low cost, and amenability to extreme device miniaturization due to the convenient utilization of nanoscale materials. Nanodevices pave the way for the detection of tiny biomolecules and minute concentrations of analytes as they are ultrasensitive to surface charge modulation, allowing for better point-of-care screening of various life-threatening infectious diseases. Semiconducting carbon nanotubes (sc-CNTs) are exceptionally promising for FET-channel integration to replace bulky silicon technology beyond the dimensions of the short channel effects for their 1D ultrathin structure, superior electronic features, and biocompatibility. However, performance of CNTFET biosensors is influenced by the inhomogeneous interface between sc-CNTs and metallic source and drain electrodes. This article reviews recent studies on CNTFET biosensors, morphology of these devices and the cause-and-effect of the interface issues between sc-CNTs and metallic electrodes. Finally, future outlook on suggested technology to improve the performance of such CNTFET devices is presented.

ANALYSIS OF SURFACE POTENTIAL MODEL DEVELOPED FOR BALLISTIC PLANAR CNTFET OPERATED WITH CNT DIAMETER VARIATION

Carbon nanotube based devices are foreseen as the vital candidates for fabricating high-performance logic blocks that can be operated in the sub 22nm regime. Unlike their silicon-based counterparts, these CNTFET devices can be operated without getting affected by short channel issues of downscaled technology. In this work, an analytic model based on surface potential of the ballistic planar CNTFET device is developed and a simulation study is carried out to examine the current-voltage characteristics of the device. The developed MATLAB model also investigates the stability of the device performance under the variation of CNT diameter and oxide thickness used for the device. The model generates optimal I-V characteristics of the device that possess a negligible off-state current even under an increase in temperature. The obtained current values are compared with the simulation results of the nanoHUB Fettoy simulator for the validation of the developed model. The characteristics demonstrate the compatibility of the device to design high-performance circuits.

A chemodosimeter-modified carbon nanotube-field effect transistor: toward a highly selective and sensitive electrical sensing platform.

We present a carbon nanotube-field effect transistor (CNT-FET) biosensor which first implements the chemodosimeter sensing principle in CNT nanoelectronics. We experimentally illustrate the specific molecular interplay that the cysteine-selective chemodosimeter immobilized on the CNT surface can specifically interact with cysteine, which leads to the chemical transformation of the chemodosimeter. Since the chemical transformation of the chemodosimeter can disrupt the charge distribution in the vicinity of the CNT surface, the carrier equilibrium in CNT might be altered, and manifested by the conductivity change of CNT-FET. The real-time conductance measurements show our biosensor is capable of label-free, rapid, highly selective and ultrasensitive detection of cysteine with a detection limit down to 0.45 fM. These results first verify the signaling principle competency of chemical transformation of the chemodosimeter in CNT electronic sensors. Combined with the advantages of the highly selective chemodosimeter and sensitive CNT-FET, the excellent performance of our sensor indicates its promising prospect as a valuable tool for developing highly sensitive and selective sensing platforms in practical application.

Effect of varying gate distance on the threshold voltage shift in carbon nanotube field effect transistor gas sensors

Suspended individual carbon nanotubes show great promise in use as gas sensors, as they are not only highly sensitive and selective, but can be operated at a few μW of power consumption. This work reports on a novel architecture and process flow to reduce the voltage range needed for a full sensor characterization to the values given by modern technology. The developed fast and flexible fabrication run yields CNTFET devices with varying gate distances, improving gate coupling up to 25 times to previous own studies. Devices with long gate distances (dg=1.84μm) show a 3.2-times improved signal to noise ratio (voltage shift upon gas adsorption over signal variation) when compared to short gate distance devices (dg=0.24μm).

Reliable high-yield CNTFET-based 9T SRAM operating near threshold voltage region

We propose a reliable high-yield nine-carbon-nanotube field-effect transistor (9-CNTFET) static random-access memory (SRAM) cell using shared bit line and half-select-free techniques. The proposed SRAM cell operates near the threshold voltage of 325 mV. The proposed cell was also tested and verified under process variation, exhibiting stable write and read operations. Due to the reduced leakage current of the proposed cell, the power consumption is significantly decreased by 4.98-fold compared with the conventional six-transistor (6T) cell. Although the use of a CNT array increases the probability of functionality of the CNTFET, it occupies 1 % more area. Due to its high $$I_{\mathrm{ON}}/I_{\mathrm{OFF}}$$ ratio, shortest node, shared bit line, and high-efficiency read and write ports, the read and write access time of the proposed nine-transistor (9T) SRAM cell is improved by 43 and 98 %, respectively, compared with the conventional 6T device. When using the low-feature-size CNTFET device in a new 9T SRAM cell, the area overhead is reduced to 32.9 % compared with previously published 9T SRAM cells. The proposed cell operates with minimum supply voltage near the threshold voltage region, reducing the read and write power consumption per bit by 1.2- and 1.8-fold, respectively, compared with existing 9T SRAM cells.

Field Effect Transistor Based on Solely Semiconducting Single‐Walled Carbon Nanotubes for the Detection of 2‐Chlorophenol

We report a promoted sensitivity to 2‐chlorophenol (2‐CP) molecules of a fabricated back gated, interdigitated electrode field effect transistor based on separated semiconducting single‐walled carbon nanotubes (CNTFET). The origin of the interaction between the nanotubes that serve as channels across the source and drain contacts and organic volatile compound is suggested due to peculiarities gained after the nanotube separation technique. The semiconducting nanotubes that were used for building‐up the CNTFETs had an average diameter of 1.4 nm and have been separated by the efficient aqueous two‐phase extraction technique. The advantage of the technique is in the one‐step extraction of semiconducting type of conductivity nanotubes with high yield. Chlorophenols are widely studied due to the toxicity and hazardous health effects depending on the exposure. Previously chlorophenols were reported to be not interacting with pristine nanotubes. As prepared CNTFET device demonstrates a detection limit below 100 parts per million for the 2‐CP molecules with a reaction time of 150 s. CNTFET devices have good repeatability, low bias stress, and electron charge carrier mobility of 17.5 ± 0.1 cm2 (Vs)−1. We discuss possible physical mechanisms of the 2‐CP adsorption induced current drop and potential ways to improve sensitivity.

Investigation of light doping and hetero gate dielectric carbon nanotube tunneling field-effect transistor for improved device and circuit-level performance

We perform a comparative study (both for device and circuit simulations) of three carbon nanotube tunneling field-effect transistor (CNT-TFET) designs: high-K gate dielectric TFETs (HK-TFETs), hetero gate dielectric TFETs (HTFETs) and a novel CNT-TFET-based combination of light doping and hetero gate dielectric TFETs (LD-HTFETs). At device level, the effects of channel and gate dielectric engineering on the switching and high-frequency characteristics for CNT-TFET have been theoretically investigated using a quantum kinetic model. This model is based on two-dimensional non-equilibrium Green’s functions solved self-consistently with Poisson’s equations. It is revealed that the proposed LD-HTFET structure can significantly reduce leakage current, enhance control ability of the gate on the channel, improve the switching speed, and is more suitable for use in low-power, high-frequency circuits. At circuit level, using HSPICE with look-up table-based Verilog-A models, the performance and reliability of CNT-TFET logic gate circuits is evaluated on the basis of power consumption, average delay, stability, energy consumption and power-delay product (PDP). Simulation results indicate that, compared to a traditional CNT-TFET-based circuit, the one based on LD-HTFET has a significantly better performance (static noise margin, energy, delay, PDP). It is also observed that our proposed design exhibits better robustness under different operational conditions by considering power supply voltage and temperature variations. Our results may be useful for designing and optimizing CNTFET devices and circuits.

Effect of Device Parameters on Carbon Nanotube Field Effect Transistor in Nanometer Regime

In this paper, we have analyzed the effect of chiral vector, temperature, metal work function, channel length and High-K dielectric on threshold voltage of CNTFET devices. We have also compared the effect of oxide thickness on gate capacitance and justified the advantage a CNTFET provides over MOSFET in nanometer regime. Simulation on HSPICE tool shows that high threshold voltage can be achieved at low chiral vector pair in CNTFET. It is also observed that the temperature has a negligible effect on threshold voltage of CNTFET. After that we have simulated and observed the effect of channel length variation on threshold voltage of CNTFET as well as MOSFET devices and given a theoretical analysis on it. We found an unusual, yet, favorable characteristics that the threshold voltage increases with decreasing channel length in CNTFET devices in deep nanometer regime.

Investigation of Hetero - Material - Gate in CNTFETs for Ultra Low Power Circuits

An extensive investigation of the influence of gate engineering on the CNTFET switching, high frequency and circuit level performance has been carried out. At device level, the effects of gate engineering on the switching and high frequency characteristics for CNTFET have been theoretically investigated by using a quantum kinetic model. It is revealed that hetero - material - gate CNTFET(HMG - CNTFET) structure can significantly reduce leakage current, enhance control ability of the gate on channel, and is more suitable for use in low power and high frequency circuits. At circuit level, using the HSPICE with look - up table(LUT) based Verilog - A models, the performance parameters of circuits have been calculated and the optimum combinations of Ф M1 /Ф M2 /Ф M3 have been concluded in terms of power consumption, average delay, stability, energy consumption and power - delay product(PDP). We show that, compared to a traditional CNTFET - based circuit, the one based on HMG - CNTFET has a significantly better performance (SNM, energy, PDP). In addition, results also illustrate that HMG - CNTFET circuits have a consistent trend in delay, power, and PDP with respect to the transistor size, indicating that gate engineering of CNTFETs is a promising technology. Our results may be useful for designing and optimizing CNTFET devices and circuits.

Analysis of different parameters of channel material and temperature on threshold voltage of CNTFET

Carbon nanotubes have some unique features and special properties that offer a great potential for nano-electronic devices. In this paper, we have analyzed the effect of chiral vector, metal work function, channel length and High-K dielectric on threshold voltage of CNTFET devices. We have also compared the effect of oxide thickness on gate capacitance and justified the advantage of CNTFET over MOSFET in nanometer regime. Simulation on HSPICE tool shows that high threshold voltage can be achieved at low chiral vector in CNTFET. It is also observed that the temperature has a negligible effect on threshold voltage of CNTFET. After that we have simulated and observed the effect of channel length variation on threshold voltage of CNTFET as well as of MOSFET devices and given a theoretical analysis on it. We found an unusual, yet, favorable characteristics that the threshold voltage increases with decreasing channel length in CNTFET devices in deep nanometer regime especially when the gate length is around 10nm; which is quite contrary to the well known short channel effects in MOSFET. It is observed that at or below 10nm channel length the threshold voltage increases rapidly in case of CNTFET device whereas in case of MOSFET device the threshold voltage decreases drastically.

Comparative study of leakage power in CNTFET over MOSFET device

A comparison of the CNTFET device with the MOSFET device in the nanometer regime is reported. The characteristics of both devices are observed as varying the oxide thickness. Thereafter, we have analyzed the effect of the chiral vector and the temperature on the threshold voltage of the CNTFET device. After simulation on the HSPICE tool, we observed that the high threshold voltage can be achieved at a low chiral vector pair. It is also observed that the effect of temperature on the threshold voltage of the CNTFET is negligibly small. After that, we have analyzed the channel length variation and their impact on the threshold voltage of the CNTFET as well as MOSFET devices. We found an anomalous effect from our simulation result that the threshold voltage increases with decreasing the channel length in CNTFET devices; this is contrary to the well known short channel effect. It is observed that at below the 10 nm channel length, the threshold voltage is increased rapidly in the case of the CNTFET device, whereas in the case of the MOSFET device, the threshold voltage decreases drastically.

Impact of Oxide Thickness on Gate Capacitance—A Comprehensive Analysis on MOSFET, Nanowire FET, and CNTFET Devices

Carbon nanotube-based FET devices are getting more and more importance today because of their high channel mobility and improved gate capacitance against gate voltage. This paper compares and analyzes the effect of variation of oxide thickness on gate capacitance for single gate MOSFET, double gate MOSFET, silicon nanowire FET, and CNTFET devices through an exhaustive simulation. It is seen that in nanometer regime quantum capacitance is the deciding factor in calculating the gate capacitance of a FET device. CNTFET and silicon nanowire FET have a favorable characteristics of decreasing gate capacitance with the decrease in oxide thickness in deep nanometer regime, which is not possible to get in a single gate or a double gate MOSFET. This decrease in gate capacitance is observed at a gate voltage of 0.5 V and above which leads to reduced propagation delay and lower leakage compared to MOSFET devices.