CMOS LC Voltage-controlled Oscillator Research Articles

An Ultra-Low-Power 65 nm Single-Tank 24.5-to-29.1 GHz Gm-Enhanced CMOS LC VCO Achieving 195.2 dBc/Hz FoM at 1 MHz

A low-power single-core 24.5-to-29.1 GHz CMOS LC voltage-controlled oscillator (VCO) is presented. The proposed VCO uses an innovative differential cross-coupled architecture in which an additional pair is connected to the main pair to increase the effective transconductance, resulting in lower power consumption and reduced phase noise (PN). The proposed VCO is fabricated in a 1P9M standard CMOS process and sustains oscillation at 29.14 GHz with power consumption as low as 455 μW (650 μA from a 0.7 V supply), which is ~20% lower than a conventional CMOS LC VCO without Gm-enhanced differential pairs built through the same process (700 μA from 0.8 V supply). When consuming 880 μW (1.1 mA from 0.8 V), the proposed VCO exhibits a tuning range of 4.6 GHz (from 24.5 GHz to 29.1 GHz). Moreover, it exhibits a measured phase noise (PN) better than −106.5 dBc/Hz @ 1 MHz and −132.0 dBc/Hz @ 10 MHz, with figure-of-merit (FoM) results of 195.2 dBc/Hz and 200.3 dBc/Hz, respectively.

A Transformational Framework for Analysis of Phase Noise in LC Oscillators

Phase noise has become the single most critical factor to be addressed in the design of modern communication systems. Facing the challenging requirements of 5G cellular communication, our paper describes a new theoretical framework to calculate the phase noise of LC oscillators, relying on easy to implement closed form solutions for phase noise calculations. Using closed form phase noise solutions enables oscillator designers to easily implement multiple phase noise calculation options for a number of oscillator circuits, which would be very difficult to implement with the existing mathematically complex phase noise theories. The analytic methods of our theory rely on modeling all real oscillators as having non-ideal or latent behaviors in addition to their primary nature for generating a carrier wave operating at a single frequency with a single amplitude. It is a cascade of these non-ideal transformation processes that produce non-ideal oscillator outputs containing the phase noise sidebands. Enhanced qualitative and quantitative insights into oscillator phase noise performances are achieved by using this approach. We validate our methods by comparing their results with phase noise simulations carried out for a sample CMOS LC voltage-controlled oscillator in 90 nm RFCMOS process using SpectreRF simulator. The results for the oscillator's output 1/f2 thermal phase noise, 1/f noise upconversion into 1/f3 phase noise and the 1/f3 corner frequency of phase noise spectrum using our theory yields −136 dBc/Hz at 10 MHz offset, −21.3 dBc/Hz at 1 kHz offset and 2.6 MHz respectively. The corresponding values obtained with SpectreRF simulation are −135.9 dBc/Hz, −23.4 dBc/Hz and 2.1 MHz. The carrier frequency is 5.4 GHz with output power of 9.78 dBm.

Design of optimal high-frequency CMOS VCOs for automotive application

In this paper, a design methodology of Voltage-Controlled Oscillator (VCO) for long-range automotive RAdio Detection And Ranging (RADAR) is proposed and simulation analysis is carried out over Virtuoso SpectreRF software on Cadence tool. The frequency ranges of the mm-wave CMOS current-starved ring and LC VCOs for 45-nm CMOS technology are 24 and 76 GHz, respectively. The ring VCO at 25 GHz oscillation frequency demonstrates 2.06% tuning range, phase noise −71.61 dBc/Hz at 1-MHz offset, 3.43 mW power dissipation and layout area of $$20\times 20 \,\upmu {\mathrm{m}}^2$$ whereas cross-coupled LC VCO achieves an oscillation frequency of 76.25 GHz for frequency tuning range of 0.65%, a phase noise of −92.44 dBc/Hz at 1-MHz offset, 8.59 mW power dissipation and $$320\times 320 \,\upmu {\mathrm{m}}^2$$ layout area. The proposed design of efficient VCOs shows an excellent performance for long-range automotive RADAR.

Design Methodology of Ultra-Low-Power LC-VCOs for IoT Applications

A design methodology of CMOS LC voltage-controlled oscillator (VCO) is proposed in this paper. The relation between components and specifications of the LC-VCO is studied to easily identify its design trade-offs. This methodology has been applied to design ultra-low-power LC-VCOs for different frequency bands. An LC-VCO based on the current reuse technique has been realized with the proposed methodology in 0.13[Formula: see text][Formula: see text]m CMOS process. Measurements present an ultra-low power consumption of only 262[Formula: see text][Formula: see text]W drawn from 1[Formula: see text]V supply voltage. The measured frequency tuning range is about 10% between 2.179[Formula: see text]GHz and 2.409[Formula: see text]GHz. The post-layout simulation presents a phase noise (PN) of [Formula: see text][Formula: see text]dBc/Hz, while the measured PN is [Formula: see text][Formula: see text]dBc/Hz.

A 0.7 V 6.66–9.36 GHz wide tuning range CMOS LC VCO with small chip size

ABSTRACTThe circuit designs are based on TSMC 0.18 μm CMOS standard technology model. The designed circuit uses transformer coupling technology in order to decrease chip area and increase the Q value. The switched-capacitor topology array enables the voltage-controlled oscillator (VCO) to be tuned between 6.66 and 9.36 GHz with 4.9 mW power consumption at supply voltage of 0.7 V, and the tuning range of the circuit can reach 33.7%. The measured phase noise is −110.5 dBc/Hz at 1 MHz offset from the carrier frequency of 7.113 GHz. The output power level is about −1.22 dBm. The figure-of-merit and figure-of-merit-with-tuning range of the VCO are about −180.7 and −191.25 dBc/Hz, respectively. The chip area is 0.429 mm2 excluding the pads. The presented ultra-wideband VCO leads to a better performance in terms of power consumption, tuning range, chip size and output power level for low supply voltage.

High-Performance Low-Cost Dual 15 GHz/30 GHz CMOS LC Voltage-Controlled Oscillator

A CMOS LC voltage-controlled oscillator (VCO) capable of covering both the Ku and Ka bands is presented. The Ku-band frequency source is generated from a low-noise cross-coupled LC VCO. A PMOS push-push frequency doubler, together with the inductor of the low-band LC VCO, is adopted to boost the low Ku-band toward high Ka-band. This proposed VCO is implemented in a standard 0.18 $\mu\text{m}$ CMOS with 1.35 V supply voltage. The dual-band VCO consumes a small active area of 0.49 mm $\times$ 0.2 mm and low DC power of 3 mW at both bands. At 1 MHz (10 MHz) offset, the measured output phase noises are −109.30 dBc/Hz (−130.54 dBc/Hz) at 15.126 GHz and −102.33 dBc/Hz (−124.10 dBc/Hz) at 30.251 GHz.

Design of low power CMOS LC VCO for direct conversion transceiver

A low power 1.2 GHz LC differential voltage-controll ed oscillator (VCO) is designed for a direct conversion transceiver in 130 nm CMOS processes. It consists of a complementary current reuse structure and LC tank circuit. To produce a good tuning range and reduce losses in the tank circuit, modied inversion mode PMOS varactors and an on-chip inductor are designed with a better quality factor. The icker noise is reduced by the PMOS tail current source connected in parallel with the capacitance. The 1.2 GHz LC VCO achieves a phase noise value of {132 dBc/Hz at 1 MHz offset and the tuning range of the oscillator is from 1.128 to 1.27 GHz for the control voltage, tuning from 0 to 1.5 V. It dissipates 245 W power at 0.8 V supply voltage and thegure of merit is calculated as {199.7 dBc/Hz.

Impact of technology scaling on the tuning range and phase noise of mm-wave CMOS LC-VCOs

The impact of CMOS technology scaling, on the tuning range and phase noise performance of mm-wave LC voltage controlled oscillators (LC-VCOs) is presented. As a preliminary step, the fundamental LC-VCO elements (i) tank inductor, (ii) fixed and variable capacitor elements, and (iii) cross-coupled transistor pair are analytically modeled across the frequency range 10–50GHz. These models are then exploited to analyze the tuning range and phase noise revealing the ultimate performance bounds for simultaneously achieving low phase noise and wide tuning range in mm-wave CMOS LC-VCOs across the CMOS technology scaling (from 130nm down to 45nm) are explored. The analysis demonstrates the improvement of the maximum achievable tuning range, phase noise, and figures-of-merit (FoM and FoMT) with the technology down scaling. Finally, the performance trend of the mm-wave CMOS LC-VCOs implemented using both thin and thick gate cross-coupled pair is compared. The analysis indicates that thick gate cross-coupled pair VCOs achieve better phase noise at the expense of power consumption and maximum tuning range.

A 3.01–3.82 GHz CMOS LC voltage-controlled oscillator with 6.29% VCO-gain variation for WLAN applications

A wideband low-phase-noise LC voltage-controlled oscillator (VCO) with low VCO gain (KVCO) variation for WLAN fractional-N frequency synthesizer application is proposed and designed on a 0.13-μm CMOS process. In order to achieve a low KVCO variation, an extra switched varactor array was added to the LC tank with the conventional switched capacitor array. Based on the proposed switched varactor array compensation technique, the measured KVCO is 43 MHz/V with only 6.29% variation across the entire tuning range. The proposed VCO provides a tuning range of 23.7% from 3.01 to 3.82 GHz, while consuming 9 mA of quiescent current from a 2.3 V supply. The VCO shows a low phase noise of −121.94 dBc/Hz at 1 MHz offset, from the 3.6 GHz carrier.

A Low-Voltage and Low-Power 3-GHz CMOS LC VCO for S-Band Wireless Applications

A fully integrated 0.18- $$\upmu \hbox {m}$$ μ m CMOS LC-tank voltage-controlled oscillator (VCO) suitable for low-voltage and low-power S-band wireless applications is proposed in this paper. In order to meet the requirement of low voltage applications, a differential configuration with two cross-coupled pairs by adopting admittance-transforming technique is employed. By using forward-body-biased metal oxide semiconductor field effect transistors, the proposed VCO can operate at 0.4 V supply voltage. Despite the low power supply near threshold voltage, the VCO achieves wide tuning range by using a voltage-boosting circuit and the standard mode PMOS varactors in the proposed oscillator architecture. The simulation results show that the proposed VCO achieves phase noise of $$-$$ - 120.1 dBc/Hz at 1 MHz offset and 39.3 % tuning range while consuming only $$594~\upmu \hbox {W}$$ 594 μ W in 0.4 V supply. Figure-of-merit with tuning range of the proposed VCO is $$-$$ - 192.1 dB at 3 GHz.

Design of Sub-1 mW CMOS LC VCO based on current reused topology with Q-enhancement and body-biased technique

A CMOS LC voltage controlled oscillator (VCO) based on current reused topology with low phase noise and low power consumption is presented for IEEE 802.11a (Seller et al. A 10GHz distributed voltage controlled oscillator for WLAN application in a VLSI 65nm CMOS process, in: IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, 3–5 June, 2007, pp. 115–118.) application. The chip1 is designed with the tail current-shaping technique to obtain the phase noise −116.1dBc/Hz and power consumption 3.71mW at the operating frequency 5.2GHz under supply voltage 1.4V. The second chip of proposed VCO can achieve power consumption Sub 1mW and is still able to maintain good phase noise. The current reused and body-biased architecture can reduce power consumption, and better phase noise performance is obtained through raising the Q value. The measurement result of the VCO oscillation frequency range is from 5.082GHz to 5.958GHz with tuning range of 15.8%. The measured phase noise is −115.88dBc/Hz at 1MHz offset at the operation frequency of 5.815GHz. and the dc core current consumption is 0.71mA at a supply voltage of 1.4V. Its figure of merit (FOM) is −191dBc/Hz. Two circuits were taped out by TSMC 0.18μm 1P6M process.

Design of 5 GHz low-power CMOS LC VCO based on complementary cross-coupled topology with modified tail current-shaping technique

In this paper, a low-power CMOS LC voltage-controlled oscillator (VCO) with body-biasing and low-phase noise with Q-enhancement techniques is presented. A self-body biased circuit is introduced that can reduce power consumption. Some derivations of the Q-enhancement and how to improve the phase noise of the circuit are also discussed. This chip is implemented by the Taiwan Semiconductor Manufacture Company 0.18 µm 1P6M process. The measurement results exhibit a tuning range of 14.7% from 4.92 to 5.7 GHz at a supply voltage of 1.4 V. The power consumption of the core circuit and figure of merit are 2.5 mW and −188.6 dBc/Hz. The phase noise is −118 dBc/Hz@1 MHz at an operation frequency of 4.94 GHz.

Design of 5‐GHz CMOS LC VCO with dual tuning circuit

ABSTRACTIn this article, a linear tuning range, low power, and low phase noise of CMOS voltage controlled oscillator (VCO) is presented. The core circuit of VCO is adopted dual‐tuning LC resonator with two transformer coupling structure. The bandwidth of the frequency range is from 4.85 to 5.84 GHz with a 18.5% tuning ratio by two tuning voltages. The phase noise of the proposed VCO is −119.3 dBc/Hz at 1 MHz offset frequency. The power consumption is 5.2 mW from 1 V supply and the KVCO exhibits the linearity with 240 MHz/V. © 2014 Wiley Periodicals, Inc. Microwave Opt Technol Lett 56:1356–1360, 2014

A VERY LOW NOISE WIDEBAND CLASS-C CMOS LC VCO

In this paper, a new class-C voltage-controlled oscillator (VCO) is presented. In the proposed VCO, the tail capacitor of the conventional class-C oscillator is dislocated from the source of the cross-coupled transistors to their gate to achieve a rail-to-rail output swing. This improves the phase noise by 2.9 dB compared to the conventional class-C one. Besides, a new switching scheme is presented in the switched capacitor bank used for coarse tuning of the proposed VCO to lower the on resistance of the switches as well as to reduce the parasitic capacitors. This wide tuning range class-C VCO is designed in a 0.18 μm CMOS technology. It achieves a -125.3 dBc/Hz phase noise at 1 MHz offset from a 2.2 GHz carrier frequency while covering a wide tuning range from 1.82 to 2.65 GHz and consuming 3.5 mW power from a single 0.9 V power supply.

Reliability analysis of MOS varactor in CMOS LC VCO

The paper investigates the reliability of MOS varactor tuned voltage-controlled oscillators (VCO). Due to the stress induced threshold voltage shift of the MOS varactor, the resonant tank degrades and the center frequency and phase noise of VCO deviate. The behavior is modeled and an adaptive body biasing scheme is proposed to make VCO resilient to reliability. In the mean time it does not degrade the VCO performance. An LC VCO at 24GHz carrier frequency with adaptive body biasing is compared with VCO without such biasing design in PTM 65nm technology. The ADS simulation results show that the biasing design helps improve the robustness of the VCO in resonant frequency. The design reduces the frequency sensitivity of VCO by 20% when subjected to threshold voltage degradation.

A 2.4 GHz high-linearity low-phase-noise CMOS LC-VCO based on capacitance compensation

A 2.4 GHz high-linearity low-phase-noise cross-coupled CMOS LC voltage-controlled oscillator (VCO) is implemented in standard 0.18-μm CMOS technology. An equalization structure for tuning sensitivity base on the three-stage distributed biased switched-varactor bank and the differential switched-capacitor bank is adopted to reduce the variations of the VCO gain, achieve high linearity, and optimize the phase-noise performance. Compared to the conventional VCO, the proposed VCO has more constant gain over the entire tuning range. The tuning range is about 18.7% from 2.23 to 2.69 GHz, and the phase noise is −95 dBc/Hz at 100-kHz offset and −117 dBc/Hz at 1-MHz offset from the carrier frequency of 2.42 GHz. The power dissipation is 2.1 mW from a 1.8 V power supply. The active area of this VCO is 500 × 810 μm2.

Low Voltage CMOS LC VCO with Switched Self-Biasing

This paper presents a switched self-biasing and a tail current-shaping technique to suppress the 1/f noise from a tail current source in differential cross-coupled inductance-capacitance (LC) voltage-controlled oscillators (VCOs). The proposed LC VCO has an amplitude control characteristic due to the creation of negative feedback for the oscillation waveform amplitude. It is fabricated using a 0.13 μm CMOS process. The measured phase noise is -117 dBc/Hz at a 1 MHz offset from a 4.85 GHz carrier frequency, while it draws 6.5 mA from a 0.6 V supply voltage. For frequency tuning, process variation, and temperature change, the amplitude change rate of the oscillation waveform in the proposed VCO is 2.1 to 3.2 times smaller than that of an existing VCO with a fixed bias. The measured amplitude change rate of the oscillation waveform for frequency tuning from 4.55 GHz to 5.04 GHz is 131 pV/Hz.

The 5.8‐GHz fully integrated low‐power low‐phase‐noise CMOS LC VCOs using RC noise‐filtering technique

AbstractIn this work, two 5.8‐GHz fully integrated LC differential voltage‐controlled oscillators (VCOs) using standard 0.18 μm CMOS technology were implemented. One of them adopted a standard differential inductor (STD VCO). The other (PPGS VCO) comprised the same layout except that PPGS (poly‐silicon partial pattern‐ground‐shields) was added beneath its differential inductor for Q‐factor enhancement. Low‐power consumption was achieved by maximizing the equivalent parallel resistance (RP) of the LC tank by layout optimization. In addition, low‐phase noise was achieved mainly by adding two parallel capacitors to the cross‐coupled transistors and a resistor (Rfilter) to the biasing transistor for suppressing the noise coming from the current source. The STD VCO achieved a wide‐tuning‐range of 10.3% (from 5.26 GHz to 5.802 GHz) with a low‐power dissipation of 3.02 mW. The measured phase noise was −118.25 dBc/Hz at 1‐MHz offset. The corresponding figure‐of‐merit (FOM) was −188.72 dBc/Hz, better than those of the reported state‐of‐the‐art CMOS LC VCOs in 5‐GHz‐band. The chip area was only 508 × 595 μm2 excluding the test pads. © 2008 Wiley Periodicals, Inc. Microwave Opt Technol Lett 50: 2907–29117, 2008; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.23859

A 5‐GHz fully integrated low‐power wide‐tuning‐range CMOS LC VCO

AbstractA 5‐GHz‐band monolithic LC differential voltage‐controlled oscillator (VCO) with low‐power consumption and wide‐tuning‐range was designed and implemented using a standard 0.18‐μm CMOS technology. Low‐power consumption is achieved by maximizing the equivalent parallel resistance of the LC tank, while wide‐tuning‐range is achieved by minimizing the summed parasitic capacitance of the differential inductor and the cross‐coupled PMOS transistors pair. The LC VCO achieves a wide‐tuning‐range of 14.1% (from 4.95 to 5.7 GHz) with a low‐power dissipation of 1.5 mW. The measured phase noise is −111.1 dBc/Hz at 1‐MHz offset. The corresponding figure‐of‐merit (FOM′) of the VCO is −166.8 dBc/Hz, which is comparable with, or even better than, those of the reported state‐of‐the‐art CMOS LC VCOs in 5‐GHz‐band. The chip area is only 630 × 730 μm2 excluding the test pads. © 2008 Wiley Periodicals, Inc. Microwave Opt Technol Lett 50: 2320–2332, 2008; Published online in Wiley InterScience (www.interscience.wiley.com).DOI 10.1002/mop.23638

A Wide-Band CMOS LC VCO With Linearized Coarse Tuning Characteristics

A pseudo-exponential capacitor bank structure is proposed to implement a wide-band CMOS LC voltage-controlled oscillator (VCO) with linearized coarse tuning characteristics. An octave bandwidth VCO employing the proposed 6-bit pseudo-exponential capacitor bank structure has been realized in 0.18-mum CMOS. Compared to a conventional VCO employing a binary weighted capacitor bank, the proposed VCO has considerably reduced the variations of the VCO gain (K VCO) and the frequency step per a capacitor bank code (f step/code) by 2.7 and 2.1 times, respectively, across the tuning range of 924-1850 MHz. Measurement results have also shown that the VCO provides the phase noise of - 127.1 dBc/Hz at 1-MHz offset for 1.752-GHz output frequency while dissipating 6 mA from a 1.8-V supply.