CMOS Integrated Circuit Technology Research Articles

High-Precision and Resilient-to-Interference Ultrawideband Two-Way-Ranging Based on Clock-Less Active Reflector in 65-nm CMOS

An impulse-radio ultrawideband (IR-UWB) two-way ranging (TWR) system for indoor and harsh environments is described. In the proposed system, a synchronization (sync) word with a specific sequence of UWB impulses and with a particular pulse-position modulation (PPM) is transmitted from the anchor and then detected by the tag using a continuous-time sync detection mechanism. Then, the tag instantaneously reflects a similar sync-word back to the anchor. Finally, the anchor detects the sync-word using the same continuous-time sync detection mechanism as the tag. The time of flight (ToF) between the transmitted sync and the received sync on the anchor is then calculated to measure the distance between the transmitter and the receiver. Unlike common TWR systems, here in the tag, a clock-less active reflector is used, which reduces sync detection and reply time and, hence, increases the ranging accuracy due to the mitigation of clock drift. To reduce narrowband interference (NBI) and multiuser interference (MUI), the sync-word uses a combination of ON–OFF keying (OOK) and PPM. The proposed sync-word detector continuously verifies the presence of UWB impulses having the correct time intervals. As a proof of concept, a 4-bit sync-word is utilized although the technique can be directly expanded to longer sync-words. The proposed system is fabricated using a 65-nm CMOS integrated circuit technology. Experimental results show the accuracy and resilience-to-interference (NBI and MUI) of the proposed TWR. The technique shows a 1.2-cm standard deviation for the accuracy of a single-measurement TWR in a semiclosed metal box using omnidirectional antennas.

Carbon-based CMOS integrated circuit technology: development status and future challenges

<p indent="0mm">Carbon nanotubes, with their unique electrical performance, quasi-one-dimensional size and stable structure, hold great prospect to be the most ideal semiconductor material in post-Moore era. Significant process has been made in carbon-based electronics. High semiconductor purity (better than 99.9999%) and high density (100~200 CNTs/μm) arrays of CNTs can be obtained on 4-inch wafer. The gate length of CNFET can be scaled down to <sc>5 nm</sc> with better performance than that of Si-FET. And the first carbon-based modern microprocessor, RV16X-NANO, has come out. This paper reviews the development of carbon nanotubes in materials, devices and integrated circuits, as well as their potential applications in some fields such as optoelectronics, sensor, display and radio frequency. Furthermore, this paper lists a series of challenges faced by carbon-based CMOS integrated circuits to realize continuous development and industrialization, and makes a further prospect for the development of carbon-based technology.

Design for high-quality factor of piezoelectric-on-silicon MEMS resonators using resonant plate shape and phononic crystals

Piezoelectric-on-silicon MEMS resonator is very well known for its compatibility with CMOS integrated circuit technology. However, its quality factor (Q) is highly affected by acoustic energy loss through the supporting structures. In this study, a resonator with butterfly-like round edge resonating plate structure and deploying properly designed PnC arrays on the tether and the anchoring boundaries are proposed to scale up the quality factor by effectively reducing the energy loss. The finite element analysis simulation results reveal that the proposed topologies can efficiently change the displacement field in the resonating plate and reduce the anchor loss. Consequently, an unloaded quality factor of the conventional resonator is raised from 29 899 to 51 503 (butterfly-like round edge resonating structure), 83 349 (Phononic crystal on the tether) and 83 899 (Phononic crystal on the anchor), representing 1.7 folds, 2.78 folds and 2.8 folds improvement respectively.

Chip-Scale Terahertz Carbonyl Sulfide Clock: An Overview and Recent Studies on Long-Term Frequency Stability of OCS Transitions

This paper reviews the recent innovations of a miniature time-keeping device with high affordability: chip-scale molecular clock. It is based on the recent research progress of high-precision terahertz (THz) rotational spectrometers, especially those using CMOS integrated circuit technologies. The clock probes the rotational modes of carbonyl sulfide ( <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">16</sup> O <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">12</sup> C <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">32</sup> S) molecule gas and then calibrates its MHz output according to the measured terahertz transition frequency of OCS. In contrast to cesium/rubidium atomic clocks, the THz OCS clock has fully electronic operations and, hence, a significantly simplified implementation. In particular, it is realizable on a waveguide-attached CMOS chip, which minimizes the form factor and cost. Based on a lab scale prototype with an Allan deviation in the 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-11</sup> range, this paper for the first time studies two critical metrics related to the long-term stability of THz OCS clocks. These metrics are the clock sensitivities to temperature change of the OCS gas and external magnetic field. The measured average temperature coefficient of the clock, without ovenized temperature stabilization and temperature compensation, is 9.5 × 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-11</sup> /°C in the range of 28 °C-70 °C. Next, the measured clock shift in response to a 75 G external magnetic field is <;4 × 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-11</sup> , with a theoretical value near 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-13</sup> . Lastly, this paper also reviews the first reported CMOS prototype of the clock, which consumes only 66 mW dc power and achieves an Allan deviation of 3.8 × 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-10</sup> (τ = 1000 s). Approaches for performance improvements and potential monolithic chip implementation are discussed. These studies present the feasibility of a CMOS-based magnetic-shield/heater-free clock with high energy efficiency and sub-ppb stability over a wide range of operation condition.

High-Q and Wide-Bandwidth Capacitor Multiplier Optimized by NSGA-II

ABSTRACTPower management applications require the use of large value on-chip capacitors that can be implemented by active circuits scaling the value of a physical capacitor. However, a good capacitor scaler must provide the best frequency response and high quality factor (Q), accompanied by the minimum power consumption and silicon area. In this manner, a new C-multiplier topology is introduced herein, designed by using 180 nm CMOS integrated circuit technology, and optimized by applying the Non-Dominated Sorting Genetic Algorithm II (NSGA-II). Spice is linked to NSGA-II to evaluate electrical characteristics, while Q and the quiescent current (IQ) were selected as the optimization objectives. The feasible solutions are given in a Pareto front, from which we selected the one providing the best frequency response with a multiplication factor (MF) = 1001 and Q = 278, and consuming 93 μA of static current. Finally, we show that the optimized C-multiplier achieves class AB performance and fits the passive model of a real capacitor very accurately in a wide range of frequencies.

Hardware/Software Complex for Electrophysical Management of CMOS Technology on Test Structures

A combined procedural and hardware complex of electrophysical methods for management of submicrometric CMOS integrated circuit technology is developed and implemented. Programmable switching of the elements of the complex that makes it possible to utilize a mutually complementary measurement technique to obtain information needed to correct the production process is created. The complex includes programs to control the measurement and calculation of required characteristics.

A monolithically integrated CMOS labchip using sensor devices

A new concept for a monolithic labchip platform to combine standard CMOS-integrated circuit technology and novel solid-state components is presented. The capability to perform laboratory analysis operations on small-scale labchip devices holds exceptional advantages compared to commonly used diagnostic instrumentation. The objective is to improve cost-efficiency, performance and functionality of chemical or biological systems on-a-chip by increasing the level of integration and miniaturization. The integration of hydrogenated amorphous silicon color sensors enables a novel combinatoric labchip-based chemical verification method in a specifically arranged microarray of capillaries and sensors. To test the labchip functionality, results about an electrophoretic separation as well as a pH-sensitive luminescent sensor complex are shown.

The Effect of Single-Sensor CFA Captures on Images Intended for Motion Picture and TV Applications

Current digital cinema camera designs employ a variety of sensor architectures based on CCD and CMOS integrated circuit technologies, with either separate sensors for each color channel or a single sensor with a color filter array. Some of the sensor solutions that have proven robust for consumer still photography may fail to meet expectations at the higher system magnifications and greater viewing angles encountered in motion picture applications. This paper compares the desirable attributes and unwanted artifacts that are generated by various single-sensor and multiple-sensor camera designs. To illustrate the key tradeoffs in system design, the resolution, sharpness, aliasing, reconstruction errors, color filter array (CFA) artifacts, sensitivity (speed), and dynamic range that are associated with current designs are quantified. Mitigation strategies that can improve overall image quality are also examined.

Design of a CMOS Compatible CFOA and its Application in Analog Filtering

It is presented the design of a current-feedback operational amplifier (CFOA) which is suitable for implementation with standard CMOS integratedcircuit technology of 0.35µm. The characteristics of the CFOA are derived by using biases of ±2.5V and Ibias=20µA. The usefulness of the CFOA is demonstrated by designing mixed-mode biquads which realize the low-pass, high-pass, band-pass, notch and all-pass filter functions. As a result, it is highlighted that the SPICE simulations of the biquad working in voltage-mode are in good agreement with the biquad working in current-mode.

Modeling and simulation of a chaotic oscillator by MATLAB

A MATLAB-based system is presented to model and simulate a chaotic oscillator. Chua’s circuit is selected to describe the chaos phenomenon. Furthermore, the nonlinear resistor (Chua’s diode) is modeled by an I-V piecewise-linear characteristic whose current and voltage ranges can be varied by the user. It is shown how to generate a sequence of chaotic behaviors by varying the value of a linear resistor. The simulation results can be plotted in a 2D and 3D graphs. Finally, it is described the synthesis of the chaotic oscillator by using standard CMOS integrated-circuit technology.

Designing Chua’s circuit from the behavioral to the transistor level of abstraction

A MATLAB program is presented to design Chua’s circuit by applying state-variables at the behavioral level of abstraction. The user can interact with the program to calculate state trajectories by modifying the values of five circuit-elements: a resistor, two capacitors, an inductor and a nonlinear resistor, i.e. Chua’s diode (N R). N R is modeled by a piecewise-linear i– v characteristic which is synthesized further by analog building blocks at the transistor level of abstraction. Finally, Chua’s circuit is simulated by using SPICE and standard CMOS integrated-circuit technology, whose results are in good agreement with MATLAB.

Moore's law lives on [CMOS transistors

We discuss several device structures suitable for scaling CMOS devices well into the nano-CMOS era, perhaps down below 10 nm physical gate length. The ultra-thin body MOSFET device structure has many features in common with today's bulk MOSFET, which makes it easier for industry to introduce into manufacturing. On the other hand, the double-gate structure as represented by the FinFET appears to offer greater scalability down to 10 nm gate length or perhaps even below. While a number of significant challenges remain to be overcome, including device parasitics, interfaces, and threshold voltage control techniques, it appears that the continued evolution of CMOS integrated circuit technology into this regime will not be impeded by basic limitations of the underlying transistor technology. The implication of this is that Moore's law may continue for yet another 15-20 years before the ultimate device limits for CMOS are reached.

Photosensor and optical waveguide coupling in silicon technology

ARROW-type optical waveguides are designed for implementation on silicon using the materials (silicon dioxide and silicon nitride) and techniques (CVD, RIE) of CMOS integrated-circuit technology. Light is detected by a photodiode buried in the silicon substrate, which is made following the same process. The steps of this process are described and their influence on the optical properties of the guides is analysed. The optical signal attenuation in the waveguide-photodiode coupling region and the cut-off frequency of the system are measured in test devices. The advantages of the technological compatibility with CMOS circuits are discussed.

Future of IC microtransducers

IC microtransducers are sensors or actuators based on industrial CMOS or bipolar integrated circuit (IC) technology combined with additional bulk or surface micromachining, thin-film deposition or electroplating. IC microtransducers including on-chip bias and signal-conditioning circuitry are essential building blocks for integrated microelectromechanical systems (iMEMS). The state of IC microtransducers is illustrated by recent microsystem prototypes for magnetic angular measurement, magnetic field detection, thermoelectric infrared intrusion detection, thermoelectric conversion of electric power, thermal vacuum and flow measurement, building control, acoustic proximity sensing and ultraviolet flame detection. IC microtransducer development is supported by the design tools SOLIDIS and ICMAT. SOLIDIS is a simulation toolbox for coupled numerical modelling of electrical, magnetic, thermal and mechanical effects. ICMAT is a data base of material parameters obtained from measuring process-dependent electrical, magnetic, thermal and mechanical properties of CMOS layers using dedicated characterization structures.

Sol-gel derived ferroelectric thin films in silicon micromachining

Abstract Ferroelectric thin films have been integrated with silicon micromechanical structures in the fabrication of microsensor and microactuator structures. Both the piezoelectric and pyroelectric effects in thin films of lead zirconate titanate (Pb(ZrxTi1_x)O3) and lead titanate (PbTiO3) have been used for physical force sensing (pressure sensor), thermal heat sensing (pyroelectric infrared detector) and microactuation (mechanical positioner). Solid-state micromachining is used to form mechanical membranes on a silicon wafer for implementing easily deformable membranes or structures with a low thermal mass. This paper demonstrates the compatible simultaneous integration of 1) sol-gel deposited ferroelectric thin films, 2) surface-machined micromechanical structures and 3) n-well CMOS integrated circuit technologies.

Current-mode oscillator realisation using a voltage-to-current transducer in CMOS technology

A voltage-to-current transducer implementable in CMOS integrated circuit technology is described. Admittance parameter formulation reveals the potential for implementation of an inductor using the gyrator concept. The inductor is applied to build a current-mode oscillator. Simulation results are provided.

A CMOS IC nonlinear resistor for Chua's circuit

The first monolithic realization of the nonlinear element in Chua's circuit, now generally called Chua's diode, is reported. The element has been fabricated using a CMOS integrated circuit technology. It can be used as the basic nonlinear component for the experimental synthesis of a broad class of circuits, including cellular neural networks, which exhibits an extremely rich variety of bifurcation, chaotic, and nonlinear wave phenomena. >

Detecting the audible alarm of residual smoke detectors and its applications

A novel digital signal detection technology has been implemented in low-power, low-cost large-scale CMOS integrated circuit technology. Standby power for this spatial dual-diversity two channel receiver is less than 10 microamperes at three volts, permitting the receiver to be battery-powered for over one year by a set of standard alkaline flashlight batteries. This signal processing technology is downward compatible with most of the tens of millions of smoke detectors already installed and operational in residences worldwide, and upward compatible with battery powered smoke detectors now being marketed and sold throughout the US and the world.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Diffused resistors characteristics at high current density levels-analysis and applications

Both heavily (source-drain) and lightly (well) doped diffused resistors used in modern CMOS integrated-circuit technologies are studied under high current density levels. The effects of high-field mobility degradation, space-charge limited-current, and charge-depletion narrowing (pinchoff) are discussed, and the related analytical solutions are derived and characterized. The applicability of the study to electrostatic discharge (ESD) protection networks, latchup protection circuitry, and output noise suppression resistors is addressed. Velocity saturation due to mobility degradation is found to be the prevailing mechanism, while space-charge limiting current and depletion narrowing have only limited effect on the lightly doped ones. The resulting saturation current densities allow proper resistor designs which can effectively limit ESD and latchup current into highly susceptible nodes and thus-improve overall circuit reliability, potential suppression of I/O switching noise is also discussed and shown to be more sensitive to the ratio between peak noise and steady-state currents. The experimental data confirm the theoretically predicted saturation velocity and critical field for the lightly doped case but show substantial discrepancy for the heavily doped layer. >

8504984 CMOS integrated circuit technology: Steven James Hillenius, Louis Carl Parrillo assigned to American Telephone & Telegraph Company

8504984 CMOS integrated circuit technology: Steven James Hillenius, Louis Carl Parrillo assigned to American Telephone & Telegraph Company