CMOS Compatible Technology Research Articles

Photonic bandgap crystal resonator enhanced, laser controlled modulations of optical interconnects for photonic integrated circuits

Ultrafast high-density photonic integrated circuit devices (PICDs) are not easily obtained using traditional index-guiding mechanisms. In this paper, photonic bandgap crystal resonator enhanced, laser-controlled modulations of optical interconnect PICDs were achieved in slab-type mix-guiding configuration - through developed CMOS-compatible processing technologies. The devices, with smallest critical dimensions of 90 nm have footprints of less than 5 x 5 microm(2). Quality-factors an order larger than previously realized was achieved. Through use of effective coupling structures; simultaneous alignment for probing and pumping laser beams, optical measurements of both instantaneous free carriers induced device modulations were obtained together with thermo-optical effects characterizations.

Silicon nanowire sensor array using top–down CMOS technology

The paper elaborates the silicon nanowire (SiNW) arrays fabrication using standard CMOS compatible technologies (top–down) with each array consisting of 100 wires, which are individually electrically measurable for their conductance and facilitating statistical analysis. To facilitate real-time analysis, the arrays are integrated with micro-fluidics for the delivery of various chemicals for surface modification, buffer solutions, bio-molecules/analytes, etc. The silicon nanowires are also presented as nano-temperature sensors in two configurations, i.e. as resistance temperature detector (RTD) and diode temperature detector (DTD) types. RTD type sensors have shown temperature coefficient of resistance (TCR) values ∼7500ppm/K which are enhanced beyond 10,000ppm/K by the application of back-bias. DTD type sensors using nanowires have recorded more than one order variation in reverse-bias current, in the temperature range of 293–373K. Both the types of nano-temperature sensors are highly sensitive and can be integrated with other bio-chemical sensors in lab-on-chip devices. Nanowire array fabrication details in particular as nano-temperature sensor are elaborated here along with their characterization.

A CMOS-compatible, magnetically actuated resonator for mass sensing applications

The characterization of a microresonator fabricated in a standard, CMOS-compatible technology, is presented. The device is a silicon dioxide plate, suspended to two torsional springs. A first metal loop integrated on the plate, in conjunction with an external magnet, is used to drive the plate into mechanical resonance, while a second loop is used for detection. The resonator can be used as an integrated microbalance: a shift of its resonance frequency can be related to the adsorption, on the preventively functionalised plate, of a specific chemical or biochemical species. The performances of the device as a resonator, i.e. its resonance frequency, quality factor and its frequency response were extracted both with optical and electrical methods.

Guided-Wave Optical Biosensors

Guided-wave optical biosensors are reviewed in this paper. Advantages related to optical technologies are presented and integrated architectures are investigated in detail. Main classes of bio receptors and the most attractive optical transduction mechanisms are discussed. The possibility to use Mach-Zehnder and Young interferometers, microdisk and microring resonators, surface plasmon resonance, hollow and antiresonant waveguides, and Bragg gratings to realize very sensitive and selective, ultra-compact and fast biosensors is discussed. Finally, CMOS-compatible technologies are proved to be the most attractive for fabrication of guided-wave photonic biosensors.

Low-Creep Metallic Thin Films and Reflective Coatings for Optical Microsystems

The large-scale integration of analog operable MEMS micromirrors onto active CMOS address circuitry involves several challenges. Mirror actuators must be fabricated using CMOS compatible technology, exhibit highly reflecting planar optical surfaces, and stable analog deflection-voltage characteristics not compromised by drift or creep effects. CMOS integration imposes strict limits depending on the range of available materials and the restricted temperature budget. Highly elastic materials such as single-crystalline Si or poly-SiGe have been integrated by layer transfer bonding or PECVD deposition, respectively. In this paper, a novel approach, i.e., the low-temperature monolithic integration of creep-resistant all-sputtered glassy TiAl mirror actuators with Al reflective coating is presented.

3D arrays of SERS substrate for ultrasensitive molecular detection

Systematically arranged arrays of nanostructures were realized using CMOS compatible silicon technologies. The ordered arrays of nanostructures were formed using DUV photolithography, reactive ion etching and physical vapour deposition of silver. By varying the lithography dosage, arrays having different distance of closest approach between adjacent nanostructures are created. The nanostructures also have sharp edges to bring about a further enhancement to the local electromagnetic field. In comparison with other methods of preparing SERS substrate, our method provides advantages of high uniformity and high sample throughput. The Raman spectrum of Rhodamine 6G (R6G) molecules is characterized on our substrates. The substrates with the smaller distance between adjacent nanostructures show the greater enhancement. R6G with concentration up to 1 μM was detected using SERS substrates fabricated.

Micromachined 22 GHz PI filter by CMOS compatible ICP deep trench technology

A K-band second-order bandpass filter with planar inductive pi-network using CMOS technology is demonstrated for the first time. To reduce the substrate loss of the filter, the CMOS process compatible backside inductively-coupled-plasma (ICP) deep trench technology is used to selectively remove the silicon underneath the filter. After the ICP etching, a 55.5-92.2% improvement in quality factor is achieved for the inductors in the filter. In addition, a 1.1 dB improvement in maximum available power gain (G Amax ) in K-band is achieved for the filter after the ICP etching. These results show that the micromachined pi (PI) filter is very promising for microwave/millimetre-wave RFIC applications

On-Chip Optical Technology in Future Bus-Based Multicore Designs

This work investigates the integration of CMOS-compatible optical technology to on-chip coherent buses for future CMPs. The analysis results in a hierarchical optoelectrical bus that exploits the advantages of optical technology while abiding by projected limitations. This bus achieves significant performance improvement for high-bandwidth applications relative to a state-of-the-art fully electrical bus.

Progress in Silicon Single-Photon Avalanche Diodes

Silicon single-photon avalanche diodes (SPADs) are nowadays a solid-state alternative to photomultiplier tubes (PMTs) in single-photon counting (SPC) and time-correlated single-photon counting (TCSPC) over the visible spectral range up to 1-mum wavelength. SPADs implemented in planar technology compatible with CMOS circuits offer typical advantages of microelectronic devices (small size, ruggedness, low voltage, low power, etc.). Furthermore, they have inherently higher photon detection efficiency, since they do not rely on electron emission in vacuum from a photocathode as do PMTs, but instead on the internal photoelectric effect. However, PMTs offer much wider sensitive area, which greatly simplifies the design of optical systems; they also attain remarkable performance at high counting rate, and offer picosecond timing resolution with microchannel plate models. In order to make SPAD detectors more competitive in a broader range of SPC and TCSPC applications, it is necessary to face several issues in the semiconductor device design and technology. Such issues will be discussed in the context of the two possible approaches to such a challenge: employing a standard industrial high-voltage CMOS technology or developing a dedicated CMOS-compatible technology. Advances recently attained in the development of SPAD detectors will be outlined and discussed with reference to both single-element detectors and integrated detector arrays.

A wideband PVDF-on-silicon ultrasonic transducer array with microspheres embedded low melting temperature alloy backing

A PVDF-based 8-element ultrasound transducer array (1 mm x 1 mm element size with an inter-element spacing of 1 mm) on a silicon carrier substrate is fabricated and characterized. To improve the performance of the transducer, new CMOS-compatible fabrication technologies are introduced. These include: (1) adhesive micro-contact printing on non-radiating areas, and (2) glass microspheres (7-20 microm in diameter) embedded low melting temperature alloy (LMA) for backside electrical connection. The first improvement removes the adverse effects of adhesive layer (e.g., lower sensitivity) between the PVDF and backside contact while the second one improves the pulse-echo signal quality by eliminating reflections at the backing/water interface. The fabricated array elements are tested in a water tank and their pulse-echo response are recorded. The central frequency of each element is 25 MHz with a 100% measured 6-dB bandwidth (60% 3-dB bandwidth).

Design and simulation of integrated inductors on porous silicon in CMOS-compatible processes

We present a comprehensive approach of designing on-chip inductors using a CMOS-compatible technology on a porous silicon substrate. On-chip inductors realized on standard CMOS technology on bulk silicon suffer from mediocre Q-factor values partly because of the loss created by the Si substrate at higher frequencies, in addition to the metal losses. We examine the alternative of using porous Si as a thick layer isolating the Si substrate from the metallization in an otherwise standard CMOS technology. We present theoretical designs produced with full-wave Method-of-Moments simulations, verified by measurements in standard 0.18μm CMOS technology using Al metallization. When porous Si is introduced in that technology, the same inductor metallization produced Q-factor enhancements of the order of 50%, compared to the same inductor on bulk crystalline silicon. We also produce optimized single-ended inductor designs using Cu on porous Si, in a 0.13μm-compatible CMOS technology. The resulting Q-factors are enhanced by a factor of 2 and reach values of 30 or more in the 2–3GHz frequency range. Even higher quality factors can be obtained in this technology when differential designs are used.

A CMOS-compatible bulk technology for the fabrication of magnetically actuated microbalances for chemical sensing

A resonant chemical sensor, fabricated in a standard, CMOS-compatible technology followed by a two-mask post-processing, is presented. A silicon dioxide plate, suspended to two torsional springs, is released from the silicon substrate by means of a TMAH anisotropic wet etch. Two metal loops are integrated on the plate. The first, in conjunction with an external micromagnet, is used to drive the plate into mechanical resonance, while the second loop is used for detection. In accordance with the microbalance principle, a shift of the resonance frequency can be related to the adsorption on the plate of the chemical species under test. The sensor design, and first results on the implementation of the post-processing technology, are presented.

Microfluidic-optical integrated CMOS compatible devices for label-free biochemical sensing

The fabrication, characterization and packaging of novel microfluidic-optical integrated biosensors for label-free biochemical detection is presented in this paper. The integrated device consists of a three-dimensional embedded microchannel network fabricated using enhanced CMOS compatible SU-8 multilevel polymer technology on top of a wafer containing Mach-Zehnder Interferometer (MZI) nanophotonic biosensor devices. PMMA housing provides connection to the macro-world and ensures robust leakage-free flow operation of the devices. This macro-microfluidic module can operate at pressure drops up to 1000 kPa. Fluid flow experiments have been performed in order to demonstrate the robustness of our microfluidic devices. The devices have been designed to operate under continuous flow. Steady-state flow rates ranging from 1 to 100 µl min−1 at pressure drops ranging from 10 to 500 kPa were measured in the laminar flow regime. Experimental results are in good agreement with laminar flow theory. The first interferometric sensing measurements are presented in order to demonstrate the functionality of these novel integrated devices for lab-on-a-chip and label-free biosensing applications. A bulk refractive index detection limit of 3.8 × 10−6 was obtained, close to the minimum detected up to now by label-free biosensor devices without microfluidic integration. As far as we know, this is the first time that a label-free biosensor device is integrated within a microfluidic network using a wafer-level CMOS compatible process technology.

A micromachined CMOS distributed amplifier by CMOS compatible ICP deep-trench technology

A CMOS-process-compatible backside inductively coupled-plasma (ICP) dry etching technology to form deep trenches underneath the inductors of RF ICs is developed to enhance the performance of RF ICs with on-chip inductors. A 1-12.6-GHz CMOS distributed amplifier (DA) was designed and implemented in a standard CMOS process. The DA exhibits good input 1-dB compression point (P/sub 1 dB/) of -2 dBm and input third intercept point of 7 dBm both at 2.4 and 5.8 GHz. The authors demonstrate that a significant improvement in power gain (S/sub 21/) and noise figure (NF) can be achieved by conducting the proposed backside ICP dry etching to selectively remove the silicon underneath the inductors of the DA. The result shows that a 1.06-dB increase in S/sub 21/ (from 9.7 to 10.76 dB) and a 0.87-dB decrease (from 5.51 to 4.64 dB) in NF are achieved at 5.8 GHz mainly due to the improvement of the quality factor of the inductors in the DA. This means that this backside ICP dry-etching technique is very promising for system-on-a-chip applications.

A small OCA on a 1/spl times/0.5-mm/sup 2/ 2.45-GHz RFID Tag-design and integration based on a CMOS-compatible manufacturing technology

This letter reports, for the first time, on the design strategy and process integration for a small on-chip-antenna (OCA) with a radio-frequency identification (RFID) tag chip-area /spl sim/1/spl times/0.5 mm/sup 2/. It is designed based on a 2.45-GHz RFID tag circuit with an inductive-coupling model. A patterned Al shielding layer is used to improve the consistency of the actual performance obtained from fabricated devices and those predicated from the design. The antenna's inductor coils were fabricated based on a conventional Cu-Damascene process. To achieve the required antenna performance (e.g., Q-factor), a set of thick USG and deep-via etch processes were specifically developed. Our results demonstrate that the dc power converted by the OCA is sufficient to enable the RFID tag chip to communicate with a corresponding 2.45-GHz RFID reader with a 1-mm distance.

Micromachined CMOS LNA and VCO by CMOS-compatible ICP deep trench technology

Selective removal of the silicon underneath the inductors in RF integrated circuits based on inductively coupled plasma (ICP) deep trench technology is demonstrated by a complementary metal-oxide-semiconductor (CMOS) 5-GHz low-noise amplifier (LNA) and a 4-GHz voltage-controlled oscillator (VCO). Design principles of a multistandard LNA with flat and low noise figures (NFs) within a specific frequency range are also presented. A 2-dB increase in peak gain (from 21 to 23 dB) and a 0.5-dB (from 2.28 to 1.78 dB) decrease in minimum NF are achieved in the LNA while a 3-dB suppression of phase noise is obtained in the VCO after the ICP backside dry etching. These results show that the CMOS-process-compatible backside ICP etching technique is very promising for system-on-a-chip applications.

230-GHz self-aligned SiGeC HBT for optical and millimeter-wave applications

This paper describes a 230-GHz self-aligned SiGeC heterojunction bipolar transistor developed for a 90-nm BiCMOS technology. The technical choices such as the selective epitaxial growth of the base and the use of an arsenic-doped monocrystalline emitter are presented and discussed with respect to BiCMOS performance objectives and integration constraints. DC and high-frequency device performances at room and cryogenic temperatures are given. HICUM model agreement with the measurements is also discussed. Finally, building blocks with state-of-the-art performances for a CMOS compatible technology are presented: A ring oscillator with a minimum stage delay of 4.4 ps and a 40-GHz low-noise amplifier with a noise figure of 3.9 dB and an associated gain of 9.2 dB were fabricated.

Characterization of an Amorphous<tex>$hbox Ge_xhbox Si_1-xhbox O_y$</tex>Microbolometer for Thermal Imaging Applications

A self-absorbing, self-supported microbolometer was fabricated using CMOS compatible surface micromachining technology. A high resistivity a-Ge/sub x/Si/sub 1-x/O/sub y/ resistor layer was suspended using an electrically conductive nichrome link. Prototype device fabrication and characterization indicates these devices may be suitable for application to commercial thermal imaging cameras. Detectivity of 6.7/spl times/10/sup 8/cm/spl radic/Hz/W, responsivity of 1/spl times/10/sup 5/ V/W, and thermal time constant of 13 ms were measured and a NETD value of 190 mK was calculated.

A Sweeping Mode Integrated Fingerprint Sensor With 256 Tactile Microbeams

This paper reports recent advances in the development of a tactile fingerprint sensor made by a CMOS compatible front side bulk micromachining technology. This device enables the measurement of a fingerprint by the way of a mechanical scanning principle of the finger roughness. While this sensing principle has shown good results on a first prototype of reduced width, we present here the design, fabrication and test of a new sensor. This sensor contains 256 pressure sensitive microbeams for a total length of 1.28 cm and is fully integrated with analog and mixed signal electronics. In this paper we will detail the general working principle of the tactile fingerprint sensor and the two prototypes that have been manufactured and tested with a special focus on the electronic architecture and the test results of the second prototype.

Transmission lines fabricated with CMOS interconnect technology

Transmission lines, microstrip and coplanar waveguide, have been fabricated on lossy silicon substrates embedded in CMOS Cu/SiO 2 interconnect layers. The characteristic impedance, the loss and the slowing factor have been studied in detail with the geometric size of transmission lines. It is shown that microstrips and coplanar waveguides embedded in silicon oxide can be achieved with CMOS compatible interconnect technology and with low loss on lossy silicon wafers, which provide the essential passive components for designing microwave and millimetre-wave circuits on silicon wafers.