Circuit Substrate Research Articles

Fast-flow underfill encapsulant: flow rate and coefficient of thermal expansion

In the flip-chip on board assembly method, an underfill encapsulant material is applied in the gap between the integrated circuit (IC) chip and substrate to distribute the shear stresses at the solder interconnects. These shear stresses are imposed on the solder interconnects due to a coefficient of thermal expansion (CTE) mismatch between the IC chip and substrate. Different technologies such as fast-flow, no-flow, and reworkable underfills are currently being studied for flip-chip underfill encapsulant materials. This paper looks at the underfill encapsulant used in the fast-flow method of underfilling the IC chip/substrate gap. The effect of filler loading, particle size, and particle size distribution on the flow rate and CTE of the fast-flow underfill material are discussed in this work. The material used for the experiments is an epoxy resin with added silica filler to decrease the CTE. This study focuses on what effect different filler characteristics have on the underfill encapsulant. Also, an underfill encapsulant that can compete with one of industry's faster fast-flow underfills was developed as a result of this work.

A new technique for in-fixture calibration using standards of constant length

This paper presents a new technique for in-fixture calibration using standards of constant length. The technique uses a through line, reflective load, symmetric two-port at a reference position, and the same two-port at a different position, all produced on substrates of the same electrical properties and physical length. When compared with the through-reflect line (TRL) technique, this one eliminates the need for a length change during calibration and device measurements while retaining comparable accuracy. Moreover, in contrast with the line-network network (LNN) technique, it provides easy resolution of all error coefficients without ambiguities and does not require physical movement of a reference two-port, but reproduction of a reference two-port on microwave integrated circuit (MIC) substrates, which is easy to realize. All these features make the new technique useful for in-fixture measurements requiring a constant distance between input and output connections. The validity of the proposed technique is illustrated by experimental results.

Electrostatic Printing of Parmod™ Electrical Conductors

A new family of liquid toners has been developed to print conductive traces on printed circuit boards by a digital printing technology. The new toners are based on Parmod™ technology which has been developed to enable low cost production of printed circuits by a simple print-and-heat process. The novel feature of these printable materials is that they cure to pure metallic conductors in seconds at a temperature low enough to be compatible with polymer-based printed circuit substrates. The resulting circuit traces have high electrical conductivity and are solderable. The use of conventional printed circuit substrates and the speed of the process permit high-production, low-cost roll to roll processing.The extension of Parmod™ technology to liquid toners provides two major additional benefits: 1) It provides a major increase in resolution for production of advanced technology high density interconnect structures, and 2) It permits direct digital printing of circuits from CAD files with no intermediate tooling requirements. The latter capability realizes the goal of total CAD/CAM integration and the ultimate in manufacturing flexibility. This paper discusses the characteristics of Parmod™ technology, the performance of the liquid toners based on it and some applications of the technology which can be foreseen.

Electrical characterization of Uromyces germ tubes grown on integrated circuit substrates

The electrical characterization of a biohybrid integrated circuit is described. Uromyces appendiculatus is the biological moiety and an integrated circuit provides the electrical interface between the biological element and the test equipment. Direct current characterization has shown the current flow to be nonlinear with a time constant of 30–60 s. The conductivity is believed to be ionic through intracellular ions of the fungal cell. Locations of the germ tube which have different ion compositions have shown contrasting responses to testing over time. Potential applications are reviewed.

Finite element analysis of thermal stresses in high-power substrates for hybrid circuits

High-power substrates for hybrid circuits which combine aluminium with an anodic coating are highly efficient, the heat generated from the chip mounted on the coating being rapidly dissipated. Unfortunately because of the large difference in thermal expansion coefficients between the two materials, large thermal tensile stresses are set up in the coating. Such stresses can cause cracking in the coating and subsequent loss of electrical integrity. A finite element model of the substrate has been developed and validated theoretically and through equilibrium balances. The model has been used in wide-ranging sensitivity studies in order to determine the desirable coating material and geometrical properties necessary to attenuate the coating peak tensile stresses. It has been found that coating thickness, thermal expansion coefficient and elastic modulus have the greatest effect upon maximum stress values and that the thickness and expansion coefficient should be as great as possible whilst the elastic modulus should be as small as possible for minimum peak stress. The model is currently being used to predict stresses under transient conditions, thermal cycling, multipoint heat inputs and for crack development studies.

Tests on anodised aluminium substrates for hybrid circuits

Anodised aluminium substrates have efficient thermal properties, in that the heat generated from chips is rapidly dissipated through the aluminium. Unfortunately, the difference in thermal expansion coefficients between the two materials results in tensile stresses in the coating which can lead to cracking. A finite element model of the substrate has previously been developed and theoretically validated, then used in sensitivity studies to determine the desirable coating properties necessary to attenuate the tensile stresses. In this investigation, the model is further validated experimentally, then used to predict the thermal profile in various substrates for a given multi-point heat input configuration and the predictions compared with experimental results. Experimental work is also carried to determine the coating crack threshold stress and some physical constants for the coating.

Musical tone generating apparatus employing microresonator array

A musical tone generating apparatus employs an array of microresonant structures to generate the harmonic component signals of a musical tone to be generated. The microresonant structures produce high frequency signals which are down converted to audio frequency range by mixing them with a high frequency reference signal. The desired tone color is achieved by modifying the relative amplitudes of the harmonic component signals to produce a desired tone color. A large number of microresonators are preferably integrated on a single integrated circuit substrate to provide a variable tone generating system in a relatively compact environment.

Determining transfer batch sizes in trip-based material handling systems

Trip-based material handling systems such as AGV systems or lift trucks are often designed with a given flow matrix (or from-to chart), which typically shows the number of loaded trips that the devices must perform per unit time between the workstations. A from-to chart that would result from the parts flow in a facility actually is dictated by the transfer batch size; that is, the number of parts transferred from one workstation to the next in one trip. In this paper, we present analytical and simulation results aimed at determining optimal or nearoptimal transfer batch sizes in manufacturing systems and develop an analytical relationship between the material handling capacity and the expected work in process (WIP) in a manufacturing system. Although the results apply to any discrete-parts flow, trip-based material handling system, they are particularly relevant for the electronics manufacturing industry, where parts (such as printed circuit boards or substrates for flat panel displays) typically are handled as a group (in specially designed containers such as cassettes) and the costs associated with WIP tend to be large. In such applications, the cassette size is the transfer batch size.

An active, microfabricated, scalp electrode array for EEG recording

We describe the microfabrication, packaging, and testing of an active, dry, scalp electroencephalogram (EEG) electrode. The electrode consists of a silicon sensor substrate and a custom circuit substrate (2 μm CMOS technology). A via-hole technology has been developed using reactive ion etching with SF 6 O 2 gas mixture to make electrical contacts between the sensor and circuit substrates. These substrates and batteries (power source) are then assembled in a custom package for testing on bench and human subjects.

Optoelectronic on-chip characterization of ultrafast electric devices: Measurement techniques and applications

A comprehensive description of a modular optoelectronic measurement system for the characterization of high-frequency microelectronic devices and circuits is presented. Depending on application, specific techniques to generate, synchronize to, and detect high-frequency electric signals are combined covering a frequency range of more than three orders of magnitudes from 2 to 4000 GHz. We discuss on-chip electric-pulse generation by freely positionable photoconductive probes and by direct optical excitation of active devices. Alternatively, for measurements with external, electronically generated signals, the system is laid out to lock onto periodic signals of arbitrary frequency employed as clock signal for the circuit under test. With respect to detection, the following approaches are discussed: sampling with freely positionable electrooptic and photoconductive probe tips, and truly (probe-tip-free) all-optical testing based on the field-dependent optical nonlinearity of the circuit's substrate material. The probes are characterized concerning time resolution, linearity, sensitivity, and invasiveness. We demonstrate with a number of examples that the combination of the various modules allows one to optimize the approach to a specific testing problem. Measurements of the linear and nonlinear behavior of active and passive devices as well as circuits are presented. The electric field, respectively potential, is measured locally (point measurements) or in its spatial distribution (field mapping) both in the near and far field.

Planarization of Surface of Aluminium Nitride Substrate with Thin Silicon Oxide Film

For use in a microelectronic circuit, as-sintered and polished aluminium nitride substrates have imperfections of surface roughness with pores and open porosity, respectively. The use of a thin coating of silicon oxide was studied for forming 10-μm-wide patterns on the surface of the aluminium nitride substrate. When polished substrates were used and the thickness of silicon oxide was held at less than 1200nm, the minimum surface roughness of coated substrates had Ra of 20nm and Rmax of 200nm, and a functional 10-μm electric circuit pattern could be made. Thermal conductivity of coated substrates decreased from 186 to 179W/m·K with increasing thickness of silicon oxide up to 1200nm. The thermal conductivity of coated substrates decreased following the value calculated by an expression for a multilayer board.

A CAD-suitable approach for the analysis of nonuniform MMIC and MHMIC transmission lines

A new method of moment-based formulation for the solution of the telegraphist's equations in nonuniform transmission lines is presented. Entire domain basis functions that build in a frequency variation are used to cover wider frequency and physical dimension ranges. The results obtained using the proposed formulation are validated by comparison to those obtained by a CAD package and to measured data. Different nonuniform lines in microstrip and coplanar technologies on monolithic microwave/millimeter wave integrated circuit (MMIC) and miniaturized hybrid microwave integrated circuit (MHMIC) substrates are investigated with an application to the design a matched taper transition in a MMIC coplanar line.

Analysis of a two-port flanged coaxial holder for shielding effectiveness and dielectric measurements of thin films and thin materials

A two-port flanged coaxial probe for measuring the dielectric and magnetic properties of thin material sheets is analyzed. Closed form solutions for the two-port scattering parameters are presented. The solution assumes an incident TEM wave together with evanescent TM/sub 0n/ modes. Numerical results are obtained for both the forward and inverse problem. Computations indicate that at low frequencies the incident waves are almost totally reflected. As the frequency is increased, transmission through the sample increases. Experimental results compare closely with the theory. The inverse solution yielded good permittivity determination for the cases tested. The technique should prove useful for nondestructive testing of circuit boards or substrates.

The orientation of mesophase pitch during fully developed channel flow

Mesophase pitch-based carbon fibers are ideally suited for applications where the rapid dissipation of heat is important (structural composites, printed circuit substrates, etc.). However, control of texture is essential in order to optimize fiber properties, especially thermal conductivity. Because ribbon-shaped mesophase pitch-based carbon fibers possess a highly linear texture, these fibers are very promising for high thermal conductivity applications. The observed texture of these ribbon-shaped fibers and the radial texture commonly observed in circular fibers can be predicted from liquid-crystal flow theory, where the precursor molecules are modeled as rigid disks.In order to determine the orientation of flowing mesophase pitch, a capillary rheometer was modified to quench capillaries during extrusion. Aluminum capillaries were constructed with rectangular channels down the center (with a 9:1 aspect ratio). The capillaries containing the mesophase samples were mounted in low-viscosity epoxy resin and cured. The desired mesophase surface (transverse or longitudinal) was isolated by grinding and polishing the samples to 3 gmm. Then the pitch surface was observed optically under cross-polarized light. The transverse surfaces of mesophase pitch indicated an orientation pattern where the aromatic rings lie perpendicular to the channel walls. This result is consistent with that predicted by the liquid-crystal flow theory, as well as with the textures of carbonized fibers.

Anisotropically conductive adhesive flip-chip bonding on rigid and flexible printed circuit substrates

A systematic experiment on flip-chip bonding assembly using an anisotropically conductive adhesive (ACA) has been carried out. The assembled modules have been characterized by a number of environmental tests, including aging, constant humidity, temperature cycling, humidity cycling, shear, vibration, and shock testing. The results indicate that under optimum process conditions, high quality and high reliability joints can be achieved. Conduction failure mechanisms have been investigated using scanning electron microscopy (SEM) and transmission electron microscopy (TEM). The analysis shows that failure is dependent on competition between driving factors; thermal stress, elastic stress, expansion due to moisture absorption on one side, and the resistant factor, i.e., interatomic force. Variation of the filler size in the ACA, configurations of chips and boards, as well as bonding pressure and its distribution are among the most important factors that control the bonding quality and reliability.

Directed growth of Uromyces hyphae on integrated circuit substrates

We report on the initial findings of a program involving the directed growth of fungal hyphae on custom-designed integrated test circuits for the purpose of creating a biohybrid integrated system. The biological element in this work is Uromyces appendiculatus, an organism which has been shown to exhibit precise and unique topographical signal recognition. The integrated circuit is fabricated using standard semiconductor processing techniques, with guiding elements etched into the final layer of metallization. The spores germinate on contact pads in the circuit and this results in the formation of germ tubes which are guided by the vectoring elements toward other contacts. We show that the vectoring structures are capable of steering the hyphae to intended connection/termination points through a wide range of angles. In addition, we demonstrate that self-assembled monolayers of n-octadecyltrichlorosilane on the circuit materials result in superior germination characteristics compared to untreated surfaces. We also speculate on the potential applications of such cell–circuit hybrids.

Thermal analysis of microelectric packages and printed circuit boards using an analytic solution to the heat conduction equation

This paper provides an overview of the solution and application of the three-dimensional heat conduction equation for a rectangular-shaped, multilayer structure with discrete surface heat sources. A Fourier series expansion is used to represent both the heat source function and temperature solution. Trigonometric terms are used for the two planar coordinates whereas the Fourier coefficient for the temperature expansion provides the dependence in the direction of the substrate thickness. Boundary conditions consist of insulated edges and Newtonian surface cooling. Application possibilities are numerous. A computer program based on this method has been used to analyze simple heat sinking chassis panels and finned extrusions with mounted power transistors. More elegant solutions are provided for many types of single and multi-chip packages, including hybrid circuit substrates. The prediction of printed circuit board conduction effects is also possible. Although the theory and a variety of applications of the resultant computer codes have been previously published in technical journals and symposia proceedings, this paper presents the most unified and complete review to date.

5402064 Magnetoresistive sensor circuit with high output voltage swing and temperature compensation

A magnetoresistor (MR) and a non-magnetoresistor (NMR) are formed of indium antimonide or other magnetoresistive material in thermal proximity to each other on an integrated circuit substrate (100). Hall effect shorting strips (104) are formed on the magnetoresistor (MR) to make it much more magnetoresistive than the non-magnetoresistor (NMR). A current mirror (80) causes equal constant currents (I2) which do not vary with temperature to flow through the magnetoresistor (MR) and non-magnetoresistor (NMR), such that magnetoresistor and non-magnetoresistor voltages are developed thereacross respectively. The magnetoresistor and non-magnetoresistor voltages vary equally in accordance with temperature. The magnetoresistor voltage also varies in accordance with applied magnetic flux. A comparator (66) subtracts the non-magnetoresistor voltage from the magnetoresistor voltage to produce an output signal (Vout) with the temperature variation canceled, and which thereby varies only in accordance with magnetic flux. The current mirror (80) has an essentially infinite equivalent load impedance, such that the magnetoresistor voltage varies to a maximum possible extent with variation of the resistance of the magnetoresistor (MR) and the sensor (70) has a maximum possible output voltage swing.

Integrated circuit substrate coupling models based on Voronoi tessellation

We present a modeling technique for assessing the impact of substrate-coupled switching noise in CMOS mixed-signal circuits. Since the magnitude of the noise problem is a function of the relative proximity of noisy and sensitive devices, design aids are required which can incorporate the switching noise effects at the post-layout phase of design verification. In our approach, SPICE-compatible lumped element RC substrate macromodels are efficiently generated from the circuit layout using a geometric construct called the Voronoi tessellation. The new models retain the accuracy of previously reported models, but contain orders of magnitude fewer circuit nodes, and are suitable for analyzing larger circuits. The node count reduction is realized by deriving a model topology which automatically adapts itself to the local densities of substrate features associated with the noise coupling. Our strategy has been verified using detailed 2-D device simulation, and successfully applied to some mixed-A/D circuit examples.

On the responses of strip‐line interconnects with discontinuities excited by external fields

AbstractAn algorithm is developed to evaluate the responses of discontinuous coplanar strip‐lines excited by external electromagnetic fields. The algorithm uses the cascade chain matrix method which employs the distributed circuit parameters to model the external field coupling to the line and it is applicable to most commonly encountered discontinuities in microwave integrated circuit interconnects on lossy substrates. A general CAD program is developed based on this model and it is applied to realistic coplanar strip‐line interconnections with geometric and resistive discontinuities to illustrate the capabilities of the algorithm. These interconnect models are selected from a practical microwave integrated circuit design. Simplicity and fast speed of the algorithm enable computer‐aided analysis of externally induced electromagnetic noise in integrated circuits to be carried out. The effects of dielectric losses in the integrated circuit substrates and the discontinuities in the conducting tracks on the wave coupling are investigated in isolation.