Chip Temperature Research Articles

Avalanche ruggedness and failure mode of SiC trench MOSFETs

Avalanche ruggedness of SiC MOSFETs is of interest for many researchers since these devices are used in various applications. Existing inductances in the application circuits are the main reason that SiC MOSFETs may enter into avalanche condition. Under certain avalanche operating conditions, the device failure is inevitable. Avalanche failures of SiC MOSFET are usually classified into current-driven and temperature-driven categories. In this paper single-pulse avalanche behaviour of SiC trench MOSFETs of different voltage classes is experimentally investigated. The measurements were performed under various conditions of current, energy, avalanche time and temperature. To gain a better understanding of device failure and to correlate with the experimental results, 1D thermal simulations were carried out and critical chip temperatures which are expected to cause device failures are shown. Furthermore, repetitive avalanche measurements and parameter analyses are discussed. It is shown that SiC trench MOSFETs of different chip sizes show similar avalanche ruggedness. The critical chip temperatures were found to be similar for devices of all avalanche breakdown voltage classes. No drift of the relevant device parameters has been seen after repetitive avalanche measurements. The method used in this work can be used to predict the avalanche behaviour of SiC trench MOSFETs.

Dynamic Power Management in Large Manycore Systems: A Learning-to-Search Framework

The complexity of manycore System-on-chips (SoCs) is growing faster than our ability to manage them to reduce the overall energy consumption. Further, as SoC design moves toward three-dimensional (3D) architectures, the core's power density increases leading to unacceptable high peak chip temperatures. In this article, we consider the optimization problem of dynamic power management (DPM) in manycore SoCs for an allowable performance penalty (say, 5%) and admissible peak chip temperature. We employ a machine learning– (ML) based DPM policy, which selects the voltage/frequency levels for different cluster of cores as a function of the application workload features such as core computation and inter-core traffic, and so on. We propose a novel learning-to-search (L2S) framework to automatically identify an optimized sequence of DPM decisions from a large combinatorial space for joint energy-thermal optimization for one or more given applications. The optimized DPM decisions are given to a supervised learning algorithm to train a DPM policy, which mimics the corresponding decision-making behavior. Our experiments on two different manycore architectures designed using wireless interconnect and monolithic 3D demonstrate that principles behind the L2S framework are applicable for more than one configuration. Moreover, L2S-based DPM policies achieve up to 30% energy-delay product savings and reduce the peak chip temperature by up to 17 °C compared to the state-of-the-art ML methods for an allowable performance overhead of only 5%.

High-performance multi-morphology porous wick fabricated using a composite pore former

High-performance porous wicks have a promising potential in loop heat pipe (LHP). Hence, this work proposes a novel composite pore former comprising NaCl and g-C3N4 for fabricating high-performance multi-morphology porous wicks that generate better-communicating pores with different sizes and shapes inside the wicks. The synergistic effect of these pores increases the wicks' porosity, reduces flow resistance, and maintains a sufficient capillary force, enabling the multi-morphology porous wicks to exhibit high comprehensive performance. Moreover, the LHP with a wick has an ultralow thermal resistance of 0.133 °C/W and can dissipate up to 260 W of heat load at a chip temperature below 85 °C. The new LHP exhibits exceptional anti-gravity performance, effectively commencing operation with an ultralow heat load of 1 W at a maximum anti-gravity angle of 60°. Furthermore, it achieves an ultimate heat load of 400 W at 30°. Hence, the multi-morphology porous wick demonstrates a great potential for application in LHPs with lightweight and simple preparation advantages. Overall, this study lays a promising pathway for electronic equipment cooling systems.

Heat transfer enhancement for 3D chip thermal simulation and prediction

Parameter changes in the complex internal structure of multi-layer 3D stacked chips will greatly reduce the efficiency of modeling and thermal analysis. In this work, by combining thermal simulation analysis with machine learning algorithms, we can skillfully predict the hotspot temperature changes of 3D chips up to 28 layers while changing some key parameters of 3D chips with less computational effort. K-fold Cross Validation (K-CV) algorithm and support vector regression (SVR) algorithm were developed to predict the variations in hotspot temperature of the 3D chip while changing modeling and cooling parameters. Based on the training matrix, the support vector regression (SVR) model can accurately predict the random power distribution case, the random processor core location distribution case, and the random Through Silicon Via (TSV) distribution case. The validation results show that the prediction accuracy deviation is close to 0.6 K, and the correlation coefficient R2 is close to 1. Meanwhile, the variable parameter and variable layer prediction method based on the aforementioned training model can more accurately predict the hotspot temperature of the 3D chips with higher layers (28 layers) from the modeling analysis data of 3D chips with lower layers (4–5 layers). Its prediction deviation is less than 0.2%. The predicted data match the simulated numerical data quite well, indicating that the predictive algorithm can accurately feed the sample data set.

Multi-scale modeling and fast inference for thermal environment analysis of air-cooled data center

Both the thermal environment of a data center room and the internal thermal environment of a server are of great concern, but it is extremely difficult to build and solve full-scale computational fluid dynamics (CFD) simulation models from room scale to chip scale. In this paper, a multi-scale simulation method for data centers is proposed to achieve this aim by coupling room-level, rack-level, and server-level models. Simulations of the designed working conditions were carried out. The results showed that aisle containment systems improve the server's thermal environment, resulting in a drop in the maximum temperature of the server from 87.5 °C to 73.1 °C. A multi-scale model of the data center can be used to optimize system operation parameters conveniently and accurately. In this simulation, air conditioning parameters that contribute to energy savings with higher supply air temperatures and lower supply air volumes while guaranteeing safe server operation were determined. Moreover, fast and accurate prediction of chip temperature by radial basis function (RBF) networks has been proven to be feasible.

Fabrication and application of graphene-based silicone grease

With the increasing power requirements of integrated circuits, the demand for efficient cooling has followed suit. Silicone grease is commonly used due to its thermal stability and ability to fill in airgaps between the electronic components and radiators. Previous works attempted to increase the grease’s thermal conductivity by adding various additives such as boron nitride or functionalized carbon nanotubes. Functionalized graphene was chosen in this study due to its exceptional physical and chemical properties. Results show that the functionalization with several acid mixtures combined with ball milling resulted in a compound chemically equivalent to graphene and thoroughly dispersed in silicone grease. An optimal grease was produced, containing 1 wt% Gr-COOH and possessing a thermal conductivity of 6.534 W mK−1. The resulting grease’s performance in thermal dissipation and approximated lifespan improvements was compared to a commercially available silicone grease using a 200 W LED. Results indicated a 4.5 °C decrease in saturation temperature of LED chip along with a 257% increase in thermal conductivity.

Fluorescent sensing probe based on heterovalent doped Lu2W2.5Mo0.5O12:Er3+/Yb3+ phosphor for real-time chip temperature monitoring

The influence of Li+/Zn2+ heterovalent doping on the structural change and upconversion luminescence properties of Lu2W2.5Mo0.5O12:Er3+/Yb3+ phosphors was investigated in details. The gradual substitution of Li+/Zn2+ ions for Lu3+ ions result in the evolution from orthorhombic Lu2W2.5Mo0.5O12 to monoclinic (LiZn)2W2.5Mo0.5O12, which bring the structural distortion, the reduction of local symmetry and the crystallite growth. The green upconversion intensity of Er3+ ions at 536 nm and 550 nm were enhanced significantly by a factor of 8000 and 4000. The temperature sensing characteristics of a single (LiZn)2W2.5Mo0.5O12:Er3+/Yb3+ particle in all-fiber structure was explored and the unusual thermally-enhanced upconversion luminescence was observed, which is beneficial for achieving high-precision temperature measurement based on the fluorescence intensity ratio technology. The absolute temperature sensitivity reached a maximum of 0.0095 K−1 at 423 K and the temperature deviation was less than 0.6 K. The as-built all-fiber temperature sensor was successfully applied in the on-line monitoring of CPU temperature.

Transient thermal behaviour of a substrate subjected to the activation of an electronic chip and surface cooling

<p>Controlling the temperature of electronic components is a major interest for the electronics industry. Indeed, the lifetime of the components is directly dependent on the temperature levels reached in the electronic boards. Then, it is essential to predict the chip temperature evolution in order to maximize their lifespan. The electronic boards are more and more complex. They are multi-layers composed of different materials. The numerical resolution of the heat transfer equations in these systems requires very fine meshes and therefore very high computation times. It is possible to standardize the characteristics of these multilayer boards in order to treat them as a homogeneous material. The study presented in this work uses this approach and deals with the transient thermal behaviour of a substrate and its chip. The entire surface of the electronic board is cooled by convection. The developed model assumes that the surface convection coefficient is known, constant and uniform. The heat transfer by conduction in the substrate is based on an axisymmetric assumption on the longitudinal dimensions of the exchange surface (r, theta) and an assumption of semi-infinite medium in the transversal direction of the plate (thickness z). These assumptions are verified if, on the one hand, the activation times of the electronic chips are low enough and the dimensions of the chip is small compared to the electronic board. In these conditions, a fully analytical model is developed considering two successive integral transforms: a Laplace transform for the temporal variable, and a Hankel transform for the radial variable. An explicit expression of the temperature of the surface heated by the component is established, requiring very short computation times compared to numerical simulations. This model can be easily incorporated into a dimensioning code for electronic devices to predict their temperature.  It can also be used as a direct model in an inverse procedure for identifying parameters on electronic boards.</p>

Thermal Performance Optimization of Integrated Microchannel Cooling Plate for IGBT Power Module.

In high-integration electronic components, the insulated-gate bipolar transistor (IGBT) power module has a high working temperature, which requires reasonable thermal analysis and a cooling process to improve the reliability of the IGBT module. This paper presents an investigation into the heat dissipation of the integrated microchannel cooling plate in the silicon carbide IGBT power module and reports the impact of the BL series micropump on the efficiency of the cooling plate. The IGBT power module was first simplified as an equivalent-mass block with a mass of 62.64 g, a volume of 15.27 cm3, a density of 4.10 g/cm3, and a specific heat capacity of 512.53 J/(kg·K), through an equivalent method. Then, the thermal performance of the microchannel cooling plate with a main channel and a secondary channel was analyzed and the design of experiment (DOE) method was used to provide three factors and three levels of orthogonal simulation experiments. The three factors included microchannel width, number of secondary inlets, and inlet diameter. The results show that the microchannel cooling plate significantly reduces the temperature of IGBT chips and, as the microchannel width, number of secondary inlets, and inlet diameter increase, the junction temperature of chips gradually decreases. The optimal structure of the cooling plate is a microchannel width of 0.58 mm, 13 secondary inlets, and an inlet diameter of 3.8 mm, and the chip-junction temperature of this structure is decreased from 677 °C to 77.7 °C. In addition, the BL series micropump was connected to the inlet of the cooling plate and the thermal performance of the microchannel cooling plate with a micropump was analyzed. The micropump increases the frictional resistance of fluid flow, resulting in an increase in chip-junction temperature to 110 °C. This work demonstrates the impact of micropumps on the heat dissipation of cooling plates and provides a foundation for the design of cooling plates for IGBT power modules.

A dumbbell-shaped 3D flat plate pulsating heat pipe module augmented by capillarity gradient for high-power server CPU onsite cooling

With the development of the data center industry and the increasing power density of servers, it is crucial to remove waste heat from small-area heat sources to ensure the safe and efficient operation of data processing chips. To complement existing studies, in this paper, a novel three-dimensional flat plate aluminum pulsating heat pipe (3D-FPPHP) with four different channel structures for radial heat dissipation of high-power server chips was proposed. The results showed that under the favorable influence of the additional capillarity force provided by the variable diameter channels, the FPPHP filled with acetone can start up easily and has good robustness during variable power operation. When the input power was 150 W, the junction temperature of the heating source could be reduced by 42.49 °C (48.67%) compared to an identical aluminum plate. In addition, a heat sink module based on the proposed 3D-FPPHP with optimal charging ratio was tested in a 1U server chassis. The results showed that it can manage an input power of 300 W (corresponding to a heat flux of 41.15 W/cm2) and achieve a total thermal resistance of 0.2053 °C/W under the premise of ensuring a safe junction temperature of chips below 85 °C.

Micro-encapsulation of a low-melting-point alloy phase change material and its application in electronic thermal management

The application of liquid metal (LM) with high thermal conductivity in electronic thermal management is an emerging hotspot, but leakage of LM can cause environmental pollution and lead to corrosion of electronic equipment, thereby affecting the safety of its operation. Moreover, large temperature fluctuation will be caused for the limited thermal storage capacity of LM. To solve the above problems, it is urgent to develop LM-based microcapsules with high thermal conductivity and high thermal storage capacity. Herein, a novel micro-encapsulated phase change material (MEPCM) with an internal void, composed of liquid metal Sn–Bi–In core and PMMA shell, was firstly fabricated via liquid phase micro-encapsulation method. The results showed that microcapsules maintained good morphology and efficient thermal storage capacity (246.46 J cm−3) after 300 thermal cycles, 97.12% of that before the cycle (253.77 J cm−3). Subsequently, the MEPCM-based composite was prepared by mixing MEPCM into thermal gel. The enthalpy of 50 wt% MEPCM composite was 126.72 J cm−3, and the thermal conductivity of it was 3.23 W m−1·K−1, while that of thermal gel was 0.98 W m−1·K−1. Then the 50 wt% MEPCM-based composite was applied for LED chip, and the temperature of chip was 71.1 °C, 11.2 °C lower than that of thermal gel. Therefore, MEPCM-based composites with high thermal conductivity and thermal storage capacity are considerably potential for electronic thermal management.

Effect of dry ice jet velocity on cooling characteristics of electronic chip based on optimized geometry

ABSTRACT Efficient chip cooling has become particularly important with the rapid development of high heat flux electronic chips. In this study, a cooling system for electronic chips using dry ice as the cooling medium is developed. The combination of jet impingement and phase change sublimation was employed to achieve efficient cooling by utilizing the Joule-Thomson effect to generate dry ice. The impact of the ratio of heatsink height to inlet diameter (H/D) and dry ice jet velocity on the heat transfer characteristics of the heatsink is investigated by theoretical calculations and experimental tests. The results showed that the optimal heat transfer coefficient was achieved when H/D was 4, 12.76% to 43.28% higher than other H/D values. The chip temperature could be maintained below 38.69°C, which was 8.79% to 36.62% lower than other H/D values, and the heat flux reached 428.92W/cm2. The chip temperature could be effectively regulated by controlling the dry ice flow rate. Furthermore, a comparison with other cooling methods indicated that the dry ice jet cooling system was more suitable for cooling high heat flux electronic devices. The research findings laid the foundation for dry ice cooling of high heat flux chips.

An experimental and FEM study on ultrasonic-assisted turning of titanium alloy

The increase in demand for aerospace parts leads to a need for effective and efficient machining methods to enhance the machinability of titanium alloys. This research investigates the effect of ultrasonic-assisted turning (UAT) on aerospace titanium alloy Ti-6Al-4V by varying cutting parameters. Ultrasonic turning experiments were conducted to investigate the reduction in cutting forces and tool wear at different cutting parameters with wear and surface roughness analysis. Consequently, a finite element model is used to simulate the ultrasonic turning of titanium to have a better understanding of the effect of UAT on stresses and temperature profiles in the process and help explain the results found experimentally. Separation time between the tool and chip was found to be inversely proportional to the cutting speed and the depth of cut with a reduction in cutting forces and surface roughness of up to 42.5% and 61.4%, respectively, for low cutting speed and depth of cut. Tool wear is also shown to decrease in the ultrasonic machining where adhesion-diffusion wear is reduced on the rake face due to separation in the tool-chip interface. The chip temperature was found to increase while the tool temperature is found to decrease with the motion of the tool.

Comparative evaluation of soybean oil-carnauba wax oleogel as an alternative to conventional oil for potato chips frying

Soybean oil was structured with carnauba wax to develop oleogels which were evaluated to fry potato chips as an alternative to deep fat frying with soybean oil. The frying conditions of chips were optimized using response surface methodology (RSM). The frying temperature (147 °C) and time (4 min) of chips were decided by assessing the physical properties of the chips (hardness, color and sensory attributes). Thereafter, a comparative study was carried out between chips fried in oil and oleogel. Compared to chips fried in oil, the chips fried in oleogel absorbed approximately 23% less oil. No negative impact on the sensory scores and fatty acid composition of the chips was observed. The peak force of oleogel fried chips was also insignificantly lower (255.7±17.5 g) than oil fried chips (314.2 ± 19.3 g). The appearance (color) of the oleogel fried chips was significantly better than chips fried in oil since oleogel chips had a higher lightness value (63.53 ± 3.94) than oil chips (53.59 ± 1.31). Moreover, the redness value of oleogel chips was also lower (-2.33 ± 0.47) than chips fried in oil (1.66 ± 0.49). However, significantly higher peroxide values were observed in oleogel fried chips during the storage study, which indicates its lower stability.

Facile strategy for constructing highly thermally conductive PVDF-BN/PEG phase change composites based on a salt template toward efficient thermal management of electronics

The miniaturization of electronic devices often gives rise to heat accumulation and sudden thermal shocks, which can pose risks to both the device and its users. To address this issue, a unique phase change composite (PCC) has been developed in this study to effectively withstand rapid thermal shocks. Specifically, a porous network comprising a robust skeleton of polyvinylidene fluoride (PVDF)/boron nitride (BN)) is constructed using the salt template approach. This network is then infused with polyethylene glycol (PEG) with a molar weight of 2000 g/mol, resulting in the formation of a PCC with a melting temperature of approximately 50 °C. The resulting PCC demonstrates exceptional stability, remarkable thermal conductivity (0.68 W/(mK)), and a high enthalpy (124.44 J/g). Even under continuous heating or extreme thermal shocks, the PCC can maintain the temperature of the electronic chip below 46.8 °C. The composite proposed in this study exhibits significant potential for the transient thermal management of electronic chips.

Modeling and Performance Analysis of a Pump-Driven Chip-Level Two-Phase Cooling System in Data Centers

As a powerful solution for heat dissipation in data centers, chip-level cooling continues to capture escalating attention in research and application domains. To accurately analyze system performance, identify potential avenues for system optimization, and inform future practical applications, we developed a steady-state, one-dimensional mathematical model for a novel pump-driven chip-level two-phase cooling system (PCTCS). This model was constructed based on our previous study and was confirmed against existing experimental data. Our simulations scrutinized PCTCS performance under default conditions and investigated the effects of key parameters, such as refrigerant type, condenser vertical positioning, and cooling water temperature. Results showed that the system could manage an 80 W power output from each CPU while maintaining CPU temperatures around 79 °C at a cooling water temperature of 45 °C. We discovered the choice of refrigerant had a significant impact on performance, with R32 outperforming R134a and R113. While the vertical position of the condenser influenced the PCTCS’s internal parameters, its overall impact on system performance was negligible. Moreover, provided the chip temperature remained within a safe range, our study found that increasing the cooling water temperature improved the energy efficiency ratio of the refrigerant pump and reduced the temperature difference between the chips and the cold source.

Vitrimer-Assisted Construction of Boron Nitride Vertically Aligned Nacre-mimetic Composites for Highly Thermally Conductive Thermal Interface Materials

Modern electronic equipment with high integration and power consumption levels urges for more effective thermal interface materials (TIMs) to tackle its increasingly severe cooling issues. To effectively transfer the heat generated by electronic components to the radiator, the TIM is supposed to have a high through-plane thermal conductivity (λ⊥); however, achieving that proved devilishly challenging. Herein, inspired by the structure of the natural shell nacre and based on the construction of a cis-polybutadiene (BR) vitrimer network with reversible B–O bonds, the nacre-mimetic microstructure with vertically aligned hexagonal boron nitride (BN) was rationally designed and fabricated. Combining the hot-pressed orientation with the stacking-welding method, the vertically aligned BN/BR composite (VAC) was obtained by longitudinal slicing, and the designed microstructure with intense orientation was verified by scanning electron microscopy and small-angle X-ray scattering. As a result, the VAC reached an unprecedented λ⊥ of 14.1 W·m–1·K–1 as the BN content was 52 vol %, and the running chip temperature was greatly reduced compared with that of commercial TIM. Besides the superior thermal conductivity, the BN/BR composite has excellent electrical insulation and flame resistance. It is believed that the simple fabrication and extendibility of the biomimetic composites pave a new way for the design and preparation of high-performance TIMs.

Numerical Simulation on Thermoelectric Cooling of Core Power Devices in Air Conditioning

Air conditioning has become a necessity in people’s daily life. The performance of the compressor determines the energy efficiency ratio of this electrical equipment, but the heat generated during the operation of its internal core power components will greatly limit its performance release, so it is urgent to carry out research on the heat dissipation of power devices. In this work, we explore the application of thermoelectric coolers (TECs) in the field of power device heat dissipation through finite element simulation. First, we geometrically modeled the structure and typical operating conditions of core power devices in air conditioners. We compared the temperature fields in air-cooling and TEC active cooling modes for high-power-consumption power devices in a 319 K operating environment. The simulation results show that in the single air-cooling mode, the maximum temperature of the 173.8 W power device reached 394.4 K, and the average temperature reached 373.9 K, which exceeds its rated operating temperature of 368.1 K. However, the maximum and average temperature of the power device dropped to 331.8 K and 326.5 K, respectively, at an operating current of 7.5 A after adding TECs, which indicates that TEC active cooling has a significant effect on the temperature control of the power device. Furthermore, we studied the effect of the TEC working current on the temperature control effect of power devices to better understand the reliability of the TECs. The results show that TECs have a minimum working current of 5 A, which means it has no significant cooling effect when the working current is less than 5 A, and when increasing the current to 10 A, the average temperature of the power device can be reduced to 292.9 K. This study provides a meaningful exploration of the application of TECs in chip temperature control and heat dissipation, providing a new solution for chip thermal management and accurate temperature control.

Simulation Study of Influencing Factors of Immersion Phase-Change Cooling Technology for Data Center Servers

The immersion phase-change cooling technology utilizes the latent heat of the cooling liquid to dissipate heat by directly contacting the cooling liquid with the heat-generating electronic chip, which can meet the cooling requirements of current high heat flux density data centers. In this paper, the effect of different factors on the heat dissipation performance of immersion phase-change cooling technology was explored through numerical simulation. The results show that, under certain power conditions, the inlet temperature and flow rate of the cooling water in the condensation module, as well as the different arrangement of servers, have a significant impact on the heat dissipation performance of the entire system. The inlet water temperature mainly affects the chip temperature after stabilization. With the decrease in the inlet temperature, the chip surface temperature decreases significantly. The inlet water flow rate mainly affects the time required for the heat exchange to reach the desired temperature. With the increase in the inlet flow rate, the required cooling time is shortened. As the spacing between servers increases, the thermal safety and stability of the entire system increase. When the spacing between servers increases from 5 mm to 15 mm, the highest temperature and the temperature uniformity coefficient between the systems decrease significantly. When the spacing increases from 15 mm to 25 mm, the highest temperature and the temperature uniformity coefficient decrease slightly. These results can provide useful information for the designers of immersion phase-change cooling systems to improve the cooling efficiency of data centers, save energy, and ensure the safe operation of related computers, servers, and communication systems.

Coupled Electrical–Thermal–Fluidic Multi-Physics Analysis of Through Silicon Via Pin Fin Microchannel in the Three-Dimensional Integrated Circuit

Abstract To solve the thermal management problem in the three-dimensional integrated circuit (3D-IC) with high integration and multilayer, this paper establishes a 3D-IC interlayer microchannel model with various embedded TSV micropin fins to explore the temperature distribution of chips and the flow velocity distribution inside the microchannel. The paper selects the sense amplifier and the half adder as the heat source of the memory and processor in the calculation model. The power densities of the sense amplifier and the half adder are 885 kW/m2 and 1.832 MW/m2 combined with the layout size, respectively. Meanwhile, the effects of the shape and arrangement of TSV micropin fins on the flow and heat transfer characteristics are investigated. The result shows that the 1.2:1 diamond micropin fin microchannel with staggered arrangement has the best overall flow and heat transfer performance. Compared with the basic circular micropin fin with the in-line arrangement, the average Nusselt number of this microchannel is improved by 3.20–3.37 times, and the maximum temperature of chips is controlled at 325.92–312.43 K for Re = 628–1819.