Charge Storage Devices Research Articles

Technology of a new n-channel one-transistor EAROM cell called SIMOS

The structure and technology of a new nonvolatile charge-storage device are described. The stacked-gate injection MOS (SIMOS) device is an n-channel MOS transistor with a control gate stacked on the floating gate. In the programming mode, electrons are accelerated by the channel drift field to energies high enough to overcome the barrier height of the Si-SiO 2 interface and so injected into the floating gate. On account of the channel-injection mechanism performed in the programming mode, channel lengths of less than 4 µm are required. A combination of this condition with the stacked-gate concept is achieved by a self-aligned technique which defines both polysilicon gates by a single photolithographic procedure. By means of the self-aligned technique, both the one-transistor EPROM cell and the one-transistor EAROM cell can be realized. Basic structures of the two different type one-transistor memory cells are the SIMOS transistor and the SIMOS tetrode, respectively. The technology of these two different SIMOS devices is described in detail and experimental results concerning charge accumulation, charge removal, and charge retention are reported.

Nonvolatile semiconductor memory devices

An attempt is made to survey and assess the nonvolatile semiconductor memory devices including charge-storage devices and FET's with ferroelectric gate insulators. The charge-storage devices are further divided into two groups: 1) charges-trapping devices such as the MNOS and the MAOS, and 2) floating-gate devices such as the FAMOS and the DDC. Approaches for achieving virtual nonvolatility in otherwise volatile semiconductor memories are briefly disscused. Novel structures which provide nonvolatility as well as the theoretical limit of memory array density are also explored.

Charge Storage MISFET Memory Devices

The critical processing parameters for fabricating MNOS nonvolatile charge storage devices are examined and methods for reliable process control are presented. A chemical technique has been found to be the best for preparing the ultra-thin gate oxide especially from the stand-point of reproducibility. This technique results in acceptable yields for LSI and facilitates the overall MNOS/LSI manufacturing process. Design and processing details for 256- and 2240-bit arrays are presented. The charge storage and transfer mechanism of the tunneling mode MNOS is analyzed in terms of device characteristics. A method for optimizing the gate dielectric structures is presented. P- and n-channel MAOS/LSI's, fabricated using pyrolytic aluminum oxide and tested via the tunneling and avalanche injection modes for charge storage, are described. The characteristics of three charge-storage MISFETs are summarized; these are the MNOS, MAOS and FAMOS devices. The advantages and disadvantages of these three device types are computed for nine different structures and operational modes.

Famos—A new semiconductor charge storage device

A new non-volatile charge storage device is described. The floating gate avalanche injection MOS (FAMOS) structure is a p-channel silicon gate field effect transistor in which no electric contact is made to the silicon gate. It combines the floating gate concept with avalanche injection of electrons from the surface depletion region of a p- n junction to yield reproducible charging characteristics with long term storage retention.

Effects of insulator thickness fluctuations on MNOS charge storage characteristics

The effects of insulator thickness fluctuations on the charge storage characteristics of MNOS direct tunneling devices were investigated, using capacitor structures carefully fabricated by depositing Si <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</inf> N <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">4</inf> layers on thermally grown SiO <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf> films. The oxide films were thin enough (∼27 Å) for the electron transfer due to electrical pulsing to occur via direct tunneling through them (the SiO <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf> films). Both the Si <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</inf> N <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">4</inf> and SiO <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf> layers were prepared deliberately with a thickness gradient across the silicon substrates, and the thickness of each dielectric was ellipsometrically profiled to within ±1 percent accuracy. In this way the effect of insulator thickness deviations from nominal values could be experimentally evaluated under virtually identical processing conditions. Experimental results in these capacitor specimens indicate that other things being equal, a small thickness fluctuation causes a significant flat-band potential spread (or an equivalent threshold voltage spread in actual MNOSFET structures) in the pulsed devices. In the range of practical interest for charge storage devices, this spread can be substantial if the thickness deviations exceed ±1 Å for the SiO <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf> films or, equivalently, ±40 Å for the Si <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</inf> N <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">4</inf> films. For a typical Al-Si <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</inf> N <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">4</inf> (400 Å)-SiO <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf> (20-25 Å)-Si structure, for example, a ±2 Å fluctuation can result in a 2- to 4-V spread of the Si flat-band potential after charging, depending on the pulse height used. In the microsecond range of switching time, such threshold spreads will reduce the so- called flat-band hysteresis window from 6 to 2 V typically-which is detrimental to device performance. A simple analysis is given to show that the thickness fluctuation effect in MNOSFET devices can be predicted semi-empirically, using the charging characteristics of a device having the nominal insulator thicknesses.

Growth of very thin oxide films on silicon for use in MNOS charge storage devices

Growth of very thin oxide films on silicon for use in MNOS charge storage devices

A fully decoded 2048-bit electrically programmable FAMOS read-only memory

A floating-gate avalanche-injection m.o.s. (FAMOS) charge-storage device is used as the basic nonvolatile memory element. The memory is organized as 256 words of 8 bits, it is fully TTL compatible, and can be operated in both the static or dynamic mode. The memory array was successfully fabricated with silicon gate m.o.s. technology yielding functional devices with access times of 800 ns in the static mode and 500 ns in the dynamic mode of operation. The memory chip is assembled in a 24-lead dual-in-line package.

Electrical characteristics of AlN insulating films in the thickness range 40 to 150Å

AlN insulating films prepared by nitriding freshly deposited aluminum films in a nitrogen glow discharge have sufficiently nonlinear current-voltage characteristics to be of possible use to charge-storage devices. The current-voltage-insulator thickness relationships of capacitor structures Al-AlN-Au relevant to this application are presented.

Applications of a semiconductor-surface-state charge-storage device

Several possible applications of a new two-terminal semiconductor device which utilizes surface phenomena to produce a charge-storage effect are described. The major advantage of the device lies in the magnitude of the charges which can be stored and the ease with which it can be controlled by small bias currents.