Transistor Characteristics Research Articles

Growth and mobility characterization of N-polar AlGaN channel high electron mobility transistors

All-AlGaN based high electron mobility transistors (HEMTs) are promising for increasing the power density in both RF and power devices, improving overall efficiency. Nitrogen (N) polar GaN/AlGaN HEMTs offer lower contact resistance compared to its metal-polar counterpart. In this work, we report the metal organic chemical vapor deposition (MOCVD)-based growth of N-polar AlGaN channel HEMT structures with a varying Al mole fraction in the AlxGa1−xN channel (x = 20%, 30%, 59%, and 73%). We confirmed the high-quality morphology and the Al composition of the grown structures using atomic force microscopy and x-ray diffraction spectra, respectively. We measured a mobility of ∼160 cm2/(V.s) in our N-polar AlGaN HEMT stack (20% Al in the channel) structure and found an alloy-scattering dominated transport with increasing Al mole fraction, further supported by our simulations that consider both alloy-scattering and optical phonon-scattering mechanisms. From 20% to 59% Al composition, we found a decreasing trend in mobility while for 59%–73% Al composition in the channel, both the simulated and the experimental mobility showed a nearly saturating trend. The structures were then fabricated into HEMTs with Al0.20Ga0.80N (channel)/Al0.59Ga0.41N (barrier), showing 320 mA/mm drain current for a 4 μm long-channel device.

Preparation and electrical characteristics of transparent thin film transistors with sputtered aluminum and phosphorus co-doped indium-zinc-oxide channel layer

Thin film transistors (TFTs) with aluminum and phosphorus co-doped indium-zinc-oxide (IZO:Al,P) channel layer were fabricated by the radio frequency (RF) magnetron sputtering. The IZO:Al,P films were amorphous and highly transparent with exceed 80% transmittance in visible region. High performance IZO:Al,P TFTs have been observed due to the incorporation of Al and P, which serve as an inhibitor against oxygen vacancies and carrier. The electrical properties of IZO:Al,P TFTs were investigated as function of annealing temperatures. The IZO:Al,P TFTs have achieved superior performance (threshold voltage (VTH) of 0.8 V, on-state current (ION) of 1.6 × 10-3 A, off-state current (IOFF) of 2.2 × 10-12 A, µSAT of 39.2 cm2/V∙s and subthreshold swing (S.S.) of 0.68 V/dec.) under the annealing temperature as low as 300 °C.

Improved electrical characteristics of AlxGa1−xN/GaN High Electron Mobility Transistor by effect of physical and geometrical parameters

This research aims to study the impact of some physical and structural parameters on the I–V characteristics of a high electron mobility transistors (HEMTs) based on AlxGa1-x N/GaN, we investigate the effect of the GaN buffer layer thickness and the impact of other properties of the materials such as aluminum mole fraction and doping concentration, the Al0.2Ga0.8 N/GaN heterostructures with 400 nm of buffer layer and a layer doped with n = 4 x 1018 cm-3 , for this structure we find the maximum saturation current of 420 mA/mm . The proposed model included GaN buffer layer and Al content were derived from our developed I-V characteristics. The proposed model is in excellent agreement with the simulated I-V characteristics and experimental results.

Switchless Dual-Power-Mode Fully Differential HBT Power Amplifier for Mobile Applications

This study proposes a switchless dual-power-mode (DPM) power amplifier (PA), which operates independently in high-powermode (HPM) and low-power mode (LPM) to improve the efficiency. The DPM PA optimizes the output impedances using bias control of the PA and the proposed bidirectional output matching structure with a transformer (TF) for each power mode with no switches for isolation between the LPM and the HPM with high passive efficiency. The proposed output structure realizes a high impedance in the nonoperating mode network to ensure that the operating mode network realizes the optimal impedance by utilizing bidirectional matching of the off characteristics of transistors and TF output for each mode. The differential DPM PA is implemented using a 2- <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu \mathrm{m}$</tex-math> </inline-formula> InGaP/GaAs heterojunction bipolar transistor (HBT) process on a nine-layer printed circuit board with low insertion loss to demonstrate the proposed structure. The HPM and LPM, operating independently, achieved the gains of 24–25.5 and 11.4–12.9 dB and the saturated output power of 34.2–34.8 and 23.2–23.5 dBm, with a peak power-added efficiency (PAE) of 44.4%–49% and 32%–34.4%, respectively, under a continuous-wave (CW) signal test of over 5.15–5.925 GHz. The proposed PA error vector magnitude (EVM) is tested with 160 MHz of a 64-quadrature amplitude modulator (QAM) signal and achieves the average output powers of 24.5 and 14 dBm (EVM <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$=$</tex-math> </inline-formula> <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$ -$</tex-math> </inline-formula> 32 dB) and a PAE of 10.5% and 10.1% for HPM and LPM with digital predistortion, respectively.

Layer‐Dependent Optical Modulation and Field‐Effect‐Transistor in Two‐Dimensional 4H‐SnS2 Layers

AbstractTwo–dimensional (2D) 4H‐polytype tin disulfide (SnS2) flakes are synthesized using the chemical vapor transport technique. The weak Van der Waals force between the 2D SnS2 layers offers an easy exfoliation of flakes down to a bilayer of thickness ≈2.02 (±0.1) nm using a mechanical exfoliation technique. The optical and field effect transistor (FET) characteristics of the exfoliated 2D 4H‐SnS2 layers are studied. The exfoliated layers are used to fabricate the ≈13‐layered SnS2 FET. The 4H‐SnS2 exhibits a high on/off ratio of ≈106 and mobility ≈1–4 cm2 V−1 s−1. The low mobility of the 4H‐SnS2 FET devices shows an insulating state concordant with the 2D Motts variable range hopping mechanism at varying temperatures. Moreover, it is found that the optical bandgap of the 2D SnS2 single‐crystal layers is largely widened for the bilayers and tri‐layers. The optical bandgap energies vary in the range of 2.56–1.99 eV. The significant alteration in bandgap energies of ≈0.57 eV offers downscaling of the 2D nanoscale semiconducting devices. Such layer‐sensitive changes in optical transmittance, absorbance, and bandgap energies are reflected in Commission Internationale de L'Eclairage (CIE) chromaticity, showing the distinct color of transmittance through various 2D 4H‐SnS2 layers.

Metal‐Organic Framework Thin Films Grown on Functionalized Graphene as Solid‐State Ion‐Gated FETs

AbstractThe unique properties of 2D‐materials like graphene are exploited in various electronic devices. In sensor applications, graphene shows a very high sensitivity, but only a low specificity. This shortcoming can be mastered by using heterostructures, where graphene is combined with materials exhibiting high analyte selectivities. Herein, this study demonstrates the precise deposition of nanoporous metal‐organic frameworks (MOFs) on graphene, yielding bilayers with excellent specificity while the sensitivity remains large. The key for the successful layer‐by‐layer deposition of the MOF films (SURMOFs) is the use of planar polyaromatic anchors. Then, the MOF pores are loaded with ionic liquid (IL). For functioning sensor devices, the IL@MOF films are grown on graphene field‐effect transistors (GFETs). Adding a top‐gate electrode yields an ion‐gated GFET. Analysis of the transistor characteristics reveals a clear Dirac point at low gate voltages, good on‐off ratios, and decent charge mobilities and densities in the graphene channel. The GFET‐sensor reveals a strong and selective response. Compared to other ion‐gated‐FET devices, the IL@MOF material is relatively hard, allowing the manufacturing of ultrathin devices. The new MOF‐anchoring strategy offers a novel approach generally applicable for the functionalization of 2D‐materials, where MOF/2D‐material hetero‐bilayers carry a huge potential for a wide variety of applications.

Towards Nonvolatile Spintronic Quaternary Flip-Flop and Register Design

The exciting properties of multi-valued logic (MVL) in overcoming the limitations of binary systems have led to widespread research on this topic. Considering various types of MVL, quaternary logic is more compatible with the existing binary systems. This paper proposes a nonvolatile quaternary flip-flop (NQFF) based on the unique features of the carbon nanotube field-effect transistors (CNTFETs) and magnetic tunnel junctions (MTJs). The proposed NQFF utilizes Spin-Hall effect (SHE)-assisted spin-transfer torque (STT) MTJs to provide nonvolatility with lower write energy, and multi-Vt gate-all-around (GAA) CNTFETs offer higher performance. On the other side, due to the usage of a shadow latch and the design of the proposed circuit, the delay of MTJ switching does not affect the delay of the whole circuit. The simulation results show that the proposed NQFF offers 50% lower PDP when the system is idle for only 25% of its total operational time.

ПОДВИЖНОСТЬ НОСИТЕЛЕЙ ЗАРЯДА ВДОЛЬ ГРАНИЦЫ РАЗДЕЛА ПОЛИМЕР/ПОЛИМЕР

Organic thin-film transistors are increasingly being used in various electronic devices, successfully replacing transistors on silicon and other traditional semiconductors. The advantages of such electronic devices are particularly noticeable in the development of flexible electronic devices. However, one of the intractable problems of organic devices is the low mobility of charge carriers, often not exceeding 10-3 cm2/Vs. Obviously, this significantly limits the scope of their application. In this paper, a new approach to the formation of a transport layer in an organic field-effect transistor is proposed. This approach is based on the use of anomalous transport properties occurring along the interface of two dielectrics. Along such a boundary, a layer of quasi-two-dimensional electron gas with abnormally large values of conductivity and mobility of charge carriers can occur. In this regard, polymer heterostructures representing a field-effect transistor with a transport layer made in the form of an interface between two films of an unconjugated (dielectric) polymer, polydiphenylene phthalide, were investigated in this work. Along such a boundary, a layer of quasi-two-dimensional electron gas with abnormally large values of conductivity and mobility of charge carriers can occur. In this regard, polymer heterostructures representing a field-effect transistor with a transport layer made in the form of an interface between two films of an unconjugated (dielectric) polymer, polydiphenylene phthalide, were investigated in this work. The paper describes the technology of creating a multielectrode device. Polymer films were made by centrifugation from a polymer solution in cyclohexanone. The metal electrodes were manufactured by thermal deposition in vacuum. Measurements of the electrophysical characteristics of an organic field-effect transistor have been carried out. It is established that the main charge carrier along the interface are electrons. Estimates of the mobility of charge carriers were carried out using two different techniques. At zero potential at the gate, an injection model of currents limited by a volumetric charge was used. In the presence of a potential on the gate, the mobility assessment was made within the framework of the field effect model. Comparison of the obtained estimates showed satisfactory agreement of the mobility values. From this fact, it was concluded that it is possible to use an injection model to estimate the mobility of charge carriers when they move along the polymer/polymer interface.

Modeling the Impact of Phonon Scattering with Strain Effects on the Electrical Properties of MoS2 Field-Effect Transistors.

Molybdenum disulfide (MoS2) has distinctive electronic and mechanical properties which make it a highly prospective material for use as a channel in upcoming nanoelectronic devices. An analytical modeling framework was used to investigate the I-V characteristics of field-effect transistors based on MoS2. The study begins by developing a ballistic current equation using a circuit model with two contacts. The transmission probability, which considers both the acoustic and optical mean free path, is then derived. Next, the effect of phonon scattering on the device was examined by including transmission probabilities into the ballistic current equation. According to the findings, the presence of phonon scattering caused a decrease of 43.7% in the ballistic current of the device at room temperature when L = 10 nm. The influence of phonon scattering became more prominent as the temperature increased. In addition, this study also considers the impact of strain on the device. It is reported that applying compressive strain could increase the phonon scattering current by 13.3% at L = 10 nm at room temperature, as evaluated in terms of the electrons' effective masses. However, the phonon scattering current decreased by 13.3% under the same condition due to the existence of tensile strain. Moreover, incorporating a high-k dielectric to mitigate the impact of scattering resulted in an even greater improvement in device performance. Specifically, at L = 6 nm, the ballistic current was surpassed by 58.4%. Furthermore, the study achieved SS = 68.2 mV/dec using Al2O3 and an on-off ratio of 7.75 × 104 using HfO2. Finally, the analytical results were validated with previous works, showing comparable agreement with the existing literature.

Performance comparison of vertically stacked nanosheet CFET and standard CMOS without and with parasitic channels

The threshold voltage regulation and the effect of parasitic channels are important issues in CFET. In this paper, the characteristics of the complementary field-effect transistor (CFET) were simulated based on a self-aligned vertically stacked nanosheet fabrication process at the 2 nm technology node by TCAD simulation. The electrical characteristics of CFET were matched by adjusting the metal work function. We analyzed the static characteristics and transient response, as well as the impact of the parasitic channel. Compared to standard CMOS with the same process, the switching threshold and noise margin of CFET are approximately equal to CMOS, but the power and speed are slightly better than CMOS because nFET and pFET of CFET share the same gate to have small parasitic capacitance. With the height of the parasitic channel increasing, the off-state current and parasitic capacitance of the device increase, but CFET suppresses the bad effect of the parasitic channel and changes less. CFET with the stacked nanosheet structure has greater advantages than CMOS, can tolerate the parasitic channel from the fabrication process, and improve performance in the perspective of front-end-of-line (FEOL).

Improved Electrical Characteristics of Field Effect Transistors with GeSeTe-Based Ovonic Threshold Switching Devices.

Hyper-field effect transistors (hyper-FETs) are crucial in the development of low-power logic devices. With the increasing significance of power consumption and energy efficiency, conventional logic devices can no longer achieve the required performance and low-power operation. Next-generation logic devices are designed based on complementary metal-oxide-semiconductor circuits, and the subthreshold swing of existing metal-oxide semiconductor field effect transistors (MOSFETs) cannot be reduced below 60 mV/dec at room temperature owing to the thermionic carrier injection mechanism in the source region. Therefore, new devices must be developed to overcome these limitations. In this study, we present a novel threshold switch (TS) material, which can be applied to logic devices by employing ovonic threshold switch (OTS) materials, failure control of insulator-metal transition materials, and structural optimization. The proposed TS material is connected to a FET device to evaluate its performance. The results demonstrate that commercial transistors connected in series with GeSeTe-based OTS devices exhibit significantly lower subthreshold swing values, high on/off current ratios, and high durability of up to 108.

Improved characteristics of MoS2 transistors with selective doping using 1,2-dichloroethane

We demonstrate area-selective doping of MoS2 field-effect transistors using 1,2-dichloroethane (DCE) solution. In the device manufacturing process, area-selective chemical doping was used to implement contact engineering in the source/drain region. X-ray photoelectron spectroscopy (XPS) and Raman spectroscopy measurements were performed to confirm the blocked layer (BL) using a photoresist, which suppressed the doping effect of the DCE treatment. In the XPS results, the main core level of the MoS2 flake with BL did not shift, whereas that of the MoS2 flake without BL changed by approximately 0.24 eV. In the case of the MoS2 flakes with a BL, the vibrational modes of the Raman scattering did not shift. Conversely, the two Raman peaks of the MoS2 flake without BL red-shifted because of increasing electron–phonon scattering. The effect of area-selective doping was confirmed by electrical measurements. The field-effect mobility and the subthreshold swing were enhanced from 4.07 to 31.5 cm2 (V s)−1 and from 1.26 to 0.401 V/decade, respectively.

Graphene-based field-effect transistors for biosensing: where is the field heading to?

Two-dimensional (2D) materials hold great promise for future applications, notably their use as biosensing channels in thefield-effect transistor (FET) configuration. On the road to implementing one of the most widely used 2D materials, graphene, in FETs for biosensing, key issues such as operation conditions, sensitivity, selectivity, reportability, and economic viability have to be considered and addressed correctly. As the detection of bioreceptor-analyte binding events using a graphene-based FET (gFET) biosensor transducer is due to either graphene doping and/or electrostatic gating effects with resulting modulation of the electrical transistor characteristics, the gFET configuration as well as the surface ligands to be used have an important influence on the sensor performance. While the use of back-gating still grabs attention among the sensor community, top-gated and liquid-gated versions have started to dominate this area. The latest efforts on gFET designs for the sensing of nucleic acids, proteins and virus particles in different biofluids are presented herewith, highlighting the strategies presently engaged around gFET design and choosing the right bioreceptor for relevant biomarkers.

Achieving ideal transistor characteristics in conjugated polymer semiconductors.

Organic thin-film transistors (OTFTs) with ideal behavior are highly desired, because nonideal devices may overestimate the intrinsic property and yield inferior performance in applications. In reality, most polymer OTFTs reported in the literature do not exhibit ideal characteristics. Supported by a structure-property relationship study of several low-disorder conjugated polymers, here, we present an empirical selection rule for polymer candidates for textbook-like OTFTs with high reliability factors (100% for ideal transistors). The successful candidates should have low energetic disorder along their backbones and form thin films with spatially uniform energetic landscapes. We demonstrate that these requirements are satisfied in the semicrystalline polymer PffBT4T-2DT, which exhibits a reliability factor (~100%) that is exceptionally high for polymer devices, rendering it an ideal candidate for OTFT applications. Our findings broaden the selection of polymer semiconductors with textbook-like OTFT characteristics and would shed light upon the molecular design criteria for next-generation polymer semiconductors.

Validation of IC Conducted Emission and Immunity Models Including Aging and Thermal Stress

Environmental factors, such as aging and thermal stress, can seriously impact the electromagnetic compatibility behavior of an integrated circuit (IC). The standardized IC emission model for conducted emission (ICEM-CE) and IC immunity model for conducted immunity (ICIM-CI) can be used in industry to predict electromagnetic behavior at the IC and the printed circuit board level. However, these do not take into account the effect of aging and extreme temperature variations. In this article, a custom IC designed in silicon-on-insulator technology, containing several independent analog blocks, is used to characterize the influence of aging and temperature on conducted emission and immunity through measurements and transistor-level simulations. The highly accelerated temperature and humidity stress test (HAST) was performed to evaluate aging and its influence on IC parameters. The results show that the passive distribution network is only influenced by thermal stress and not HAST aging. The latter mainly affects the active elements in the IC and reduces the conducted emission and immunity levels through intrinsic permanent degradation mechanisms. Furthermore, thermal stress mainly causes drifts in the transistor characteristics (such as threshold voltage and effective mobility), which affect the conducted emission and immunity levels and resulting in soft failures. All drifts/tolerances collected from measurements and simulations are characterized in a way that makes it possible to include them in potential future versions of the ICEM-CE and ICIM-CI standards.

Field-effect bulk mobilities in polymer semiconductor films measured by sourcemeters.

Semiconducting polymers inherently exhibit polydispersity in terms of molecular structure and microscopic morphology, which often results in a broad distribution of energy levels for localized electronic states. Therefore, the bulk charge mobility strongly depends on the free charge density. In this study, we propose a method to measure the charge-density-dependent bulk mobility of conjugated polymer films with widely spread localized states using a conventional field-effect transistor configuration. The gate-induced variation of bulk charge density typically ranges within ±1018cm-3; however, this range depends significantly on the energetic dispersion width of localized states. The field-effect bulk mobility and field-effect mobility near the semiconductor-dielectric interface along with their dependence on charge density can be simultaneously extracted from the transistor characteristics using various gate voltage ranges.

Modeling of Electrical Characteristics of Thin-Film Transistors Based P3HT:ZnO Blend: Channel Length Layer Effect

Modeling of Electrical Characteristics of Thin-Film Transistors Based P3HT:ZnO Blend: Channel Length Layer Effect

Dynamic IGBT Three-Dimensional Thermal Network Model Considering Base Solder Degradation and Thermal Coupling Between IGBT Chips

With the development of power electronic technology, the thermal characteristics of high-power insulated gate bipolar transistor (IGBT) module are vital information for thermal management of power electronic equipment, reliability analysis, and thermal design of power electronic system. However, the present commonly used lumped thermal network model based on thermal resistance and heat capacity still has some limitations in accurately predicting the junction temperature of IGBT modules, significantly once considering the degradation of base solder in high-power IGBT modules. In this paper, the thermal behavior of high-power IGBT chips under different base solder degradation is studied by the finite element method (FEM). The results show that the degradation of the base solder has effects on the thermal impedance between the junction and the case, which should be fastidiously thought about within the thermal network model modeling. As a result, a dynamic three-dimensional thermal network model that takes into account the thermal interaction between IGBT chips, as well as the degradation of the base solder, is proposed in this paper. The proposed thermal network model can estimate the junction temperature of a high-power IGBT module correctly and fast based on the real degradation of the base solder. Finally, finite element simulation and experimental findings are used to validate the proposed dynamic three-dimensional thermal network model. The results show that the dynamic three-dimensional thermal network model has comparable accuracy to finite element simulation and test results. At the same time, the dynamic three-dimensional thermal network model responds faster than the finite element simulation.

Fine-Tunable Emission Pulse Generation Circuit Based on p-Type Low-Temperature Poly-Si Thin-Film Transistors for Active Matrix Organic Light-Emitting Diode Displays

Active matrix organic light-emitting diode (AMOLED) displays have deployed the compensation techniques to cope with the luminance non-uniformity issues caused by variations on electrical characteristics of thin-film transistors (TFTs). While some compensation circuits require control signals of longer pulse widths than a line time, the luminance control as well as the higher bit depth representation have been also accomplished by adjusting the pulse widths. A proposed EM pulse generation circuit consists of 11 p-type low-temperature poly-Si (LTPS) TFTs and a one coupling capacitor. While previous tunable circuits could address pulse widths of either even or odd multiples of a line time, the proposed circuit can generate any multiples by changing phases of additional clock signals. In particular, the internal inverter is implemented with a load connected to the output of a previous stage’s inverter to reduce the power consumption over pulse widths. The coupling capacitor is also connected between two adjacent stages through one TFT, eliminating coupling noises on the output pulses. The proposed EM circuit is simulated at a line time of 3.8 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu$</tex-math> </inline-formula> s for a 120 Hz <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\text{3840}$</tex-math> </inline-formula> <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\times $</tex-math> </inline-formula> <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\text{2160}$</tex-math> </inline-formula> display. The results ensure that pulse widths from three to 2160 lines are generated successfully without coupling noises and the small variation on power consumption from 1.23 to 0.33 mW is achieved at 30 stages for the whole range of pulse widths, compared to the large range from 1.26 to 76.91 mW with the inverter of a diode-connected load.

Fabrication and characterization of field-effect transistors based on MoS2 nanotubes prepared in anodic aluminum oxide templates

Field-effect transistors (FETs) based on MoS2 nanotubes prepared in anodic aluminum oxide (AAO) templates have been fabricated and demonstrated in this work. MoS2 nanotubes were prepared by the thermal decomposition of (NH4)2MoS4 precursors in the AAO template. The diameter of the MoS2 nanotubes was approximately 80 nm, which corresponded to the size of the AAO template. Schottky-type FETs were prepared with Au and Pt electrodes, and the FETs exhibited n-type behavior, with on/off ratios that exceeded 103 at VSD = 0.5 V.