Characteristics Of Tunneling Diodes Research Articles

Challenges and Progress in the Fabrication of Silicon Nanowire Tunnel Diodes

Tunnel (Esaki) diodes prepared in silicon (Si) nanowires could provide a unique platform to investigate band-to-band tunneling (BTBT) transport in nanoscale. However, the successful fabrication of these devices poses substantial challenges, related to controlling high doping concentrations, maintaining the abruptness of the pn junction, and minimizing roughness due to nanoscale patterning. This paper comprehensively addresses these challenges, suggesting potential strategies for optimization. Additionally, examples of nanoscale diodes fabricated so far in silicon-on-insulator (SOI) substrates are showcased, highlighting their tunnel-diode characteristics at low temperatures. Furthermore, the underlying physics is discussed: phonon-assisted tunneling, single-charge tunneling and donor-acceptor compensation. For practical applications, such as photodetectors or tunnel field-effect transistors, room-temperature operation is also required.

Physics Based RTD Model Accounting for Space Charge and Phonon Scattering Effects

This paper presents a fully analytical model for the current-voltage (I–V) characteristics of Resonant Tunneling Diodes. Based on Tsu-Esaki formalism, we consider the full electrical potential distribution in the structure, including the space charge regions at the emitter and collector layers. In addition, we account for the scattering suffered by carriers when tunneling through the double-barrier region, as a function of the applied bias voltage. These considerations improve the accuracy of the proposed model when compared with other approaches while keeping it physics based and fully analytical. Finally, the model is validated with experimental and numericaldata, demonstrating its feasibility for applications in circuit simulation environments.

Analytical Physics-Based Compact Current–Voltage Model for 2D-2D Resonant Tunneling Diodes

In this paper, we develop an analytical model for the resonant current-voltage ( <bold xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">I–V)</b> characteristics of 2D-2D Resonant Tunneling Diodes. Starting from the Tsu-Esaki formalism, we consider the overall electrical potential distribution in the device layer structure, including the quantized space charge region in the emitter layer. Additionally, to obtain a more realistic model, we also take into account the scattering experienced by electrons during tunneling process through the double barrier region. These additional features greatly improve the accuracy of the proposed model when compared with others approaches reported in the literature. The device model is fully physics-based, allowing the computation of the <bold xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">I-V</b> curve accordingly to the geometry and device structure of the RTD. The model is fully analytical and explicit, thereby well suited for circuit simulator environment. The model is validated against experimental data from distinct RTDs structures, providing excellent agreement.

Heterostructure of TiO2 and macroporous silicon: The simplest relaxation oscillator

A heterostructure composed of TiO 2 and macroporous silicon in this study may represent the simplest relaxation oscillator ever reported. It consisted of macroporous Si with TiO 2 grown on its pore walls, and metallic contacts. This is also the first relaxation oscillator of its kind. Such oscillators are commonly formed by a capacitor or an inductor and a feedback loop with a switching device operating with a threshold voltage. The dielectric characteristics of TiO 2 (capacitive behavior) in combination with the tunnel diode characteristics of the heterostructure (presenting a negative differential resistance, when activated at a threshold voltage) are shown to give rise to the relaxation oscillations. • The present device represents the simplest relaxation oscillator ever reported, and the first one of TiO 2 and Si. • The key characteristic of the device in order to obtain oscillations is that it behaves as tunnel diode. • Metal Assisted Chemical Etching of Si followed by TiO 2 deposition by hydrothermal synthesis is the simple procedure to prepare the device.

Negative differential resistance characteristics of GaN-based resonant tunneling diodes with quaternary AlInGaN as barrier

AlInGaN lattice-matched to GaN is proposed as a barrier for double-barrier single quantum well structure resonant tunneling diodes (RTDs), and it achievesnearly strain-free RTD with low In composition and thereby relatively high manufacturability. Compared with the lattice-matched ternary Al0.83In0.17N/GaN RTD, three lattice-matched InAlGaN/GaN RTD samples exhibit peak current density J P over 20 times larger than that of the lattice-matched ternary RTD in numerical simulations. Simultaneously, two shallow defect levels (E 1 = 0.351 eV, E 2 = 0.487 eV) are considered at the RTD heterointerface to reveal the I–V characteristics under different defect densities. Negative differential resistance characteristics of the three quaternary RTDs are still available even though the defect density is up to ∼1018 cm−3, while that of the lattice-matched ternary RTD almost disappears when the defect density is ∼1017 cm−3 as a result of the lager ionization rate. Further, we introduce a deep-level defect E t = 1 eV at the heterointerface and perform multiple forward voltage sweeps. Simulations show that the quaternary RTD samples have better reproducibility in spite of the defect density being 100 times larger than that of the lattice-matched ternary RTD. This work illustrates that InAlGaN can provide greater flexibility for the design and fabrication of GaN-based RTDs.

Superior Peak to Valley Current Ratio of the InAs/Gasb Core-Shell Nanowires for Tunnel Diode Application

Raising transistors density led by scaling is responsible for the increase of the power consumption. Consequently, the supply voltage scaling is a strong issue in recent years. Tunnel diode is considered as one of the potential candidate for low power applications. In this respect, the broken-gap InAs/GaSb heterostructure which has narrow bandgap and small effective mass that increase interband tunneling probability to use to fabricate the core-shell nanowires for low power tunnel diode application. Peak to valley current ratio (PVCR) of negative differential resistance is a property which occurs in tunnel diode to determine the amplification of an AC signal ability. We demonstrate an intensive negative differential resistance phenomenon and PVCR in InAs/GaSb core-shell nanowires device. The tunnel diode characteristics display a higher peak to valley current ratio of 8.69 at VDD= 0.32 V. Among all published literature, our result show a record high PVCR to the author’s best knowledges. InAs/GaSb core-shell nanowires are promising candidate for low power high switching speed application.

Novel Asymmetric Recessed-Gate/Source Architecture Advancement of Dual-Metal-Gate SiGe/Si Dopingless Nanowire-TFET for Low-Voltage Performance Optimization

A dopingless vertical Nanowire (NW) Tunnel Field Effect Transistor TFET structure has been designed using techniques such as Dual-Metal Gate (DMG), Heteromaterial Channel (HmC) and Heterodielectric Oxide (HdO) to enhance the device performance. The proposed device is investigated to acknowledge the device behavior for RF/Low-Noise applications. The essence of the reported work is to capture the effect of work function variation of DMG on device characteristics for noise enhancement/degradation. The vertical structure simplifies the implementation of charge-plasma technique for induced doping within the source/drain region enveloped by Gate-All-Around (GAA) architecture. Different work function combinations of gate metal1 (GM1) and gate metal2 (GM2) are used for calculations and compared to acquire optimized results. Other than Silicon, Silicon-Germanium compound (SixGe1-x) with composition factor (x) equals to 0.55 is used for HmC, whereas Zirconium Silicate is preferred for HdO. The characteristics analysis includes the negative drain bias variation that captures an interesting tunnel diode characteristics with peak current to valley current ratio of approx. 108. The proposed structure is modified to reduce the Gate-to-Source capacitive coupling and drain current enhancement. The proposed device is analyzed for Ambipolar-state, OFF-state and ON-state, which is required to understand the proper working of TFET devices.

Development and Study of the p–i–n GaAs/AlGaAs Tunnel Diodes for Multijunction Converters of High-Power Laser Radiation

The creation of connecting tunnel diodes with a peak tunneling-current density higher than the density of the short-circuit current of photoactive p–n junctions is an important task in the development of multijunction photoconverters (III–V) of high-power optical radiation. Basing on numerical simulation of the J–U characteristics of tunnel diodes, a method is proposed for increasing the peak tunneling-current density by including a thin undoped i-type layer with a thickness of several nanometers between degenerate layers of the tunnel diode. The p–i–n-GaAs/Al0.2Ga0.8As structures of the connecting tunnel diodes with a peak tunneling-current density of up to 200 A/cm2 are grown by molecular-beam epitaxy.

Tunnel Diodes Based on n+-Ge/p+-Si(001) Epitaxial Structures Grown by the Hot-Wire Chemical Vapor Deposition

n+-Ge/p+-Si(001) epitaxial structures are grown by hot-wire chemical vapor deposition from GeH4 at a low substrate temperature (~325°C). Prototype tunnel diodes allowing for monolithic integration into Si-based integrated circuits are formed based on these structures. Doping of the n+-Ge layers with a donor impurity (P) to a concentration of >1 × 1019 cm–3 is performed via the thermal decomposition of GaP. Distinct regions of the negative differential resistance are observed in the current–voltage characteristics of tunnel diodes.

Туннельные диоды на базе эпитаксиальных структур n-=SUP=-+-=/SUP=--Ge/p-=SUP=-+-=/SUP=--Si(001), выращенных методом горячей проволоки

Abstractn ^+-Ge/ p ^+-Si(001) epitaxial structures are grown by hot-wire chemical vapor deposition from GeH_4 at a low substrate temperature (~325°C). Prototype tunnel diodes allowing for monolithic integration into Si-based integrated circuits are formed based on these structures. Doping of the n ^+-Ge layers with a donor impurity (P) to a concentration of &gt;1 × 10^19 cm^–3 is performed via the thermal decomposition of GaP. Distinct regions of the negative differential resistance are observed in the current–voltage characteristics of tunnel diodes.

Theoretical investigation into negative differential resistance characteristics of resonant tunneling diodes based on lattice-matched and polarization-matched AlInN/GaN heterostructures

In this work, we report an investigation of resonant tunneling diodes (RTDs) with lattice-matched and polarization-matched AlInN/GaN heterostructures using the numerical simulation. Compared with the lattice-matched AlInN/GaN RTDs, the RTDs based on polarization-matched AlInN/GaN hetero-structures exhibit symmetrical conduction band profiles due to eliminating the polarization charge discontinuity, which achieve the equivalence of double barrier transmission coefficients, thereby the relatively high driving current, the high symmetry of current density, and the high peak-to-valley current ratio (PVCR) under the condition of the positive and the negative sweeping voltages. Simulations show that the peak current density approaches 1.2 × 107 A/cm2 at the bias voltage of 0.72 V and the PVCR approaches 1.37 at both sweeping voltages. It also shows that under the condition of the same shallow energy level, when the trap density reaches 1 × 1019 cm−3, the polarization-matched RTDs still have acceptable negative differential resistance (NDR) characteristics, while the NDR characteristics of lattice-matched RTDs become irregular. After introducing the deeper energy level of 1 eV into the polarization-matched and lattice-matched RTDs, 60 scans are performed under the same trap density. Simulation results show that the degradation of the polarization-matched RTDs is 22%, while lattice-matched RTDs have a degradation of 55%. It can be found that the polarization-matched RTDs have a greater defect tolerance than the lattice-matched RTDs, which is beneficial to the available manufacture of actual terahertz RTD devices.

Radial tunnel diodes based on InP/InGaAs core-shell nanowires

We report on the fabrication and characterization of radial tunnel diodes based on InP(n+)/InGaAs(p+) core-shell nanowires, where the effect of Zn-dopant precursor flow on the electrical properties of the devices is evaluated. Selective and local etching of the InGaAs shell is employed to access the nanowire core in the contact process. Devices with an n+-p doping profile show normal diode rectification, whereas n+-p+ junctions exhibit typical tunnel diode characteristics with peak-to-valley current ratios up to 14 at room temperature and 100 at 4.2 K. A maximum peak current density of 28 A/cm2 and a reverse current density of 7.3 kA/cm2 at VSD = −0.5 V are extracted at room temperature after normalization with the effective junction area.

Atomic-scale Authentication with Resonant Tunneling Diodes

ABSTRACTThe room temperature electronic characteristics of resonant tunneling diodes (RTDs) containing AlAs/InGaAs quantum wells are studied. Differences in the peak current and voltages, associated with device-to-device variations in the structure and width of the quantum well are analyzed. A method to use these differences between devices is introduced and shown to uniquely identify each of the individual devices under test. This investigation shows that quantum confinement in RTDs allows them to operate as physical unclonable functions.

Transport Properties of a MoS2/WSe2 Heterojunction Transistor and Its Potential for Application

This paper studies band-to-band tunneling in the transverse and lateral directions of van der Waals MoS2/WSe2 heterojunctions. We observe room-temperature negative differential resistance (NDR) in a heterojunction diode comprised of few-layer WSe2 stacked on multilayer MoS2. The presence of NDR is attributed to the lateral band-to-band tunneling at the edge of the MoS2/WSe2 heterojunction. The backward tunneling diode shows an average conductance slope of 75 mV/dec with a high curvature coefficient of 62 V(-1). Associated with the tunnel-diode characteristics, a positive-to-negative transconductance in the MoS2/WSe2 heterojunction transistors is observed. The transition is induced by strong interlayer coupling between the films, which results in charge density and energy-band modulation. The sign change in transconductance is particularly useful for multivalued logic (MVL) circuits, and we therefore propose and demonstrate for the first time an MVL-inverter that shows three levels of logic using one pair of p-type transistors.

Transparent p-AlN:SnO2/n-SnO2 tunnel diode

Using the diffusivity discrepancy between Al and N in the SnO2 phase, N-doped n+ and Al-doped p+ degenerate regions were created at the interface by annealing an AlN/SnO2 bilayer. Current–voltage (I–V) characteristics of the p+-AlN:SnO2/n+-SnO2 junction indicate distinct tunnel diode characteristics, such as the tunneling mode, negative differential resistance, and turn-on mode. The overall transmittance of the p-AlN:SnO2/n-SnO2 tunnel diode is higher than 80% in the visible region. In a certain wavelength region, the transmittance of the p-AlN:SnO2/n-SnO2 tunnel diode is even higher than 90%. This shows that a transparent p-AlN:SnO2/n-SnO2 tunnel diode has great potential for use in a broad range of invisible electronics.

On the non-linear effects in graphene devices

We study several graphene devices able to generate non-linear effects in the current–voltage characteristics and in particular negative differential resistance (NDR) effects. This theoretical investigation is based on numerical charge transport simulation in the Green's function approach applied to a tight-binding Hamiltonian for particles in graphene. Depending on the device, the physical mechanism involved in the NDR effect may be different: (i) the mismatch of modes between left and right sides of a P+/P zigzag ribbon junction, (ii) the modulation of interband tunnelling in P/N junctions (tunnel diodes and tunnel field-effect transistors) or (iii) the modulation of chiral tunnelling in ‘conventional’ graphene transistors. We emphasize the advantages of exploiting different approaches of bandgap engineering in the form of graphene nanoribbons (GNRs) or nanomesh lattices (GNM), the latter resulting from a periodic array of nanoholes in graphene sheets. In particular, such nanostructuring allows us to design position-dependent bandgaps in devices, which is shown to make possible the optimization of device operation and, here, to get very high peak-to-valley ratio of the NDR. In the case of GNR nanostructuring, it is shown that appropriate bandgap engineering can even make the current–voltage characteristics of tunnel diodes weakly sensitive to the atomic edge disorder. Finally, GNM lattices are shown to be a very promising way to open large bandgaps in wide sheets of graphene and to introduce bandgaps locally with a view to optimizing the device operation and performance.

Quantum Size and Doping Concentration Effects on the Current-Voltage Characteristics in GaN Resonant Tunneling Diodes

We theoretically investigate the effects of quantum size and doping concentration on the current-voltage characteristics of GaN resonant tunneling diodes. The results show a marked dependence of the peak current density on the emitter and collector spacers, and the existence of some thickness in the emitter, for which the electric current density reaches its maximum with a large peak-to-valley ratio. We also study the effect of the doping concentration in the emitter and collector layers. It is found that the doping concentration can greatly affect the current-voltage characteristics. In particular, it increases the peak of the current density and displaces the position of the maxima of the current dependence on the applied bias voltage. The effects of aluminum concentration and temperature are also presented. Finally, it is demonstrated that it is possible to have a symmetrical current for applying bias voltage in both directions by adjusting the thickness of the collector spacer.

Theoretical Analysis of n-Type Si-Based Resonant Tunneling Diodes Deposited on Either Partially or Fully Relaxed SiGe Buffer Layers

We present a theoretical analysis on the electrical characteristics of n-type Si-based resonant tunneling diodes (RTDs) with double-barrier heterostructures (DBHs) on either partially or fully relaxed SiGe buffer layers. The analysis on these DBHs indicates that the large peak-to-valley ratios (PVRs) obtained at low temperatures decrease rather rapidly with the increase of temperature and become negligibly small at room temperatures because of the thermal broadening of the energy distribution of the electrons at higher temperatures. We propose to improve the temperature performance with the use of a narrow quantum well in the DBH. With this approach, a reasonable PVR from the structure deposited on a partially relaxed SiGe buffer is achieved. This paper provides an important alternative to the current approaches in developing Si-based RTDs for practical applications.

Resonant tunneling structures based on epitaxial graphene on SiC

Recently some experiments have suggested that graphene epitaxially grown on SiC can exhibit an energy bandgap of 260 meV, which enhances the potential of this material for electronic applications. On this basis, we propose to use spatial doping to generate graphene-on-SiC double-barrier structures. The non-equilibrium Green's function technique for solving the massive Dirac model is applied to highlight typical transport phenomena such as the electron confinement and the resonant tunneling effects. The I–V characteristics of graphene resonant tunneling diodes were then investigated and the effect of different device parameters was discussed. It is finally shown that this kind of double-barrier junction provides an efficient way to confine the charge carriers in graphene and to design graphene resonant tunneling structures.

Si–InAs heterojunction Esaki tunnel diodes with high current densities

Si–InAs heterojunction p-n diodes were fabricated by growing InAs nanowires in oxide mask openings on silicon substrates. At substrate doping concentrations of 1×1016 and 1×1019 cm−3, conventional diode characteristics were obtained, from which a valence band offset between Si and InAs of 130 meV was extracted. For a substrate doping of 4×1019 cm−3, heterojunction tunnel diode characteristics were obtained showing current densities in the range of 50 kA/cm2 at 0.5 V reverse bias. In addition, in situ doping of the InAs wires was performed using disilane to further boost the tunnel currents up to 100 kA/cm2 at 0.5 V reverse bias for the highest doping ratios.