Cell Loss Probability Research Articles

The optimal IS simulation distribution of MMPP/D/1 queuing

At the multiplexer of an ATM network, the admissible cell loss probability is less than 10−12 for some service categories. Ordinary Monte Carlo (MC) simulation requires considerable computation time to obtain such a small probability. The importance sampling (IS) technique is effective in accclerating the MC simulation. In an IS simulation, the underlying distribution is biased so as to generate more samples in the target event. In order to achieve a fast simulation, it is important to have a simulation distribution that yields an estimate with minimum variance. This is called the optimal simulation distribution. In this paper, we investigate the survivor function P(Q > q) of a stationary queue length Q in ATM queuing and obtain an IS estimate of P(Q > q) at about 10−2 by means of the optimal simulation distribution. Conventional methods [1, 2] for determining the optimal distribution require a lot of computation time. We apply the large deviation theory to this problem to obtain the optimal simulation distribution analytically and carry out an IS simulation. We present some numerical results for M/D/1 and 2-state MMPP/D/1 which demonstrate that our estimates are obtained in a very small computation time and are accurate when compared to MC simulation. © Scripta Technica, Inc. Electron Comm Jpn Pt 1, 80(12): 28–37, 1997

The optimal IS simulation distribution of MMPP/D/1 queuing

At the multiplexer of an ATM network, the admissible cell loss probability is less than 10−12 for some service categories. Ordinary Monte Carlo (MC) simulation requires considerable computation time to obtain such a small probability. The importance sampling (IS) technique is effective in accclerating the MC simulation. In an IS simulation, the underlying distribution is biased so as to generate more samples in the target event. In order to achieve a fast simulation, it is important to have a simulation distribution that yields an estimate with minimum variance. This is called the optimal simulation distribution. In this paper, we investigate the survivor function P(Q > q) of a stationary queue length Q in ATM queuing and obtain an IS estimate of P(Q > q) at about 10−2 by means of the optimal simulation distribution. Conventional methods [1, 2] for determining the optimal distribution require a lot of computation time. We apply the large deviation theory to this problem to obtain the optimal simulation distribution analytically and carry out an IS simulation. We present some numerical results for M/D/1 and 2-state MMPP/D/1 which demonstrate that our estimates are obtained in a very small computation time and are accurate when compared to MC simulation. © Scripta Technica, Inc. Electron Comm Jpn Pt 1, 80(12): 28–37, 1997

A VBR rate control algorithm for MPEG-2 video coders with perceptually adaptive quantisation and traffic shaping

This paper describes a variable bit-rate (VBR) rate control algorithm for the MPEG-2 video coder. The algorithm described uses perceptually adaptive quantisation by varying the quantiser step-size of the coder according to the spatial correlation, temporal correlation and a prediction of the quantisation distortion of each macroblock. The algorithm also shapes the traffic characteristics of the output bit-stream of the coder by varying the quantiser step-size to ensure that the traffic statistics of the output bit-rate of the coder comply with a predetermined traffic descriptor. The results presented show that there exists a perceptually optimum set of traffic statistics which provide a consistent perceived decoded image quality for a given probability of cell loss.

Performance of a Delta ATM switch

In this study, we investigate the performance of an ATM switch with a Delta switching fabric loaded with Poisson as well as Binary Markov input sources using Monte Carlo simulation. The performance measures used are switch latency, buffer occupancy and cell loss probabilities. Various improvements to the switch design, such as increasing the buffer size and implementing a modified Delta switching fabric were studied. A system consisting of two switches linked by a single line was also simulated. In general, the performance of the ATM switch is reasonable given its simple and low-cost architecture which were the design goals. This is especially true for the case of Poisson sources. Using the modified Delta switching fabric and increasing buffer sizes could improve performance significantly at the expense of cost and complexity.

Performance analysis of statistical multiplexing of heterogeneous discrete-time Markovian arrival processes in an ATM network

The cell loss probability and the mean cell delay are major performance metrics in analyzing a statistical multiplexer loaded with a superposition of independent and heterogeneous bursty sources. In this paper, we model each arrival process by a two-state discrete-time Markovian arrival process (D-MAP). We discuss that this traffic modeling is more realistic than the other ones in ATM networks. Then we model the superposition of r types of the two-state D-MAPs into a discrete-time batch Markovian arrival process (D-BMAP) with 2 r states. By using the steady-state analysis of the D-BMAP/D/1/K queueing model, we obtain the exact cell loss probabilities and the mean cell delays for each type of traffic in the statistical multiplexer. In particular, we derive the formulas concerned with these performance metrics under two buffer access strategies of the simultaneous cell arrivals at the same slot: (1) fair access, and (2) priority access. From some numerical examples, we show that the performance of each traffic at the statistical multiplexer may be severely affected by its own traffic characteristics and priority of buffer access, as well as the traffic characteristics of the others.

A Bernoulli process approximation with buffer size adjustment for the analysis of an ATM multiplexer

The heterogeneity and the burstiness of input source traffic together with large size of the shared buffer make it difficult to analyze the performance of an asynchronous transfer mode (ATM) multiplexer. Based on the asymptotic decay rate of queue length distribution at the shared buffer, we propose a Bernoulli process approximation for the individual on-off input source with buffer size adjustment, which gives a good upper bound of the cell loss probability.

Exact analysis in discrete time of 2 × 2 ATMswitch servingcorrelated traffic at both inputs

A simple and exact discrete-time closed-form expression is derived for the cell loss probability (CLP) in a 2 × 2 ATM switch supplied at each input by a two-state Markov source with general transition probabilities, thus generalising a previous result in which only one of the inputs is correlated. This exact result is used to study the effective bandwidth approximation.

Design and performance of a multiple parallel shared memory switch

A new ATM switch architecture is presented. This switch is based on multiple parallel shared memory switches (8×8) which are connected together in a Banyan interconnection network. The parallel shared memory switch (PSMS) is capable of achieving 100% throughput under bursty traffic. This switch has the advantage of requiring a small queue size as in other types of shared memory switches. In contrast to other shared memory, there is no constraint on the switch size implementation since it does not require a speed-up which depends on the size of the switch. Speed-up is needed in the parallel shared memory switch to maintain the sequence of cells, but at a small value dependent on the size of the parallel shared memory switch element (8 in this design). The parallel shared memory switch element is based on distributed shared memory where each memory queue stores cells coming from all inputs. This limits the performance degradation that may occur in a completely shared memory where long streams from a few inputs may unfairly hog the entire space. Analysis and simulation of the switch demonstrates a high performance in terms of end-to-end delay, throughput and cell loss probability.

Performance analysis of a Leaky Bucket scheme with a threshold in the data buffer

We investigate Leaky Bucket (LB) schemes with a threshold in the data buffer, where the leak rate changes depending on the contents of the data buffer. We use a Markov modulated Poisson process (MMPP) as a bursty input traffic. We obtain the limiting distributions of the system state at an embedded point and at an arbitrary time. As performance measures we obtain cell loss probability and mean cell delay. We present some numerical results to show the effects of the threshold value, the rate of token generation, the size of the token pool and the size of the data buffer on the performances of the LB scheme with a threshold. Numerical examples show that the LB scheme with a threshold improves the system performance in comparison with the LB scheme without a threshold.

Composite optical/electrical buffer configurationfor photonic ATM switching systems

The proposed optical/electrical buffer configuration for optical-frequency routing in ATM switching systems provides low cell-loss probability and uses fewer optical devices since electrical buffers are used to share the buffering load. The shared-load balance is finely tuned by using an intermediate degree-of-multiplexing table.

On the performance study of multi-plane ATM switches

In this paper the performance of an N× N internally nonblocking multi-plane ATM switch with common input and common output buffers is analyzed. Two traffic types are considered with different priorities. Two service policies are proposed to satisfy different performance requirements: one treats the high priority cells as loss-sensitive traffic, the other guarantees the delay time of high priority cells. The method of reflection is employed to evaluate the probability that a cell successfully leaves the input buffer. Performance measures such as throughput, delay and cell loss probability are then obtained. The effects of priority weights, traffic load and the buffer size on the performance of the proposed and the contrasted policies are studied. Besides, different traffic sources, such as Bernoulli and ON/OFF traffic sources, are also studied. The performance is significantly improved by adopting the multi-plane structure, and the two proposed service policies can guarantee the required quality of services as long as a high weight for high priority traffic class is given. Moreover, numerical results show that the delay time of the high priority traffic class for the two proposed service policies is insensitive to the buffer size, so that only cell loss probability is the key factor of concern for the design of the input buffer size.

A large scalable ATM multicast switch

This paper focuses on designing a large N/spl times/N high-performance broad-band ATM switch. Despite advances in architectural designs, practical switch dimensions continue to be severely limited by both the technological and physical constraints of packaging. Here, we focus on augmentation in a "single-switch" design: we provide ways to construct arbitrarily large switches out of modest-size components and retain overall delay/throughput performance. We propose a growable switch architecture based on several key principles: 1) the knockout principle exploits the statistical behavior of cell arrivals, and thereby reduces the interconnect complexity; 2) output queueing yields the best possible delay/throughput performance; 3) distributed control in routing (multicast) cells through the interconnect fabric without internal path conflicts; and 4) simple basic building blocks facilitate scalability. Other attractive features of the proposed architecture include: 1) intrinsic broadcast and multicast capabilities; 2) built-in priority sorting functionality; and 3) the guarantee of first-in, first-out cell sequence, To achieve 10/sup -14/ cell loss probability, only maximum size 32/spl times/16 basic building modules are required, and no crossover interconnects exist between modules in a three-dimensional configuration.

Recursive copy generation for multicast ATM switching

This paper describes the structure of a multicast asynchronous transfer mode (ATM) switching node employing a recursive copy generation algorithm, based on a self-routing network with a limited copying capability and a few added elements. With the network generates only a few copies a time of an input multicast cell, the remaining are obtained by recycling the output copies to the corresponding inputs as many times as necessary. The proposed recursive copy generation is also suitable to dynamically include new destinations and to delete old ones. The performance of the proposed structure, that has been implemented in a test-bed prototype, is also evaluated in terms of throughput and delay, via computer simulation, showing a possible performance improvement for multicast traffic with respect to an equivalent unicast input traffic. The cell loss probability in such structure is also evaluated.

On self-similar traffic in ATM queues: definitions, overflow probability bound, and cell delay distribution

Recent traffic measurements in corporate local-area networks (LANs), variable-bit-rate video sources, ISDN control-channels, and other communication systems, have indicated traffic behaviour of self-similar nature. This paper first discusses some definitions and properties of (second-order) self-similarity and gives simpler criteria for it. It then gives a model of self-similar traffic suitable for queuing system analysis of an asynchronous transfer mode (ATM) queue. A lower bound to the overflow probability of a finite ATM buffer is obtained, as also a lower bound to the cell loss probability. Finally, the stationary distribution of the cell delay in an infinite ATM buffer is obtained.

Exact analysis in discrete time of 2 × 2 ATMswitch serving heterogeneous traffic

An exact discrete-time, finite-buffer, closed-form expression for the cell loss probability (CLP) in a 2/spl times/2 ATM switch is obtained in the case of heterogeneous cell traffic at the two inputs: one source is Bernoulli and the other is correlated over time.

Performance Analysis of an ATM Multiplexer with Multiple QoS VBR Traffic

In this paper, we propose a new queuing model, MMDP/MMDP/1/K, for an asynchronous transfer mode (ATM) multiplexer with multiple quality of service (QoS) variable bit rate (VBR) traffic in broadband-integrated services digital network (B-ISDN). We use the Markov Modulated Deterministic Process (MMDP) to approximate the actual arrival process and another MMDP for service process. Using queuing analysis, we derive a formula for the cell loss probability of the ATM multiplexer in terms of the limiting probabilities of a Markov chain. The cell loss probability can be used for connection admission control in ATM multiplexer and the calculation of equivalent bandwidth for arrival traffic. The major advantages of this approach are simplicity in analysis, accuracy of analysis by comparison of simulation, and numerical stability.

Performance analysis for ATM switching of mixed continuous-bit-rate and bursty traffic with smoothing function

Traditional packet switching networks have typically employed window-based congestion control schemes in order to regulate traffic flow. In ATM networks, the high speed of the communication links and the varied nature of the carried traffic make such schemes inappropriate. Therefore, simpler and more efficient schemes have to be proposed to improve the congestion control for ATM switching. This paper presents an exact performance analysis of ATM switching whose inputs consist of Continuous-Bit-Rate(CBR) and bursty traffic. The CBR traffic and bursty traffic are described by Bernoulli process and the Interrupted Bernoulli Process(IBP), respectively. Bursty traffic smoothing mechanism is analyzed. With the use of a recursive algorithm, the cell loss probability and the average delay for ATM switching of mixed CBR and bursty traffic are exactly calculated. Traffic smoothing could be implemented at a slower peak rate keeping the average rate constant or decreasing the average bursty length. Both numerical analysis and simulation results show that the performance of ATM switching with traffic smoothing function is improved.

An adaptive scheme for admission control in ATM networks

This paper presents a real time front-end admission control scheme for ATM networks. A call management scheme which uses the burstiness associated with traffic sources in a heterogeneous ATM environment to effect dynamic assignment of bandwidth is presented. In the proposed scheme, call acceptance is based on an on-line evaluation of the upper bound on cell loss probability which is derived from the estimated distribution of the number of calls arriving. Using this scheme, the negotiated quality of service will be assured when there is no estimation error. The control mechanism is effective when the number of calls is large, and tolerates loose bandwidth enforcement and loose policing control. The proposed approach is very effective in the connection oriented transport of ATM networks where the decision to admit new traffic is based on the a priori knowledge of the state of the route taken by the traffic.

A novel switching architecture for ATM networks

It is known that the flexibility and capacity of asynchronous transfer mode (ATM) networks can meet the bandwidth requirements of multimedia applications. In ATM networks, switching is one of the major bottlenecks of end-to-end communication. We propose using a multiple partitionable circular bus network (MPCBN) as an ATM switch. Connection requests are first transformed into a graph where vertices and edges represent connection requests and conflicts among connection requests, respectively. We then use a graph traversal algorithm to select a maximal set of requests for execution in physically partitioned buses. An approach of using finite projective planes is then used to reduce the number of switch points from O(N/sup 2/) to O(N /spl radic/N), where N is the number of ports of a switch. A performance evaluation for both uniform and bursty data sources shows that the approach of using finite projective planes to reduce the number of switch points results in a small increase of cell loss probability.

FRONTIERNET: frequency-routing-type time-division interconnection network

This paper describes a photonic time division multiplexing (TDM) highway switch, called FRONTIERNET, that uses optical frequency as routing information. This switch architecture can be applied to asynchronous transfer mode (ATM) switching systems. The N/spl times/N switch consists of N tunable frequency convertors and N frequency-division-multiplexed (FDM) output buffers connected through an N/spl times/N frequency router. The router can interconnect N input highways with N output highways in a completely noninterfering way. It is possible to address each output highway uniquely by the choice of frequency (frequency routing) and each output highway can receive any given frequency from only one input. This switch architecture therefore has three advantages: its novel output buffering scheme achieves the best possible performance, there is no need for a complicated contention resolution mechanism between input highways, and there is no splitting loss of the transmitted optical power. An experimental switch with a one-cell FDM buffer was constructed. The tunable frequency convertor based on fast tunable frequency lasers can transmit high-speed optical cells to which frequencies are assigned on a cell-by-cell basis. The frequency router is an integrated-optic arrayed-waveguide grating 16/spl times/16 filter produced by using planar-lightwave-circuit (PLC) technology. The one-cell FDM output buffer based on optical fiber delay lines can store FDM cells and select only one cell at each timeslot over the output highway. A 2.5-Gb/s experimental switch was successfully operated, And an experimental FDM loop buffer was also demonstrated. This stores two cells at a data rate of 2.5 Gb/s. The bit error rate (EER) of the cells after up to 10 circulations is <10/sup -9/. The performance of the buffer in terms of the probability of cell loss and the cell wafting time in the buffer is analyzed numerically. It is concluded that fewer optical buffers are needed to satisfy the desired probability of the cell loss compared with the conventional electronic buffers. The scale of the switch can be expanded in a modular fashion in two ways using a multistage frequency router and a multistage switching network. And the multihop FRONTIERNET architecture is proposed to reduce the required frequency channels rather than the single-hop FRONTIERNET. The switch scale is also very easy to expand by connecting the frequency-router-based switching submodules.