Phase-shifted Carrier Research Articles

Two-Segment Three-Phase PMSM Drive With Carrier Phase-Shift PWM for Torque Ripple and Vibration Reduction

This paper presents a two-segment motor system powered by two inverters with phase-shift pulsewidth modulation (PWM) to fulfill the purpose of low-torque ripple and vibration noise. Different from conventional multi-inverter structure, the inverters for this type of machine are electrically isolated between each other. First, the concept of multisegment machine is presented and the basic operation principle is analyzed with finite-element analysis (FEA) method. Then vibration caused by the switching device in machine is investigated and the control model of a two-segment motor is developed. Further, the principle of carrier phase-shift PWM is illustrated with the vibration analysis. Carrier phase shift can generate interleaved torque and force on the rotor for the two groups of windings in the machine and cancel each other for certain harmonics. Then simulation of control strategy for this type of machine has been done in MATLAB. Finally, based on the concept and principles mentioned before, a two-segment motor with its drive system is fabricated. Both the test of torque ripple and the vibration of the motor have been significantly improved. Compared with a normal three-phase motor driven by a paralleled inverter with interleaving, the proposed approach is with comparable vibration reduction but without using extra coupled inductors.

Hybrid Multi-Carrier PWM Technique Based on Carrier Reconstruction for Cascaded H-bridge Inverter

In response to the deficiencies that the Carrier Phase Shift (CPS-PWM) and Carrier In-Phase Disposition (IPD-PWM) modulation techniques are applied to Cascaded H-bridge (CHB) multilevel inverters, combined with the advantages of the two techniques, a Hybrid Multi-carrier PWM technique based on carrier reconstruction is proposed. The aforementioned technique uses the carrier segment in the half carrier period of the IPD-PWM technique as the basic unit and optimizes the modulation performance by periodically adjusting its arrangement in the vertical direction. When CHB multilevel inverter adopts Hybrid Multi-carrier PWM technique, as with CPS-PWM technique, the output power balance between the cascaded H-bridge cells is achieved naturally; at the same time, the harmonic spectrum of the output voltage is identical with that of the IPD-PWM technique, that is to say, the harmonic characteristics of the output line voltage of the inverters are effectively improved. In this paper, the CHB seven-level inverter is taken as an example, and the correctness of the relevant conclusions is verified by simulation and experimental results.

Modified Modulation Strategy With Balanced Power and Switching Losses Distributed for Seven-Level Cascaded H-Bridge Inverters

In this paper, the problems existing in common modulation methods are analyzed, and an optimized modulation strategy is proposed. Firstly, the single-pole frequency doubling modulation technique is adopted to reduce the maximum switching frequency to 1/2 of the original switching frequency, and the equivalent switching frequency of inverters remain constant. On this basis, the trigger signal of each unit is rotated in units of 1/4 cycle, so the output power of each cell is balanced after 3/4 cycles. The method is simple in control, and the Total Harmonic Distortion (THD) of line voltage is better than the carrier phase shift technique. The working stress of all the unit switching tubes is the same, the heat dissipation distribution is uniform, the switching loss is effectively reduced, and the service life and system reliability are improved. Finally, simulation and experimental results verify the correctness and feasibility of the optimized modulation strategy.

Phase-Shifted Carrier Pulse-Width Modulation Algorithm With Improved Dynamic Performance for Modular Multilevel Converters

High modularity, easy scalability, and superior harmonic performance, comprising the topology with the most potential for medium- to high-voltage high-power applications, are representative features of a modular multilevel converter (MMC). Each application of a MMC requires a proper scheme such that it conforms to control objectives such as correct submodule capacitor voltage balancing control and the suppression of circulating current. Over the past few years, various studies have been presented that meet the MMC requirements through both classical control-based pulse-width modulation and model predictive control, although some drawbacks exist for both control concepts. The dynamic performance of the classical control methods with proportional-integral or proportional-resonant controllers is unsatisfactory, and the requirement of proportional-integral parameters tuning procedure makes converter operation performance depends on proportional-integral parameters adjustment. Meanwhile, model predictive control performance depends significantly on the mathematical model of a system, and weighting factor selection is tedious. In this paper, we propose an improved phase-shifted carrier pulse-width modulation method and capacitor voltage balancing control that inherits the merits from both classical control and model predictive control. Meanwhile, the proposed control method eliminates the requirement of the tedious proportional-integral parameters tuning procedure and improves the dynamic performance compared with the conventional phase-shifted carrier pulse-width modulation-based proportional-integral controller method. Simulations and experiments were conducted to demonstrate the proposed method's properness.

Research on Three-Phase Cascade PWM Rectifier

For the application of high voltage and high power, a three-phase six-module cascade rectifier topology is proposed for high voltage and high power conditions, And analyze this topology from the working principle and control strategy. In order to achieve unity power factor, a control strategy based on carrier phase shift method for reactive power and voltage closed-loop control is proposed. Then the simulation model was built by MATLAB/Simulink. By analyzing the simulation results in detail and by changing the load, the correctness and stability of the proposed control strategy are further verified, it can effectively reduce the harmonics, improve power quality, and achieve unity power factor input and regulated output.

Performance Comparison of Modulation and Sorting Methods for Modular Multilevel Converter

The modulation strategy of modular multilevel converter (MMC) needs to be combined with the sub-module (SM) redistribution strategy to maintain the stability of the SM capacitor voltage while working properly. The submodule (SM) switching frequency and the voltage balancing performance have been compared between two pulse width modulation (PWM) methods, i.e. carrier phase shift PWM (CPS-PWM) and submodule unified PWM (SUPWM), combined with two kinds of sorting methods, i.e. modulation wave compensation method and improved module selection method. The theoretical and simulation results show that when the number of sub-modules and the carrier frequency meet the requirements of ship propulsion, it is difficult for modulation wave compensation method to maintain good performance in different output frequency conditions. Using improved module selection method will increase the switching frequency of the device, but it has a higher performance in voltage balancing. Introduction

A Fundamental Frequency Sorting Algorithm for Capacitor Voltage Balance of Modular Multilevel Converter With Low-Frequency Carrier Phase Shift Modulation

This paper proposes a fundamental frequency sorting algorithm for balancing the floating capacitors in modular multilevel converters with low-frequency carrier phase shift modulation. The relationship between the driving pulses and submodules (SMs) is rebuilt in every fundamental period by sorting the voltage increments and present voltages. Besides, an improved and simplified strategy is proposed to predict the charging abilities of the driving pulses, so as to avoid sorting the voltage increments. Based on the proposed method, the switching frequency of each power device and the carrier frequency are identical, which reduces the operational losses for applications regarding high power. At the same time, the sorting frequency is as low as the fundamental frequency, which alleviates a large amount of computational cost, and the necessity to measure arm currents is omitted. In this case, the arm current sensors are eliminated, and simplified communication among the central controller and the local ones is set up. Finally, a three-phase 1-MVA simulation platform with 120 SMs and a down-scaled 6-kVA experimental prototype with 48 SMs are constructed to validate the proposed approach.

Thermally Compensated Discontinuous Modulation Strategy for Cascaded H-Bridge Converters

A widely adopted multilevel converter topology is the cascaded H-bridge (CHB), as it can provide voltage and power scalability. However, since the CHB converter can be composed by cells with different remaining lifetime, it could be useful to delay a fault of higher aged cells in order to prolong the entire converter's lifetime. In this paper, a thermally compensated discontinuous pulse width modulation (DPWM) strategy is proposed in order to reduce the thermal stress for power semiconductors in power modules of higher aged cells. Considering the thermal cycles as the most influencing cause of wear out of power modules, the proposed method compensates the thermal cycles under a varying power profile by manipulating the clamping angle of the DPWM. Moreover, the proposed method obtains a comparable total harmonic distortion performance to the phase-shifted carrier modulation.

Control System to Balance Internal Currents of a Multilevel Current-Source Inverter

Multilevel current-source inverters have proved to be a high-performance option for industrial applications due to reliability, fault-tolerant capabilities, quasi soft switching, and the use of lower filter capacitor values. One of its major challenges is to balance the internal currents that feed each module. Imbalances could be caused by manufacturing deviations of the reactive components, temperature drift or aging, nonlinear loads, and modulation errors, among others. Using the well-known phase-shift carrier sinusoidal pulse width modulation, a slight change in the amplitude of the carrier signals produces a variation in the average value of the internal currents. In this paper, we introduce a control strategy to balance the current of the inductors and its implementation in a prototype. Simulation and experimental results at different operating conditions show a robust behavior of the control system along with a low distortion in the output voltages and currents of the converter.

Implementation and performance analysis of cascaded multilevel inverter using modified SVPWM techniques

The space vector pulse width modulation (SVPWM), which is considered as an efficient PWM technology can also be used for multilevel inverters. This method is originally designed for two-level inverters. This paper introduces a modified SVPWM technique. The cascaded H-bridge multilevel inverter (CMLI) of 7-level, 9-level and 11-level are simulated for three different carrier PWM techniques. Here, carrier-based sinusoidal pulse width modulation (SPWM), third harmonic injected pulse width modulation (THIPWM), and modified carrier-based SVPWM are used as modulation strategies. These modulation strategies include phase disposition technique (PD), phase opposition disposition technique (POD), Alternate Phase Opposition Disposition technique (APOD), and Phase Shifted Carrier (PSC). These strategies have been implemented by using simulation and validated by experiment. The detailed examination of the simulation results has been presented and validated with experimental results of 11-level CMLI.

Implementation and performance analysis of cascaded multilevel inverter using modified SVPWM techniques

The space vector pulse width modulation (SVPWM), which is considered as an efficient PWM technology can also be used for multilevel inverters. This method is originally designed for two-level inverters. This paper introduces a modified SVPWM technique. The cascaded H-bridge multilevel inverter (CMLI) of 7-level, 9-level and 11-level are simulated for three different carrier PWM techniques. Here, carrier-based sinusoidal pulse width modulation (SPWM), third harmonic injected pulse width modulation (THIPWM), and modified carrier-based SVPWM are used as modulation strategies. These modulation strategies include phase disposition technique (PD), phase opposition disposition technique (POD), Alternate Phase Opposition Disposition technique (APOD), and Phase Shifted Carrier (PSC). These strategies have been implemented by using simulation and validated by experiment. The detailed examination of the simulation results has been presented and validated with experimental results of 11-level CMLI.

Opposite Vector Based Phase Shift Carrier Space Vector Pulse Width Modulation for Extending the Voltage Balance Region in Single-Phase 3LNPC Cascaded Rectifier

A phase shift carrier space vector pulse width modulation scheme based on an opposite vector voltage balancing strategy is proposed to extend the balance region of dc-link capacitor voltages for a single-phase three-level neutral point clamped cascaded rectifier (3LNPC-CR). The internal-module and mutual-module 3LNPC-CR balancing strategies are simultaneously applied to improve the voltage balancing capacity when the dc loads are unbalanced. The voltage balance boundaries of three space vector pulse width modulations using the traditional strategy, the zero vector strategy, and the opposite vector strategy are compared. The analysis results indicate that the proposed modulation algorithm maintained balanced voltages for all modules even if one load of the module was removed. Meanwhile, the equalization of the neutral point voltage for the single-phase 3LNPC-CR was also achieved. Finally, the voltage balancing capacity and rectifier performance of the proposed strategy was verified by simulations and experiments.

Fault-Tolerant Control of MMC With Hot Reserved Submodules Based on Carrier Phase Shift Modulation

Reliability is one of the most important challenges for the modular multilevel converter (MMC), which is composed of a large number of power electronics submodules (SMs). In order to increase the system reliability, the reserved SMs are often utilized. A novel strategy is proposed in this paper to implement the fault-tolerant control of MMC with the hot reserved SMs based on the carrier phase shift modulation. All the SMs, including the hot reserved SMs, work in the operating mode and the standby mode in turns. A rotating sliding choice box is adopted to select the operating SMs and the corresponding phase-shift angles, which enables the equal burden of each SM. Once the faults are detected and localized, the reserved SMs can simultaneously replace the bypassed failed SMs, which guarantees the fault-tolerant operation with a nearly seamless transition and very short recovery time. Furthermore, the line cycle is set as the rotating period in the control strategy, without increasing much switching loss. The mismatch pulses are greatly reduced as well. This technique can also be easily implemented in a DSP or microcontroller. Simulations in MATLAB/Simulink and experiments based on a downscaled MMC prototype have verified the feasibility and effectiveness of the proposed control strategy.

Optimized Phase Disposition (PD) Modulation of a Modular Multilevel Converter

This paper presents a theoretical harmonic analysis of phase disposition (PD) and phase-shifted carrier pulse-width modulation strategies for modular multilevel converters (MMCs). It is shown that when these strategies are implemented on a per MMC arm basis, their spectral performances converge because of cancellation of odd carrier sideband groups between each phase leg's arms. An improved PD modulation strategy is then presented that uses a single PD modulator for the entire phase leg, followed by a state machine decoder that evenly distributes switching pulses to all submodules across the phase leg upper and lower arms to balance the distribution of submodule commutation events. The resulting strategy achieves optimum phase leg PD spectral performance and also achieves natural voltage balancing of the MMC submodules. All theoretical findings are supported by simulation and experimental results obtained using a five-level MMC prototype.

Highly noise-tolerant hybrid algorithm for phase retrieval from a single-shot spatial carrier fringe pattern

A highly noise-tolerant hybrid algorithm (NTHA) is proposed in this study for phase retrieval from a single-shot spatial carrier fringe pattern (SCFP), which effectively combines the merits of spatial carrier phase shift method and two dimensional continuous wavelet transform (2D-CWT). NTHA firstly extracts three phase-shifted fringe patterns from the SCFP with one pixel malposition; then calculates phase gradients by subtracting the reference phase from the other two target phases, which are retrieved respectively from three phase-shifted fringe patterns by 2D-CWT; finally, reconstructs the phase map by a least square gradient integration method. Its typical characters include but not limited to: (1) doesn't require the spatial carrier to be constant; (2) the subtraction mitigates edge errors of 2D-CWT; (3) highly noise-tolerant, because not only 2D-CWT is noise-insensitive, but also the noise in the fringe pattern doesn't directly take part in the phase reconstruction as in previous hybrid algorithm. Its feasibility and performances are validated extensively by simulations and contrastive experiments to temporal phase shift method, Fourier transform and 2D-CWT methods.

A Novel Optoelectronic Oscillator Based on Brillouin-Induced Slow Light Effect

A novel optoelectronic oscillator (OEO) using a phase modulator is proposed and experimentally demonstrated. A carrier phase shift technique based on Brillouin-induced slow light effect is used to realize a conversion from phase modulation to intensity modulation. Two kinds of pump structures for producing large nonlinear phase shifts, a single-pump structure and a dual-pump structure, are investigated. As a comparison, the single-sideband phase noises of the single-pump and dual-pump OEOs are measured, respectively. The experimental results indicate that the single-pump OEO exhibits better phase noise performance near carrier than the dual-pump OEO. The maximum fractional frequency deviation of both types of OEOs is about ±0.85 ppm over 5000 s. The proposed scheme can be widely used in stable microwave or millimeter wave generation.

Phase extraction for dual-wavelength phase-shift Fizeau interferometry in the presence of multi-beam interference

Dual-wavelength interferometry could extend the measured range of single-wavelength interferometry by combining the two single wavelength phases, particularly for the measurement of step height. When testing the high-reflectivity surfaces with the single wavelength Fizeau interferometer, we have presented the π∕4 phase-shift carrier squeezing interferometry (QCSI) method for phase extraction with multi-beam interference (Appl. Opt. 55, 1920–1928, 2016). In this paper, we propose an integer and decimal portions synthetization (IDS) method for the multi-beam interference in the dual-wavelength Fizeau interferometer. One of the single wavelength wrapped phases is demodulated by the multi-beam interference QCSI algorithm, while the second of the single wavelength wrapped phases is extracted by the conventional two-beam interference phase-shift algorithm, so the equivalent wavelength unwrapped phase is derived from the two single wavelength wrapped phase. The decimal portion of synthesized phase is then obtained directly from the first single wavelength wrapped phase, and the integer portion of synthesized phase is obtained from the fringe order of the first single wavelength wrapped phase determined by the equivalent wavelength unwrapped phase. The proposed non-iterative IDS method avoids the common error magnification effect in the two-wavelength techniques, and only requires no more than 8 frame phase-shift interferograms for each single wavelength. Its robust performance is validated by both simulations and experiments in the presence of multi-beam interference as well as phase-shift error for measuring objects with height discontinuities.

PSPWM based Five-Level Shunt Active Filter for Power Quality Improvement in Power System Network

Power quality is a very important phenomenon in modern days and good power quality indicates efficient performance of a power system network. Presence of non-linear loads in power system network degrades the quality of power being delivered to other sensitive loads connected to the same network. Harmonics is one of the key parameters that power engineers are concerned about and good power quality insists for compensation of harmonics in power system. Active power filters prove to be feasible, valuable and successful custom power devices for harmonic compensation. The operation of a Five-Level Cascaded Inverter driven Shunt Active Power Filter for harmonic elimination and to improve power factor is discussed in this paper. Phase-Shifted carrier PWM technique is implemented for generating the gate drive signals of the inverter. The proposed Active Power Filter model was simulated on MATLAB/ SIMULINK platform and results were presented for a system with balanced linear and balanced non-linear load conditions.

Logic-Form-Equation-Based Active Capacitor Voltage Balancing Control Technique for Stacked Multicell Converters

This paper proposes a novel active capacitor voltage balancing technique for stacked multicell (SM) converters. The proposed active capacitor voltage balancing control method detects the direction of the load current and measures the voltage of flying capacitors (FCs) to generate a proper switching state in order to form the required output voltage level and regulate the FC voltages at their desired reference levels. The proposed active capacitor voltage balancing control technique can modulate the output voltage through any of the pulse-width-modulation (PWM) techniques such as the phase-shifted carrier PWM or the level-shifted-carrier PWM. The foremost advantage of the proposed active control technique is that it does not demand any complex computations because it is not based on the optimization of the FC voltage-deviation cost functions. A thorough set of simulation results and experimental measurements for the five-level and seven-level SM converters are provided to validate the proposed active capacitor voltage balancing control method.

Flux-Balancing Scheme for PD-Modulated Parallel-Interleaved Inverters

A simple scheme to realize phase-disposition carrier pulse width modulation (PD PWM) for parallel two-level voltage-source converters (2L-VSCs) is presented in this paper. The proposed implementation only uses a single carrier signal and can easily be implemented using a digital signal processor. The operation of the parallel VSCs with the coupled inductor (CI) under the PD PWM is briefly discussed, and the associated dc flux injection problem is investigated. A CI saturation issue during the band transition under the PD PWM scheme is also explored, and the strategy to avoid this problem is presented. In addition, the proposed strategy also maintains a volt-second balance to synthesize desired reference space voltage vector during the band transition. As a result, a smooth transition from one modulation band to the other is ensured without causing disturbances in the line-to-line voltage. The switching losses and the harmonic performance of the proposed implementation are also compared with the commonly used phase-shifted carrier pulse width modulation. The implementation issues are discussed and the experimental results are also presented.