Flux-Balancing Scheme for PD-Modulated Parallel-Interleaved Inverters

Abstract

A simple scheme to realize phase-disposition carrier pulse width modulation (PD PWM) for parallel two-level voltage-source converters (2L-VSCs) is presented in this paper. The proposed implementation only uses a single carrier signal and can easily be implemented using a digital signal processor. The operation of the parallel VSCs with the coupled inductor (CI) under the PD PWM is briefly discussed, and the associated dc flux injection problem is investigated. A CI saturation issue during the band transition under the PD PWM scheme is also explored, and the strategy to avoid this problem is presented. In addition, the proposed strategy also maintains a volt-second balance to synthesize desired reference space voltage vector during the band transition. As a result, a smooth transition from one modulation band to the other is ensured without causing disturbances in the line-to-line voltage. The switching losses and the harmonic performance of the proposed implementation are also compared with the commonly used phase-shifted carrier pulse width modulation. The implementation issues are discussed and the experimental results are also presented.