Carrier-based PWM Research Articles

New modified carrier-based level-shifted PWM control for NPC rectifiers considered for implementation in EV fast chargers

New modified carrier-based level-shifted PWM control for NPC rectifiers considered for implementation in EV fast chargers

A Novel Winding Connection Sequence of Dual Three-Phase Series-End Winding PMSM Drive for Speed Range Extension

Series-end winding motor drives double the dc-link voltage utilization compared with the conventional star-connected winding counterparts, which indicates that series-end winding motor drives are suitable for high-speed applications with limited dc-link voltage. To further improve the dc-link voltage utilization and extend the speed range of the dual three-phase series-end winding permanent magnet synchronous motor (DTSW-PMSM) drive system, this paper proposes a novel winding connection sequence (WCS) for DTSW-PMSM drive, and the dc-link voltage utilization is further improved by 36.6% compared with the normal WCS. The dc-link voltage utilizations of different WCSs are analyzed through the phasor relationship between the phase and leg voltages. Besides, the corresponding carrier-based pulse-width modulation to drive the DTSW-PMSM with the proposed WCS is also developed. In the experimental tests, the speed range of the DTSW-PMSM drive with the proposed WCS is extended significantly. Therefore, adopting the proposed WCS can be an effective means for further speed range extension of DTSW-PMSM drives without additional hardware.

FPGA implementation of carrier-based PWM techniques for single-phase matrix converters

Field programmable gate arrays (FPGAs) stand out as a highly efficient and reliable digital solution to control power electronics converters. Direct single-to-single-phase matrix converters (SSMCs) are widely used in industrial and power system-related applications and are usually controlled using carrier-based PWM techniques. Existing literature studies on FPGA implementation of carrier-based PWM techniques for SSMC lack providing architectural design details and programming algorithms. Further, resource utilization/power consumption optimizations and analyses are not performed. To fill these research gaps, we propose a new FPGA-based design that is capable of employing the desired carrier-based PWM technique and synthesizing any output frequency. It also optimizes the FPGA resource utilization and power consumption and utilizes a novel approach to synchronize the generated triggering pulses with the source. A laboratory setup is built to experimentally test the proposed FPGA-based design, where results demonstrate the efficiency and reliability of the design.

Common-Mode Voltage Elimination of Multilevel Converters With Reduced Switching Loss Using Sawtooth-Carrier-Based PWM

This paper proposes an asymmetrical switching pattern to eliminate common-mode voltage (CMV) in multilevel converters while reducing switching loss by rearranging the switching sequence to minimize the number of level-shifts. In contrast to the existing symmetrical switching pattern, this approach achieves CMV elimination without increasing switching loss. To implement this asymmetrical switching pattern, a simple sawtooth carrier-based PWM scheme is proposed that avoids the need for complicated space vector modulation (SVM) computation, particularly for high-level converters. The proposed method's effectiveness is demonstrated through simulations and experimental results for the three-phase cascaded H-bridge converter and boost seven-level active neutral-point-clamped converter.

A unified duty-cycle modulation algorithm for a three-level NPC inverter

In this paper, it is a kind of challenge to simplify the conventional pulse width modulation (PWM) algorithms for a three-level neutral-point-clamped inverter. Thus, the unified duty-cycle modulation (UDM) algorithm is presented. It is more attractive than the carrier-based PWM (CBPWM), space-vector PWM (SVPWM), and unified PWM algorithms with a simpler calculation by utilizing the usefulness of the SVPWM algorithm to synthesize the duty cycles in time-domain and the CBPWM algorithm to synthesize the duty cycles in frequency-domain with the lesser conditions and the blankness of the lookup tables, switching sequence design, and zero-sequence component finding. Besides, it is outstanding with three outcomes: (1) comprehensive mathematical models of the dwell times, (2) permanent mathematical models of the duty cycles in time-domain, and (3) simplified PWM algorithm, which has a better workflow with the reduction of the computation burden. As it is very easy to implement as the sinusoidal PWM technique while its performance is equivalent to the SVPWM algorithm, this makes the proposed UDM algorithm a good candidate to optimize between the performance and the cost. Both the simulation and experimental results can confirm the feasible practicability and performance. The comparison with the conventional algorithms can evidently emphasize the superiority.

Segment Reduction-Based Space Vector Pulse Width Modulation for a Three-Phase F-Type Multilevel Inverter with Reduced Harmonics and Switching States

An improved segment reduction-based space vector pulse width modulation (SVPWM) for an F-type three-level inverter (FT2LI) is presented in this article. The proposed SVPWM algorithm decreases the additional switching state transition of each triangle with the application of an improved nine- and three-segment reduction switching strategy. The main feature of the segment reduction technique is that it eliminates second-order harmonics in the inverter output side with good total harmonic distortion (THD), low switching losses, and minimum filter requirements when compared with carrier-based PWM (CBPWM) techniques such as multi-carrier sine PWM (MC-SPWM), sixty-degree PWM (60° PWM), and switching frequency optimal PWM (SFO PWM). The proposed modulation algorithm for FT2LI is implemented on the MATLAB/Simulink platform. The performance of the proposed segment reduction-based SVPWM algorithm is tested experimentally on an FT2LI at various amplitude and frequency modulation indices, and the experimental results are verified with the simulation results. Additionally, a comparative analysis carried out to study the relationship between the segment reduction-based SVPWM and CBPWM techniques inferred that the suggested segment reduction-based SVPWM algorithms can optimize high-order harmonic distributions and have a minimum computational burden.

A Bidirectional Grid-Tied ZVS Three-Phase Converter Based on DPWM and Digital Control

In this paper, a bidirectional grid-tied ZVS three-phase converter is proposed. The circuit operation principle in both the rectifier and inverter modes was analyzed. The proposed topology could achieve zero-voltage switching in the six main switches and the auxiliary switch both in the rectifier mode and inverter mode. In addition, the reverse recovery current of body diodes in the main switches was also suppressed. Furthermore, in order to realize the ZVS control scheme under the grid-tied bidirectional power flow condition and reduce the number of switchings, a modified carrier-based discontinuous PWM was proposed to fit the bidirectional switching sequence. Finally, a 3 kW prototype was constructed. Some simulation and experimental results are presented to verify the validity of the proposed circuit topology and PWM control scheme.

A CB-PWM Technique for Eliminating CMV in Multilevel Multiphase VSI

A generalized Carrier-Based Pulse Width Modulation (CB-PWM) scheme is proposed here for the elimination of common-mode voltage (CMV) in a multilevel multiphase voltage source inverter (VSI). In this CB-PWM scheme, the switching function of x-level, q-phase VSI is obtained from the switching function of virtual y-level and (y+1) level, q-phase VSI, where y = (x+1)/2 when x is odd and y = x/2 when x is even. It is established here that the pole voltages of q-phase x-level VSI thus obtained generate zero CMV. The proposed CB-PWM technique is computationally less intensive and hence can be easily implemented in hardware. Extensive simulation and experimental results are presented to validate the proposed CMV elimination technique in 3-phase 7-level VSI, 5-phase 5-level VSI, and 6-phase 4-level VSI. A comparative study of the proposed PWM scheme with the existing technique shows the superiority of the proposed technique in eliminating CMV.

A New Level Shifted Carrier Based PWM Technique for a Cascaded Multilevel Inverter Based Induction Motor Drive

The pulse width modulation (PWM) techniques are becoming the game changer for multi-pulse power converter fed multilevel inverter-based induction motor drive (IMD) due to their significant impacts on power quality. In this paper, a new level shifted carrier-based PWM technique is proposed for a 5-level cascaded H-bridge (CHB) multilevel inverter driven by a 36-pulse ac-dc converter based IMD. To meet the power quality demand of IEEE-519 at grid side, a modular transformer is used, and the transformer is coupled to form a 36-pulse ac-dc converter. A 5-level CHB multilevel inverter is utilized on the motor side, which uses the proposed carrier based PWM technique for switching action to ensure superior performance of the IMD. The proposed PWM technique is named as third-harmonic injected inverted sinusoidal carrier PWM (THI2SCPWM), which utilizes 3 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">rd</sup> harmonic injection principle with inverted sinusoidal signal to form the proposed carrier signal. The 5-level CHB inverter used in the IMD shows less power loss and total harmonic distortion (THD) with the proposed THI2SCPWM technique. Moreover, the IMD with the THI2SCPWM shows low stator voltage THD, stator current THD, and smooth dynamic response. Apart from these, the THI2SCPWM mitigates the torque ripple of the IMD. The motor drive system with the THI2SCPWM technique is modeled and its performance is simulated on MATLAB/Simulink environment. A scaled down experimental setup is utilized to validate the superiority of the proposed PWM technique.

Implementation of a modified carrier-based PWM technique for a cascaded MLI using DSP microcontroller

&lt;p&gt;&lt;span lang="EN-US"&gt;A multi-level converter is a power electronic device desired to generate a desired AC voltage level using several introduced DC voltages, the output voltage of the converter is characterized by a low harmonic content (THD) compared to conventional inverters. The adopted innovative design permits the independent control of PV modules, enabling, in this way, to operate independently and won’t be very affected by intermittence. Additionally in this paper, a new control strategy based on sinusoidal pulse width modulation (SPWM) technique is analyzed for cascaded H-Bridge inverter. In this new technique, separate modified carriers are used for each H-Bridge (HB). Multiple-carrier SPWM is used with the new control SPWM technique. Those carriers are being implemented with diverse sinusoidal dispositions phase disposition (PD), phase opposition and disposition (POD), alternative opposition and disposition (APOD), and with altered frequencies. Experimental results are obtained while using different operating conditions.&lt;/span&gt;&lt;/p&gt;

Modeling and analysis of the LC filter-integrated quasi Z-source indirect matrix converter for the wind energy conversion system

A Quasi Z-Source Indirect Matrix Converter (QZSIMC) is proposed in this paper for Permanent Magnet Generator (PMG) based Direct Drive Wind Energy Conversion Systems (DDWECS) to enhance the voltage transfer ratio and also to control the output voltage under various loading conditions. The QZSIMC comprises three Quasi Z-Source (QZS) networks connected between PMG and load through a three-phase Indirect Matrix Converter (IMC). Two different PWM control techniques such as Carrier Based Pulse Width Modulation Technique and Modified Space Vector Pulse Width Modulation Technique are proposed to analyze the performance of QZSIMC. By changing the shoot through time period, the duty ratio of quasi Z-Source network can be increased which in turn increases the boost factor of both QZSIMC without affecting the efficiency of the converter. A closed-loop control system has also been designed to sustain constant parameters at the output. The proposed QZSIMC for PMG based DDWECS along with two different PWM Control Schemes are to be modeled using MATLAB/SIMULINK environment. To validate the simulation results, a 1 kW, 415 V, 50 Hz experimental setup with an FPGA SPARTAN-6 processor has been developed in the laboratory for QZSIMC and the results are investigated based on the parameters such as output voltage, output current, Switching Stress, Boost Factor, inductor current, capacitor voltage, Total Harmonic Distortion.

Five-phase induction motor drive-A comprehensive review

Modern Electrical Vehicles (EV) and Electric Traction rely heavily on electrical drives. Every day, electric vehicles are being improved and expanded to include commercial vehicles such as passenger vehicles, goods delivery vehicles, and agricultural vehicles. Today, researchers are concentrating on multi-phase electrical drives to improve EV technology. This article provides a comprehensive analysis of the Five-Phase Induction Motor (FPIM) drive. The proposed study investigates the FPIM drive in terms of mathematical modeling and design, the different topologies of a Five-Phase Voltage Source Inverter (FPVSI) (Two-Level, Multi-Level, Matrix), the methodologies utilised to generate the pulse for FPVSI (Carrier-Based Pulse Width Modulation (CBPWM), Space Vector Pulse Width Modulation (SVPWM)), and the control of FPIM. This study evaluates the many strategies available in the literature for controlling the FPIM in order to assist researchers and industrial Research and Development (R&amp;amp;D) engineers in selecting the most suitable tool for their applications.

Individual Loss Reduction Technique for Each Phase in Three-Phase Voltage Source Rectifier Based on Carrier-Based Pulse-Width Modulation

Individual Loss Reduction Technique for Each Phase in Three-Phase Voltage Source Rectifier Based on Carrier-Based Pulse-Width Modulation

Comparative performance of modular with cascaded H-bridge three level inverters

&lt;span lang="EN-US"&gt;The conventional two-level inverter becomes no longer has the ability to cope with the high-power requirement, so this paper discusses two very common topologies of multilevel inverter like modular multi-level converter (MMC) and cascaded H-bridge (CHB) multi-level inverter for induction motor drive applications. This work attempts to investigate the comparison between MMC and CHB. The comparison is done in aspects of the configuration, concept of operation, advantages and disadvantages, the comparison is also consider output voltage (line to line) waveform, total harmonic distortion (THD) of the output line voltage waveform and the current drawn by both inverters. The performance of the inverters under carrier-based pulse width modulation (PWM) technique and mainly in-phase disposition (IPD), level shifted pulse width modulation is viewed. The paper discusses the comparison between the two multilevel inverters (MLIs) with motor drive applications especially induction motor. The operation of the motor is studied under certain value of load torque. The simulation results for the induction motor with the two inverters (modular multi-level and Cascaded H-bride) for three numbers of levels using MATLAB/Simulink are provided). The obtained results are encouraging and promising especially in the improvement of the THD% results.&lt;/span&gt;

Reliability evaluation of carrier‐based pulse width modulated three‐level F‐type neutral point clamped inverter with power loss analysis

AbstractAn improved carrier‐based pulse‐width‐modulation (CBPWM) technique for a three‐level (3L) F‐type neutral point‐clamped (FNPC) inverter is presented in this paper. By using the proposed modulation scheme, the DC‐link capacitor voltage at the neutral point is balanced. For manufacturers, reliability is one of the major concerns for all power electronics devices and parts. This paper proposes an extensive reliability analysis of the 3L‐FNPC inverter. Considering the mean time to failure (MTTF) of each device, the reliability of the 3L‐FNPC inverter is analyzed in this present work by using two different methods, which are the approximate method and the exact method. To compute the failure rate of the equipment, only the number of components is considered in the approximate method. Alternatively, exact methods are utilized to evaluate the reliability of a system by knowing the different stress levels and various operating environments of a specific system. Because of the strong correlation between device failure and temperature stress factors, power loss analysis is used in the exact method. The MATLAB Simulink environment is used to determine the power loss of the switching devices. A solar off‐grid photovoltaic (PV) system is considered for reliability testing. Experimental mission profile data are used to estimate the lifetime of the 3L‐FNPC inverter by applying the rainflow counting algorithm, the Coffin‐Manson model, and Miner's rule. The competitiveness, effectiveness, and reliability of the 3L‐FNPC inverter with the proposed modulation technique are validated using a hardware prototype.

A Flexible and Decoupled Space Vector Modulation Scheme With Carrier-Based Implementation for Multilevel Converters

This article proposes a novel space vector pulse width modulation (SVPWM) scheme for multilevel converters in <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">abc</i> coordinate system, in which the reference vector is decomposed into an offset vector and a remainder vector that can be synthesized using two-level SVPWM. The switching state satisfying a specific relationship is first selected as the offset vector such that the common-mode components are eliminated and therefore the phase voltages are decoupled. A dynamic reference point mechanism establishes a one-to-one correspondence between all available vector combinations and one unique variable, i.e., the number of level shifts. This feature further facilitates a general approach to determining the optimum switching states to satisfy different control objectives, such as common-mode voltage rejection. Besides, phase decoupling enables the introduction of carrier-based modulation to simplify implementation, where the duty cycle of the zero vector can be flexibly adjusted while the non-zero vectors remain the same to generate an equivalent output. Consequently, two-level SVPWM-based method and carrier-based PWM are combined to exploit their respective strengths. The proposed scheme achieves overmodulation operation, and provides more flexibility, i.e., redundant switching states and adjustable duty cycles, to optimize switching patterns. Simulation and experimental results validate the proposed algorithm.

A Carrier-Based Discontinuous PWM for an 80 Kw PV Inverter With the Reduction of the DC-Link Voltage Ripple and Common Mode Current

Discontinuous pulse width modulation (DPWM) method is broadly used in three-phase inverter to achieve high efficiency through the reduction of the switching loss. The high-power rating photovoltaic (PV) inverter with DPWM has its intrinsic issues such as large DC-link voltage ripple and high-frequency resonant current due to the large stray capacitance proportional to the power rating. To extend the application of DPWM from 10 kW to 80 kW PV inverter, a new DPWM method (DPWMn) which divides the clamping period into <i>n</i> intervals is proposed to achieve the three objectives simultaneously: 1) reduction of the DC-link voltage ripple; 2) suppression of the high-frequency current oscillation; 3) improve the efficiency compared to the continuous space vector PWM (SVPWM). The proposed DPWMn is validated by an 80 kW three-phase T-type PV inverter. Compared to the SVPWM, the DPWMn has reduced 30&#x0025; switching loss while maintaining the similar power quality and the common mode current. Compared to the existing DPWM methods, DPWMn reduces the voltage ripple by 52&#x0025; and has the minimum energy ripples. Furthermore, the carrier-based DPWMn only utilizes the measured voltage and can be easily implemented.

Carrier-Based Variable Frequency PWM Technique for PMSM Drives to Achieve Dispersed Spectrum and Extended Low-Speed Operation Capability

Carrier-Based Variable Frequency PWM Technique for PMSM Drives to Achieve Dispersed Spectrum and Extended Low-Speed Operation Capability

Self-aligned hybrid carrier-based PWM for modular multilevel converters

The self-aligned hybrid carrier-based pulse-width modulation (PWM) for modular multilevel converters (MMC) based on decentralized control is proposed in this paper. It is based on parallel cells in a submodule (SM) using self-aligned hybrid carrier-based PWM, which combines the concept of level-shifted carrier-based PWM (LSC-PWM) and phase-shifted carrier-based PWM (PSC-PWM) methods. By implementing a decentralized control system digitally, hybrid carriers align themselves. Each SM interacts with the other SMs and each parallel cell in an SM communicates with the other cells to generate hybrid carriers. The proposed control strategy makes advantage of the redundancy idea by adding or removing a cell in the case of cell malfunction and system reconfiguration. A current balancing method is incorporated into the decentralized control system to ensure current balance among parallel cells in an SM. The simulation results illustrate the effectiveness of the presented control method in piecewise linear electrical circuit simulation (PLECS) software.

A Circulating Current Suppression Strategy for MMC Based on the 2N+1 PWM Approach

Compared with other topologies, the modular multilevel converter (MMC) has the advantages of higher scalability and lower harmonic distortion. When carrier-based pulse-width modulation approaches are used for the MMC, the number of carriers increases for more sub-modules, and the complexity of the control and the memory required increases as a result. In addition, the synchronization of several carriers is another issue. Due to the unique constructional characteristics of the MMC, circulating currents will be generated internally, causing distortions in the arm currents and, thus, unnecessary converter losses. In this paper, an improved 2N+1 pulse-width modulation approach with low control complexity and a circulating current suppression strategy are proposed. Firstly, the conventional carrier phase-shifted 2N+1 pulse-width modulation approach is improved so that the number of carrier signals adopted in each arm is always two. Secondly, the redundant switching states are used to suppress the circulating current. Finally, the effectiveness of the proposed strategy is verified experimentally. The results show that the proposed method reduces the control complexity while retaining the output performance. Meanwhile, the circulating current can be suppressed.