Capacitor Voltage Regulation Research Articles

A Low-Power Microcontroller in a 40-nm CMOS Using Charge Recycling

A 40-nm microcontroller featuring voltage stacked memory and logic is presented. This involved connecting the power domains of the memory and logic in series, such that the ground of one power domain is connected to the positive supply rail of the other. In this paper, an ARM Cortex-M0+ and its peripherals are powered from 0 V to $V_{{\mathrm{DD}}}$ , while its 4-kB ROM and the 16-kB SRAM are powered from $V_{{\mathrm{DD}}}$ to 2 $V_{{\mathrm{DD}}}$ . Since the memory and logic will, in general, draw different supply currents, the midrail $V_{{\mathrm{DD}}}$ is provided by an on-chip switched capacitor voltage regulator (SCVR). To allow a direct comparison of voltage stacking with a conventional single supply, it can be turned off by configuring the SCVR to power both the memory and logic from 0 V and $V_{{\mathrm{DD}}}$ . Turning on voltage stacking results in 96% power conversion efficiency, while the active converter area is reduced by 2.6 $\times $ . Despite the use of a smaller SCVR, the voltage stacking reduces the supply noise by 3.4 dB and the output voltage drops from 58 to 36 mV.

A 10 W On-Chip Switched Capacitor Voltage Regulator With Feedforward Regulation Capability for Granular Microprocessor Power Delivery

Granular power delivery with per-core regulation for microprocessor power delivery has the potential to significantly improve the energy efficiency of future data centers. On-chip switched capacitor converters can enable such granular power delivery with per-core regulation given a high efficiency, high power density, fast response time, and high output power converter design. This paper details the implementation of an on-chip switched capacitor voltage regulator in a $32\,\mathrm{n}\mathrm{m}$ SOI CMOS technology with deep trench capacitors. A novel feedforward control for reconfigurable switched capacitor converters is presented. The feedforward control reduces the output voltage droop following a transient load step. This leads to a reduced minimum microprocessor supply voltage, thereby reducing the overall power consumption of the microprocessor. The implemented on-chip switched capacitor voltage regulator provides a $0.7-1.1$ V output voltage from $1.8$ V input. It achieves a $85.1\%$ maximum efficiency at $3.2\,\mathrm{W}\mathrm{/}\mathrm{m}\mathrm{m}^2$ power density, a subnanosecond response time with improved minimum supply voltage capability, and a maximum output power of $10\,\mathrm{W}$ . For an output voltage of $850\,\mathrm{m}\mathrm{V}$ , the feedforward control reduces the required voltage overhead by $60\,\mathrm{m}\mathrm{V}$ for a transient load step from $10\%$ to $100\%$ of the nominal load. This can reduce the overall power consumption of the microprocessor by $7\%$ .

Sliding Mode Control of Single-Phase Grid-Connected Quasi-Z-Source Inverter

Quasi-Z-source inverters (qZSIs) are nowadays increasingly used owing to advantages such as single-stage operation, lower component rating, and continuous input current and common dc rail. These benefits lead to investigate this converter for grid-connected applications. This paper presents a grid-connected qZSI with both ac and dc side control. Sliding mode control (SMC)-based controller for capacitor voltage regulation has been proposed to ensure a fast and dynamic response for wide variations in input voltage, output load, and reference controlled quantity. A detailed mathematical model of the system is presented. A stable and fast response of SMC has been demonstrated using simulation and is validated by experimental results.

A DC Capacitor Voltage Control Method for Active Power Filters Using Modified Reference Including the Theoretically Derived Voltage Ripple

This paper proposes a new dc capacitor voltage control method suitable for active power filters equipped with a small dc capacitor. The proposed control method calculates the theoretical dc capacitor voltage ripple and provides it to the dc capacitor voltage feedback controller as the reference. As a result, the proposed method has the capability to regulate the mean value of the dc capacitor voltage under a large voltage ripple condition. The proposed method also allows us to use a high feedback gain for suppressing the capacitor voltage fluctuations without any performance deterioration in the harmonic compensation. Experimental results confirm a good harmonic compensation and an effective voltage regulation performance under a small dc capacitor condition. The results also demonstrate a significant improvement in the capacitor voltage regulation even when a sudden load change occurs.

DC-Link Capacitor Voltage Regulation for Three-Phase Three-Level Inverter-Based Shunt Active Power Filter with Inverted Error Deviation Control

A new control technique known as inverted error deviation (IED) control is incorporated into the main DC-link capacitor voltage regulation algorithm of a three-level neutral-point diode clamped (NPC) inverter-based shunt active power filter (SAPF) to enhance its performance in overall DC-link voltage regulation so as to improve its harmonics mitigation performances. In the SAPF controller, DC-link capacitor voltage regulation algorithms with either the proportional-integral (PI) or fuzzy logic control (FLC) technique have played a significant role in maintaining a constant DC-link voltage across the DC-link capacitors. However, both techniques are mostly operated based on a direct voltage error manipulation approach which is insufficient to address the severe DC-link voltage deviation that occurs during dynamic-state conditions. As a result, the conventional algorithms perform poorly with large overshoot, undershoot, and slow response time. Therefore, the IED control technique is proposed to precisely address the DC-link voltage deviation. To validate effectiveness and feasibility of the proposed algorithm, simulation work in MATLAB-Simulink and experimental implementation utilizing a TMS320F28335 Digital Signal Processor (DSP) are performed. Moreover, conventional algorithms with PI and FLC techniques are tested too for comparison purposes. Both simulation and experimental results are presented, confirming the improvement achieved by the proposed algorithm in terms of accuracy and dynamic response in comparison to the conventional algorithms.

A Fully Integrated Switched-Capacitor Regulator With Frequency Modulation Control in 28-nm FDSOI

The fully integrated switched capacitor voltage regulator comprises power cells distributed as a ring around the digital area to supply while the MIM capacitors are stacked above. Multiratio cells provide a wide output voltage range from $0.2$ to $1.1\;{\rm V}$ with an input voltage of $1.8\;{\rm V}$ . A frequency modulation control loop is designed with proportional-integral control. Sampled-data modeling is used to derive the necessary transfer functions to build the control loop. A primarily test chip is fabricated in 28-nm FDSOI technology to evaluate the design. A power density of $310\;{\text{mW/}}{\text{mm}^2}$ is achieved at $72.5\%$ peak efficiency with a silicon area overhead of $11.5\%$ .

Multistage Long-Term Expansion Planning of Electrical Distribution Systems Considering Multiple Alternatives

This paper presents a new mixed-integer linear programming (MILP) model to solve the multistage long-term expansion planning problem of electrical distribution systems (EDSs) considering the following alternatives: increasing the capacity of existing substations, constructing new substations, allocating capacitor banks and/or voltage regulators, constructing and/or reinforcing circuits, and modifying, if necessary, the system's topology. The aim is to minimize the investment and operation costs of the EDS over an established planning horizon. The proposed model uses a linearization technique and an approximation for transforming the original problem into an MILP model. The MILP model guarantees convergence to optimality by using existing classical optimization tools. In order to verify the efficiency of the proposed methodology, a 24-node test system was employed.

A General Active Capacitor Voltage Regulating Method for L-Level M-Cell N-Phase Flying Capacitor Multilevel Inverter With Arbitrary DC Voltage Distribution

The flying capacitor multilevel inverter (FCMLI) is one of the well-known structures of multilevel inverters having attracted considerable attention because of its merits. In spite of its many advantages, it has some limitations such as high volume and complicated control method because of its bulky capacitors and their voltage balancing requirement. Moreover, the high number of power semiconductors required makes this structure susceptible to failure. To increase the ratio of the number of levels to the number of components, an uneven distribution of capacitor voltages has been suggested in previous reports; however, this approach complicates the control method. Up to now, almost all presented methods suffer from high computational load and/or structure-dependent algorithm. In this paper, a simple state-based and structure-independent method is proposed for capacitor voltage regulation. The proposed method is straightforward and can perform online computation of switching sequences in a computationally efficient manner without any need for stored information or look-up tables. The method is conveniently extendible to any number of cells and levels in an FCMLI structure with arbitrary dc link voltage distribution schemes. Simulation and experimental results show the effectiveness and simplicity of this method.

Integrated volt/Var control in modern distribution power systems based on support vector machines

Summary Integrated volt/Var control (IVVC) is an important tool to optimize voltage and VAR resources and improve energy efficiency and, therefore, plays an important role to support the smart grid vision. This paper investigates the application of support vector machines (SVMs) to control switched capacitor banks and voltage regulators of distribution systems in order to minimize system losses and maintain acceptable voltage profile. The objective is to develop an approach that can use voltage/current measurements provided by active and reactive monitors to IVVC control without the need to perform retraining or repeat optimization simulations. The performance of the SVM scheme for different input selection (i.e., active and reactive power and node voltage) is discussed. Moreover, the generality of the proposed SVM scheme is investigated under noisy environment as well as under network reconfiguration. Studies on a typical distribution system show that the proposed approach has been able to achieve satisfactory results. Copyright © 2016 John Wiley & Sons, Ltd.

Power Flow Analysis and DC‐Capacitor Voltage Regulation for the MMCC‐DSCC

SUMMARYThis paper discusses power flow analysis and DC capacitor voltage regulation of a modular multilevel cascaded converter (MMCC) based on double‐star chopper cells (DSCC). This analysis reveals the relationship between the circulating current through the DC link and the average power flowing out of or into each chopper cell. The DC component of the circulating current supplies half the active output power to the upper and lower strings of the chopper cells, while in contrast the fundamental frequency component transfers an amount of power between the upper and lower strings. Thus, the MDCC–DSCC can balance the capacitor voltages among the cells by controlling the amplitude of the fundamental frequency component of the circulating current. A new control method based on power flow analysis is employed, and its effectiveness is verified by circuit simulation.

A Framework for Volt-VAR Optimization in Distribution Systems

The possibility of leveraging the data provided by smart meters to understand the load characteristics is studied in this paper. The loads are modeled as voltage-dependent elements to increase the accuracy of volt-VAR optimization (VVO) techniques for distribution systems. VVO techniques are part of the distribution management system and may be used for purposes such as loss reduction, voltage profile improvement, and conservation voltage reduction. A deterministic framework is proposed that formulates the VVO problem as a mixed-integer quadratically constrained programming problem, which is solved efficiently using advanced branch-and-cut techniques. The proposed framework is capable of optimally controlling capacitor banks, voltage regulators, and under-load tap changers (ULTCs) for day-ahead operation planning. The results indicate that loss reductions of up to 40% and a total demand reduction of up to 4.8% are achievable under some loading conditions in a radial test system. The effect of the load voltage dependence is also demonstrated through analytical simulations.

Sampled-Data Modeling of Switched- Capacitor Voltage Regulator With Frequency-Modulation Control

The development of systems-on-chip requires embedded power management solutions due to the large number of power domains. The switched-capacitor voltage regulator is a suitable candidate as capacitors may be integrated whereas inductors still suffer limitations in that respect. Literature covers proposals of optimized power stages and several dedicated controllers for switched-capacitor DC-DC converters. Unfortunately the results do not cover systematic stability analyses. The paper proposes an original and systematic approach for the stability analysis of a switched-capacitor voltage regulator using sampled-data modeling. An application is given for a one-phase converter with a frequency-modulation based controller. The stability of the open-loop and closed-loop model is proposed and can be extended to multi-phase configurations.

Robust and Generic Control of Full-Bridge Modular Multilevel Converter High-Voltage DC Transmission Systems

This paper presents the theoretical basis of the control strategy that allows the cell capacitor voltage regulation of the full-bridge modular multilevel converter (FB-MMC) to be controlled independent of its dc-link voltage. The presented control strategy permits operation with reduced dc-link voltage during a permanent pole-to-ground dc fault, and controlled discharge and recharge of the HVDC links during shutdown and restart following clearance of temporary pole-to-pole dc faults. In addition, it allows voltage-source-converter (VSC)-based HVDC links that employ FB-MMC to operate with both positive and negative dc negative dc-link voltages. This feature is well suited for hybrid HVDC networks, where the VSCs operate alongside the line-commutating current source converters, without any compromise to the power reversal at any terminals. The usefulness of the presented control strategy is demonstrated on the full-scale model of the HVDC link that uses FB-MMC with 101 cells/arm, considering the cases of pole-to-ground and pole-to-pole dc faults.

A new optimal approach for improvement of active power filter using FPSO for enhancing power quality

Abstract In the recent years, development of industry cause to increase nonlinear and time variant loads in power systems. These loads bring about power quality phenomena such as voltage and current harmonics, current unbalance and flicker in power systems. In this paper, an optimal method for active power filter is proposed to improve power quality. The control system of APF is based on combination of the synchronous detection method, instantaneous power theory, and output of DC capacitor voltage regulator. To stabilize the DC voltage and improvement of reference currents, PID controller is suggested. Regarding to intense changes of load in power system due to nonlinear load, PID controller with fixed parameters could not adequate for the APF control. Therefore, Fuzzy Particle Swarm Optimization method is proposed for optimizing of PID controller. This method is found on PSO and Fuzzy algorithm. To evaluate the proposed method, the APF is modeled in the worst conditions with a power system loaded with two electric arc furnace. In addition, in order to make good use of frequency changes in the power system, the power frequency estimation is put to use.

Mitigation of Harmonic Distortion in Microgrid System Using Adaptive Neural Learning Algorithm Based Shunt Active Power Filter

Abstract This paper presents the enhancement of power quality for a microgrid system at distribution level using Shunt active power filter. The main objective of this paper is to identify a suitable controller technique for obtaining a better compensation capability of shunt active power filter. The compensation capability of the device is mainly depends on the regulation of DC link capacitor voltage. Conventionally this voltage regulation is achieved by the closed loop operation of PI controller. To raise the performance of shunt active power filter, neural learning algorithm technique has been proposed here. The comparison of different pulse generation technique and the performance of proposed techniques have been verified in the platform of MATLAB/SIMULINK model.

Economic Evaluation of Distribution System Smart Grid Investments

This article investigates the economic benefits of smart grid automation investments. A system consisting of 7 substations and 14 feeders is used in the evaluation. Here benefits that can be quantified in terms of dollar savings are considered, termed “hard dollar” benefits. Smart grid investment evaluations to be considered include investments in improved efficiency, more cost effective use of existing system capacity with automated switches, and coordinated control of capacitor banks and voltage regulators. These smart grid evaluations are sequentially ordered, resulting in a series of incremental hard dollar benefits. Hard dollar benefits come from improved efficiency, delaying large capital equipment investments, shortened storm restoration times, and reduced customer energy use. Analyses used in the evaluation involve hourly power flow analysis over multiple years and Monte Carlo simulations of switching operations during storms using a reconfiguration for a restoration algorithm. The economic analysis uses the time-varying value of the locational marginal price. Algorithms used include reconfiguration for restoration involving either manual or automated switches and coordinated control involving two modes of control. Field validations of phase balancing and capacitor design results are presented. The evaluation shows that investments in automation can improve performance while simultaneously lowering costs.

Analysis of cascaded multilevel inverters for active harmonic filtering in distribution networks

Abstract This paper aims at the investigation of an active power filter (APF) comprised of a transformerless multilevel inverter (MLI) for power conditioning in three-phase three-wire distribution network. The inverter topologies used here are three, five, seven and nine-level. The system configuration mainly involves cascaded MLI structure of APF, generation of compensation filter currents based on instantaneous active and reactive current component (id–iq) method and dc-link voltage regulation using a PI controller. Not many papers focus on the regulation of dc-link capacitor voltage. Here we have proposed the implementation of bacterial foraging optimization (BFO) to extract the gains of PI controller. The proposed work provides improved dc-link voltage regulation, quick prevail over current harmonics and reduction of overall source current THD. Adequate MATLAB/Simulink simulation results are presented for the different cascaded MLIs discussed above. Additionally, the performance has been validated in real-time using Opal-RT Lab simulator considering three different conditions of supply i.e., balanced sinusoidal, balanced non-sinusoidal and unbalanced sinusoidal.

English

This paper presents a new control technique to regulate the capacitor voltage in cascaded multilevel inverters. Without requiring transformers, the scheme proposed here allows the use of a single dc power source with the remaining n − 1 dc sources being capacitors. This paper focuses mainly to achieve an effective capacitor voltage regulation with the Phase shift modulation and energy storage using Ultra-capacitors as they have higher power density, higher efficiency, longer life and greater cycling capability in cascaded multilevel inverters. It shows hope to reduce the voltage ripple of the capacitors, which leads to higher power conversion efficiency with equal power distribution, reduces the initial cost, and complexity hence it is apt for industrial applications. In this paper a 5-level cascaded multilevel inverter with induction motor drive is considered. Finally, the simulation results validate the concept of this topology.

English

This paper presents a new control technique to regulate the capacitor voltage in cascaded multilevel inverters. Without requiring transformers, the scheme proposed here allows the use of a single dc power source with the remaining n − 1 dc sources being capacitors, which can achieve an effective role on harmonic elimination while generating the ideal output voltage. This paper focuses mainly to achieve an effective capacitor voltage regulation, and the effect of power factor on capacitor voltage regulation with the Phase shift modulation. The main advantages of this paper are to eliminate the harmonics, high-quality output power due to its high number of output levels. It shows hope to reduce the voltage ripple of the capacitors, which leads to higher power conversion efficiency with equal power distribution, reduces the initial cost, and complexity hence it is apt for industrial applications. Simulation work is done using the MATLAB software and experimental results have been presented to validate the theory.

System-Level Optimization of Switched-Capacitor VRM and Core for Sub/Near- <inline-formula> <tex-math notation="TeX">$V_{t}$</tex-math></inline-formula> Computing

This brief proposes to jointly optimize a switched capacitor voltage regulator module (SC-VRM) combined with a compute core to minimize system energy per instruction. Past work seeking to optimize system energy efficiency has focused on separately maximizing SC-VRM efficiency or operating the compute core at its minimum energy operating point (MEOP). We first propose and verify a core-aware SC-VRM energy model, which explicitly accounts for throughput constraints. Second, we perform joint optimization considering throughput unconstrained applications (TUA) and throughput constrained applications (TCAs). We show that, for TUA, the system MEOP (S-MEOP) voltage is different from both the core MEOP (C-MEOP) and VRM maximum efficiency point (V-MEP) voltages, and operating at S-MEOP achieves 12.3% and 21.8% energy savings compared with C-MEOP and V-MEP, respectively. For TCA, S-MEOP is achieved at the same voltage as C-MEOP but different from the voltage for V-MEP, and 38.9% energy savings can be obtained by operating at S-MEOP.