Capacitor Voltage Balancing Research Articles

Performance of Reduced-DC-Source-Based Three-Phase High-Resolution Multilevel Inverter With Optimal Asymmetry

Asymmetrical cascaded bridge multilevel converters use voltage sources of different magnitudes to generate a higher number of levels. However, the availability of sources of different ratings feeding the bridges is a limitation. This article overcomes such a limitation by utilizing the concept of capacitor voltage balancing using the level doubling network (LDN) principle in the space-vector plane. With the use of optimal asymmetry, the presented topology can generate 43 levels at the output line voltage by using only 12 switches per phase. Hence, the most notable attribute of the presented topology is that it does not require isolated auxiliary power supplies to develop such a high-resolution output voltage. LDNs in this topology are self-balanced, and the auxiliary full-bridges require a closed-loop controller to balance their dc bus capacitor voltage. To validate the proposed concept, MATLAB simulations and experimental results are presented in this article.

New Configuration of Five-Level NPC Inverter with Three-Level Boost Converter for Photovoltaic Solar Energy Conversion

This paper deals with the modeling and control of a new two-stage photovoltaic conversion cascade composed of a Three-Level Boost (3LB) converter and a three-phase NPC five-level inverter (5LI). The main objective is to ensure the continuity of energy transfer from a renewable continuous source to the electrical grid while regulating the voltages of the DC bus capacitors with a new proposed configuration. The 3LB is controlled in MPPT based on fuzzy logic. A PI regulator is introduced into the 3LB regulation loop in order to maintain the equality of the two output voltages. The overall voltage of the DC bus being regulated by the control of the multilevel inverter interconnected to the grid, using synchronous reference frame control. Therefore, in our case there is the problem of voltages imbalance caused by the 5LI. We propose in this work to introduce two Clamping Bridges (CBs) each one is composed by a transistor in series with a resistor. These CBs are introduced in parallel with two capacitors of the DC bus. This solution avoids us to use the control algorithm by redundant configurations in the regulation loop of the 5LI. The results obtained show the effectiveness of the proposed control in stabilizing and maintaining the four DC bus voltages at equal values. With four balanced capacitor voltages, we get symmetrical inverter output voltage waveforms, which directly affects the quality of the current injected to the grid.

Performance Assessment of Eight-Switch 11-Level Packed U Cell Converter Under Dynamic Solar Photovoltaic Environment

This article presents a new 11-level packed U cell (PUC) converter with less active switches for solar photovoltaic (PV) applications. This PUC converter comprises eight active switches with two capacitors and a PV array. Compared to the existing topology, the proposed topology has the ability to attain 11 levels in converter output voltage, with fewer active switches. The operating modes of the 11-level PUC converter are discussed. A single-phase active and reactive power (PQ) control with the capacitor voltage balancing is incorporated for grid-tied configuration. The maximum power point tracking (MPPT) using perturb and observe is used from the PV array. The balancing of floating capacitors is achieved by proportional–integral (PI) controllers. This helps in achieving desired converter voltage levels. Conduction and switching losses are calculated for the efficiency of the system. Eleven-level PUC converter performance is analyzed in steady-state and dynamic conditions using the OPAL-RT test bench.

A SiC and Si Hybrid Five-Level Unidirectional Rectifier for Medium Voltage Applications

Following the continuous development of wide bandgap (WBG) devices and multilevel converter technology, medium voltage active front ends are becoming promising in future high-power-density and high-power applications. However, the cost issue is one of the major drawbacks, which stops the WBG devices from being widely applied in high-power areas. This article proposes a silicon carbide (SiC) and silicon (Si) hybrid five-level unidirectional rectifier. It requires only four SiC <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">MOSFET</small> s with relatively low blocking voltage and four Si diodes. Meanwhile, by adding snubber capacitors, all the Si devices are with low-speed switching, and the voltage stresses of fast SiC <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">MOSFET</small> s are minimized. In this article, operational analysis and carrier-based phase-disposition pulsewidth modulation scheme for this circuit are discussed in detail. The capacitor voltage balancing and unity power factor are both realized. Simulation and scaled-down experimental results are demonstrated to verify the proposed rectifier. Furthermore, the comparison of the hybrid five-level rectifiers is given to show the advantages of the proposed rectifier in terms of voltage stress, efficiency, and cost.

A Hybrid Nine-Level Inverter With Reduced Components and Simplified Control

To reduce component count and realize the self-balance of capacitors, a hybrid inverter is proposed in this article, which is the combination of a switched-capacitor (SC) cell and flying capacitor (FC) structure. Due to the introduction of FC, the inrush charging current is limited, which reduces the current stress. The significant advantages of the proposed topology are embodied in the reduced component count, simplified control, and voltage-boosting capacity. Four pairs of complementary switches, a diode, and only two capacitors are employed to generate nine levels. The FC can naturally balance at <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$0.5V_{\text {dc}}$ </tex-math></inline-formula> for a given operating cycle, enabling a sensorless operation. Therefore, the simplified control is reflected in the inherent voltage balance of capacitors and four independent control signals from the controller. Also, the system cost is greatly reduced. Self-balance, the assessment of the charging process, and loss calculation have been introduced. Afterward, quantitative comparison and loss compared with the recently proposed nine-level inverter are conducted, demonstrating the merits of reduced active components, simplified control, high cost-effectiveness, and low power loss. Finally, experimental results are given to validate the feasibility of the proposed topology.

Design and Implementation of a Single-Source 17-Level Inverter for a Single-Phase Transformer-Less Grid-Connected Photovoltaic Systems

Transformer-less multilevel inverters (MLIs) based on switched capacitors are gaining importance due to the voltage boosting ability from a single-input DC source and inherent capacitor voltage balancing capability. Most of the grid-connected transformer-less inverters are five-level and are commonly grounded so that their leakage current is zero. However, some major challenges like higher total standing voltage (TSV), more losses due to capacitor voltage ripples, higher charging current, and peak VA rating of the switches are comparatively higher. The motivation of the proposed work is to reduce the voltage ripple across the capacitors, minimum TSV, higher efficiency close to 98% at 1 kW, and lower cost. By using a modified sinusoidal pulse width modulation (SPWM) technique for the proposed single-phase 17-level inverter, a transformer-less grid-interfacing can be realized as the leakage current is (≈22 mA) well within the acceptable value (<300 mA) and is independent of the switching frequency. To validate the performance of the proposed structure, its performances are compared with the recently developed transformer-less inverters. The experimental prototype of a 1-kW single-phase 17-level inverter is designed and tested for grid-connected and standalone mode, and the corresponding results are verified.

An Efficient Sorting Algorithm for Capacitor Voltage Balance of Modular Multilevel Converter With Space Vector Pulsewidth Modulation

Thisarticle presents an efficient analogue sorting algorithm for balancing the submodule (SM) capacitor voltages of modular multilevel converter (MMC). The proposed analogue sorting algorithm offers the advantage of fast convergence rate without any need of recursive loops for the implementation on embedded devices. It can be easily implemented with combinational logic operations on field programmable gate array (FPGA) and provides less hardware and computational overhead. The functionality and performance of the proposed analogue sorting algorithm is evaluated with the simulation model of three phase five-level MMC in MATLAB/Simulink environment. The real time implementation of the proposed sorting algorithm with the SM capacitor voltage balancing strategy is implemented on Altera/Cylone - I (EP1C12Q240C8N) FPGA. A five-level continuous space vector pulsewidth modulation (CSVPWM) is realized on a PIC microcontroller (PIC18F452). A down-scaled model of single-phase five-level MMC is designed and constructed to investigate the reliable and stable operation of MMC with the proposed analogue sorting algorithm and SVPWM method. Simulation and experimental results are presented for validation.

A Generalized Simplified Virtual Vector PWM to Balance the Capacitor Voltages of Multilevel Diode-Clamped Converters

This article presents a generalized simplified virtual vector pulsewidth modulation (SVVPWM) to attain the capacitor voltage balancing of multilevel diode-clamped converter (DCC) for all operational conditions, which is not possible by using conventional space vector pulsewidth modulation (PWM) and carrier-based PWM methods. Virtual vector PWM is a solution presented in the literature to sort out this issue but it becomes more complex for higher level converters. The proposed SVVPWM method is simple and easy to implement for any level converter because it converts the space vector (SV) diagram of any level converter to three-level SV diagram. The SVVPWM assures the natural voltage balancing under steady states and ideal operations. Under dynamic operations, a generalized equation that describes the influence of neutral point currents on dc-link capacitor's voltage has been derived and a general decoupled voltage balancing control for <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">n</i> -level DCC is presented. The proposed modulation method is implemented on five-level and seven-level DCCs to authenticate the effectiveness of decoupled voltage balancing control. Simulation and experimental results demonstrate that the proposed modulation strategy is easy to implement and effectively controls the balance of the capacitor voltages for the whole range of modulation index and load power factor.

Performance evaluation of model predictive control method for neutral point clamped inverter

The neutral-point clamped (NPC) inverter is a popular three-level converter topology used in motor drive applications and other dc/ac converter systems. In this paper, the performance evaluation of the model predictive control is performed to investigate its applicability in controlling NPC inverters. The model predictive control (MPC) is a promising closed-loop control strategy in applications where multiple control goals are considered. The ease of adding the objectives to the control law improves the reputation of the MPC. The numerous control goals can be regulated in single feedback. Thus, the adequate bandwidth is noticeably higher compared to the traditional linear controllers. However, controlling the multiple objectives require the use of weighting factors to tune the system performance. Regarding the system performance, multiple reference tracking performance is investigated in this study. Our case study considers three control goals: output load current, switching frequency control, and capacitor voltage balancing. The predictive control is designed to regulate these dynamics, and comprehensive performance analyses are performed. The designed controller is tested using a simulation tool. The simulation results prove that predictive control offers an excellent multi-objective control performance provided that the weighting factors and other design parameters are finely adjusted. The poor selection of the design parameters affects the closed-loop performance, and the conducted analyses show the effects of the controller parameters.

Cyber-Attacks in Modular Multilevel Converters

Distributed control of modular multilevel converter (MMC) submodules (SMs) offers several potential benefits such as flexibility, scalability, and modularity. In this approach, low-level control tasks, such as capacitor voltage balancing, can be distributed amongst controllers placed in the SMs. This decreases the computational burden for the central control system that performs high-level control tasks; also, a single point of failure is avoided. Distributed control architecture requires a cyber-physical network (CFN) through which local controllers share all the information necessary to perform their respective control loops. To date, none of the reported works in this field have paid attention to potential imperfections in the CFN. Indeed, previous works are based on the assumption that the network always provides correct information to the local controllers. However, erroneous measurements in the CFN may degrade the distributed control scheme operation, leading to suboptimal or even unstable operation. These events can occur in the presence of cyberattacks, for example, which can be created through illegitimate data intrusion into the distributed control architectures. This article is the first to investigate the impacts of cyberattacks on distributed control schemes used in MMCs. The effects of a specific cyberattack, named false data injection attack (FDIA), on a consensus-based distributed control strategy are studied in this article. Additionally, a method for detecting FDIAs is proposed, along with a countermeasure strategy, to ensure the safe operation of the MMC, while the attack is cleared. The proposals reported in this article are validated using simulation and experimental results.

Cascaded Multilevel Rectifiers for Open-End Winding PMSM

This article proposes three-phase cascaded multilevel rectifiers for wind energy conversion system applications. These configurations operate as machine-side converters and play an essential role in the integration of wind power generation units. The proposed rectifiers are connected to a permanent magnet synchronous machine by an open-end winding arrangement, making the ac–dc conversion of the power delivered with high-power factor operation. Their structures are composed of a combination of a converter based on Vienna rectifiers and one H-bridge per phase with a floating capacitor. Compared with the conventional configurations, the proposed ones provide sinusoidal currents with lower harmonic distortion using, proportionally, a fewer number of controlled switches. Furthermore, they can operate with a lower switch blocking voltage. These features make them attractive options for industrial applications due to their good performance, providing an interesting cost–benefit. The system model, pulsewidth modulation technique, capacitor voltage balancing, and control strategy are detailed. Computer simulations and experimental tests are provided in order to validate their feasibility.

A Single-Stage Boost-Derived T-Type Inverter With Self-Balanced Capacitor Voltage

This article proposes a novel single-stage three-level buck–boost inverter based on voltage multiplier cells. The characteristics of the proposed topology are listed as 1) providing buck–boost operation in a single-stage power conversion, 2) reducing the number of components, 3) low component rating, and 4) automatic capacitor voltage balance without requiring any voltage sensors. A space-vector modulation (SVM) technique is introduced to control the proposed inverter and improve the quality of the output voltage waveform. In the SVM scheme, three nearest vectors are used to generate the output voltage vector in any switching period. The upper shoot-through switching state is adopted to provide buck–boost operations. This state is added within the small N-type vectors. The operating states, steady-state analysis, component selections, and comparison analysis are detailed. A 1-kVA laboratory prototype is built to validate the effectiveness of the proposed inverter. The experimental results show that the switch operates under a zero-voltage switching conditions for both turning- <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">on</small> and - <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">off</small> . Moreover, the capacitor voltage self-balanced characteristic keeps the voltage difference within 3.8% of the average capacitor voltage.

A Five-Level Nested Diode-Clamped Converter for Medium-Voltage Applications

This article presents a new three-phase five-level converter topology with a single dc source. The proposed topology combines the features of the conventional flying capacitor multicell and diode-clamped multilevel topologies. An important advantage of the proposed topology is the reduced volt-ampere, and hence, the volume, of the flying capacitors in its structure while keeping the same voltage blocking capability for semiconductor switches. The appropriate modulation strategy along with the flying capacitor voltage balancing technique is presented. To show the advantages of the proposed converter, different performance criteria such as switch count and rating, volt-ampere of flying capacitors, component cost, losses, and switching frequency are compared with some existing five-level topologies with a single dc source and the same voltage rating of switches. The results indicate that the proposed structure is superior to other five-level converters from different standpoints of the performance criteria. Simulation results are shown to verify the converter operation and its performance. The validity of the theoretical analysis is verified by experimentation on a scaled-down prototype system.

Model predictive control of Packed U-Cell inverter for microgrid applications

In this paper, an outline of microgrid arrangements and control methods at various hierarchical levels of Packed U-Cell (PUC) converters are provided. The paper discusses the control of these topologies using various techniques. The goal of these control strategies is to maintain a small THD, superior steady-state, fast-dynamic response, and high-power factor while balancing capacitor voltages under different operating conditions. The PI current controller is modelled on five and seven-level PUC inverters. The PI voltage and current controllers have also been modelled on a seven-level PUC inverter. Thereafter, model predictive control of five, seven and fifteen level inverters are also formulated and then simulated using MATLAB/Simulink. Finally, HIL validation of different PUC inverters is performed.

Thyristor-Based T-Type Converter With Modular Multilevel DC-Link

This article proposes a thyristor-based T-type converter with modular multilevel dc-link (TTC-MMD), where the thyristor-based T-type converter provides the basic phase commutation capability and two arms of cascaded submodules in dc-link generate the multilevel switching line voltages. To guarantee the successful turn- <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">on</small> and turn- <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">off</small> of thyristors, one full-bridge submodule (FBSM) is embedded in each arm. In addition, the FBSM can also be employed to participate in the multilevel switching modulation. For real applications, the TTC-MMD can be employed as a medium-/high-voltage static synchronous compensator, which features triplen frequency fluctuation of capacitor voltages and easy balancing of capacitor voltage under various operation conditions due to the common dc-link shared for three phases. It can also be implemented in other medium-/high-voltage applications. Finally, simulation and experimental results verified the performance of the proposed converter.

Isolated seven‐level inverter for grid‐connected power systems with predictive control method

AbstractA novel isolated 7‐level (7L) multi‐level inverter (MLI) topology for grid‐connected medium and high voltage power applications is presented in this paper. The topology consists of two isolated transformers with different winding ratio and four switches connected to a single‐phase grid. This topology provides a great advantage over conventional MLIs by reducing passive and active components to allowing a 7L output voltage. Moreover, model predictive control (MPC) method is implemented to 7L‐MLI to generate gate signals of switches and ensure capacitor voltage balancing and grid connection. Performance of proposed topology has been confirmed by in‐depth analysis under simulation and laboratory setup with existing studies. Experimental results of a 1.5 kW 220 Vrms prototype are presented to support the simulation results. The prototype shows that the harmonic results match the limits of the IEC 61000‐3‐2 standard and show a better performance for grid connection and capacitor voltage balancing than conventional ones.

Hybrid injection strategy of sub-module voltage ripple suppression for MMC under low frequency operation

Energy crisis and climate changes have brought great challenges to traditional power generation and transmission. Nowadays, the power transmission system of VSC-HVDC attracts more and more attention. The reactive and active power can be separately controlled, which greatly improves the flexibility of power transmission. Moreover, the harmonic content of this system is extremely low. As an important topology of HVDC system, modular multilevel converters (MMC) have significant advantages. However, there is a problem of excessive circulating current between phases in MMC, which easily causes the fluctuation amplitude of the capacitor voltage in each sub-module to be extremely large, or even unstable. An improved method to suppress the circulating current is proposed in this paper. In order to balance the voltage of each capacitor, the average capacitor voltage control of the outer loop is used. Meanwhile, an independent controller of voltage balance and a controller of arm voltage balance are applied. In order to eliminate the circulating harmonics of currents, a controller of quasi-PR is adopted for the inner control loop. Then, a simulating model of MMC system was established to prove the effectiveness of the proposed method. Finally, an experimental prototype was built and the corresponding tested results are given. It is proved that the proposed method has obvious advantage on suppressing harmonic circulating current and capacitor voltage balance control.

A Non-Isolated DC-DC Modular Multilevel Converter with Proposed Middle Cells

Unlike the modular multilevel converter (MMC) topology operated under the rectifier or inverter modes, control of the balanced state for the submodule (SM) capacitor voltage has emerged as the key issue for DC-DC MMCs. This is mainly caused by no balanced alternative powers being used for balancing SM capacitor voltages, which can be absorbed from the input or output DC sides of the converter. Typically, the alternative voltages and currents should be injected to achieve SM capacitor voltage balance in the DC-DC MMC. However, this solution is based on the cost of adopting the bulky LC filter components. For interconnecting different DC voltages in medium-voltage applications, this paper presents a non-isolated DC-DC MMC equipped with the proposed middle cells. It is intended to achieve DC voltage conversion without adopting bulky passive LC filters. On the one hand, the alternative currents, used for balancing the SM capacitor voltages, are arranged for flowing only within the phase legs of the proposed DC-DC MMC without disturbing the input current. On the other hand, through appropriate control of the middle cells, compensated components can be developed to eliminate the undesirable voltages on the output DC side. The middle cells of the proposed DC-DC MMC are supplied with the function of the active filter, which enables the DC-DC MMC system to escape the bulky LC components. Through theoretical analysis and a control strategy, the proposed DC-DC MMC has been analyzed comprehensively. Finally, the simulation and experimental results are verified to evaluate the effectiveness of the proposed DC-DC MMC.

Cascaded H-bridge Based STATCOM With Improved Ride Through Capability of Submodule Failures

This article investigates the operation of cascaded H-bridge (CHB) based static synchronous compensator (STATCOM) after failure in its submodules (SMs). Once a switch fails, the corresponding faulty SM is bypassed. In the post-fault operation, a zero-sequence voltage (ZSV) is injected to the converter phases to generate the maximum possible line-to-line voltage. Using a clamping technique, the fundamental component of injected ZSV (FZSV) is minimized according to the operating point of CHB STATCOM. But, FZSV leads to unequal flow of active power into the converter phases. In the proposed method, negative-sequence current is controlled to manage the active power flow within CHB phases. By doing this, the effect of FZSV on active power of CHB phases is compensated and the voltages of capacitors are kept balanced. This method ensures the continuous operation of CHB STATCOM with the minimum over-design and guarantees the voltage balance of capacitors after a failure. The presented simulation and experimental results validate the feasibility and effectiveness of the proposed method.

A simplified sliding‐mode control method for multi‐level transformerless DVR

Here, a finite-control-set sliding-mode control (FCS-SMC) method is proposed for single-phase three-level T-type inverter-based transformerless dynamic voltage restorers (TDVRs). The inherent advantages of SMC (fast dynamic response and high robustness) are combined with FCS concept to increase the effectiveness of the method in achieving the desired control objectives. First, the use of FCS eliminates the modulator requirement, which reduces the design complexity in the practical implementation. Second, an effective method based on charging/discharging conditions of DC capacitors is proposed for balancing capacitor voltages using relevant switching state rather than combining DC voltage error with the inductor current error through a suitable weighting factor in forming the cost function. Therefore, the weighting factor necessity in the control algorithm is eliminated. Finally, the steady-state error in the compensation voltage is eliminated by the proportional-resonant (PR) controller. The studied T-type inverter-based TDVR topology offers an alternative solution to the existing DVR topologies. Experimental results are carried out to demonstrate the effectiveness of the proposed FCS-SMC method in maintaining the load voltage at the desired level despite the voltage sags, swells, and distortions occurring in the grid voltage.