Capacitor Failure Research Articles

An Inductor-Based and Capacitor-Free Bipolar Pulse Converter with Overvoltage Protection

The inductor-based and capacitor-free bipolar pulse converter can be applied to electric vehicle charging and realize an efficient and reliable charging-control strategy. Inductor-based converters can avoid the converter failure caused by the failure of energy storage capacitors and improve the reliability. An overvoltage protection scheme based on active clamping topology is used to protect this converter when the load impedance is too large. This overvoltage protection can take effect in an extremely short time (~50 ns) with little energy wasted. Furthermore, mathematical analyses of the proposed topology are presented and simulations based on LTspice are made, showing the feasibility and reliability of this circuit. Moreover, calculation of the power loss on MOSFETs is presented. A 201 W prototype converter with an efficiency of 83% is presented, and experimental results show that the converter can work reliably. This manuscript also proves the feasibility and application prospect of using this current-source-based converter for EV charging.

On-Line Diagnostics of Electrolytic Capacitors in Fault-Tolerant LED Lighting Systems

As technology advances, the utilization of lighting systems based on light-emitting diode (LED) technology is becoming increasingly essential, given its benefits in terms of efficiency, reliability, and lifespan. Unfortunately, the power electronic components required to drive LEDs are unable to compete with LED devices in terms of lifetime. Aluminum electrolytic capacitor (AEC) failures represent the root cause of power electronic equipment breakdown, mainly through both aging and temperature effects. This highlights the importance of designing robust power converter architectures and control methods that allow the evaluation of the condition of electrolytic capacitors while maintaining the performance of converter controllers, even in the presence of capacitor failure. On this basis, this work proposes a novel condition-monitoring system for the diagnosis of capacitor faults on a fault-tolerant LED driver, which is able to deal with the specific architecture and low ratings of the most recent LED lighting systems. The fault-detection task applies the short time least square Prony’s (STLSP) approach to perform an online estimation of the ESR and C parameters, allowing the continuous evaluation of the electrolytic capacitor’s condition and, as a result, the prevention of total system failure. With regard to capacitor failure, the experimental results suggest that the condition-monitoring task is extremely effective, even when considering a limited number of data samples.

Online condition monitoring algorithm for element failure detection and fault location in double wye shunt capacitor banks

Failure in quick detection and location of internal failures in Shunt Capacitor Banks (SCBs) may lead to the negligence of necessary repair processes, consequently laying undesirable effects on the power system operation. This paper puts forward a failure detection and fault location method in SCBs with the double wye connection. The proposed method provides a criterion for relay decision-making based on the neutral voltage and current fundamental phasor component, capable of distinguishing the faulty capacitors and determining the number of capacitor failures in the case of multiple faulty phases. The proposed algorithm can be applied for double wye SCBs considering different protection designs, namely fuseless and internally fused units. The proposed method is designed to monitor and detect consecutive failures based on the existing data from commercial relays. Implementation and performance evaluations are conducted in PSCAD and MATLAB software and also with the help of practical data. Performance evaluations are conducted under different circumstances, namely harmonic distortion and voltage unbalance conditions, multiple internal fault locations, and external faults from the grid. Simulation results show the significance and salient features of the proposed method under different conditions.

Thermal Characteristics of All-Film Pulsed Capacitors in Application of Repetitive Pulse Discharge

Temperature rise is one of the major causes for all-film pulsed capacitor (AFPC) failure under high repetitive high-voltage pulse discharge operations. To study the thermal characteristics, a thermal simulation model is established. In this model, the actual operation conditions of capacitors are applied. The practical internal structure and heat production transfer of the AFPC are considered. The validation of the model is proved by the simulation and the experimental results. Based on the finite element method (FEM), the overall temperature field distribution of the AFPC, and the mathematical model between discharge voltage, frequency and temperature rise can be calculated. This model is capable of evaluating the temperature rise characteristics of an AFPC in repetitive high-voltage pulse discharge and can provide certain instructive suggestions for the safe operation and the optimal design of AFPC.

A Hybrid Control Method for Neutral-Point Voltage Balancing in Three-Level Inverters

Neutral-point (NP) voltage fluctuation is an inherent problem in three-level inverters. Without any control measures, the NP voltage will deviate, and the dc bias and ac oscillation can be observed, which may lead to the failure of power devices and capacitors, so as to damage the system security. In this letter, a hybrid control method is proposed, which it combines zero-sequence voltage regulation with the decomposition of modulation waveform organically. This carrier-based method is simple with lower switching loss due to the unchanged switching events per switching cycle. Experiments are carried out in a 10-kVA three-level platform, which demonstrate the validity of proposed method.

Analysis of Failure Mechanism of Smart Meter Capacitance

In practical applications, smart meters will fail, and even have batch quality problems. In addition to the sampling inspection of the arrival quality of smart meters, the analysis of the failure mechanism of smart meters has become an important and long-term task. This article mainly analyzes the component capacitance commonly used in smart meters, and analyses the failure of chip multilayer ceramic dielectric capacitors from appearance observation, electrical parameter testing, metallographic slicing, and at the same time from electrolytic appearance observation, electrical parameter testing, X- RAY, SEM and EDS for failure analysis. The results of failure mechanism research not only help to improve the reliability of the domestic energy meter manufacturing level, but also can save energy meter maintenance and transformation costs, and have very important practical significance for the construction of smart grids.

Popcorning Failures in Polymer and MnO2 Tantalum Capacitors

Popcorning is a well-known effect in plastic encapsulated microcircuits (PEM) and it occurs in chip tantalum capacitors. The sensitivity of components to the presence of moisture during soldering is characterized by the moisture sensitivity level (MSL); however, contrary to PEMs, there is no standard procedure for establishing MSL for tantalum capacitors. The effect of absorbed moisture on soldering related degradation and failures in tantalum capacitors have not been studied properly yet, and there is no sufficient information regarding the difference in the sensitivity to soldering between polymer and MnO2 capacitors. In this work, 16 types of polymer and 9 types of MnO2 tantalum capacitors with different moisture content have been tested before and after reflow soldering. The level of moisture release during soldering has been estimated and thermo-mechanical analysis used to assess deformation of capacitors during soldering simulations. Results show that moisture uptake in similar parts is approximately two times greater in polymer than in MnO2 capacitors. Cracking of the case and degradation of parameters can occur in both types of parts, but MnO2 capacitors are much more likely to fail catastrophically with a short circuit and possible ignition during the first power-on cycle. This type of failure in MnO2 capacitors is lot-related, can occur even at derated voltages and relatively low levels of moisture sorption that corresponds to room conditions. Baking before soldering is an effective measure to prevent failures even in lots susceptible to popcorning damage.

Failure Modes and Reliability Oriented System Design for Aerospace Power Electronic Converters

Aircraft electrification has been a major trend in aviation industry for past 20 years. Given the increasing electrical power requirement for future more electric aircraft and hybrid electric aircraft, research efforts has been ongoing in high power electrical conversion for air-borne systems. Safety critical nature of aviation systems places reliability of aerospace power converters as a critical design concern. In this paper, power electronic system reliability is studied with emphasis on lifetime limiting factors of critical sub components. Reliability of voltage source power converters at different system voltage levels are modelled for a starter generator drive converter. A key observation is that Si IGBT devices are sufficient with respect to reliability requirements in low and medium voltage systems (up to 540 V). At higher system voltages (above 540 V), multi level topologies are necessary for designing with Si IGBTs. In constant power profile drive, system reliability is minimally affected by wear-out failure of film capacitors in converter DC links. In multi level topologies without enhanced voltage derating, system reliability is dominated by cosmic ray induced random failures. Simulation results demonstrate that at high system voltages (810 V), 2 L topology with SiC mosfets outperform Si IGBT based 3 L topology with respect to reliability.

On-Line Fault Diagnosis of DC-Link Electrolytic Capacitors in Boost Converters Using the STFT Technique

Faults in aluminum electrolytic capacitors (AECs) are classified as the major cause for power electronics equipment breakdown, mainly due to AECs wear out through the vaporization of the electrolyte, as a result of both aging and temperature effects. The majority of manufacturers identify the end-of-life threshold of such capacitors as their equivalent series resistance (ESR) increases by 80% or their capacitance (C) decreases by 20%, relative to their initial values. Therefore, the online estimation of these two parameters can provide valuable and timely information that allows detecting any potential capacitor failure. Changes in C and ESR parameters influence the relationship between the capacitor voltage and current ripples. This ratio is dominated by C at low frequencies, and by ESR in the high-frequency range. The aim of this article is to propose an algorithm allowing a continuous estimation and tracking of both parameters (ESR and C). This algorithm should be simple, fast, and suitable for online implementation. Therefore, this article introduces the use of the short-time Fourier transform (STFT) technique to determine and track C and ESR values, starting from some always-existing harmonics at low and high frequencies. The STFT is based on applying the discrete Fourier transform algorithm on a sliding window, which makes it more appropriate for online implementation. The effectiveness of the proposed method is proved by simulation and laboratory experiments, using a boost dc-dc converter.

(Invited) Internal Gas Pressure Measurement of Packaged Electric Double Layer Capacitors

One mode of electric double layer capacitor failure is package rupture, which usually leads to rapid deterioration of its electrical performance. This typically is caused by gas generated within a sealed capacitor with a subsequent pressure rise that eventually leads to the package bursting. The rate of gas generation, which ultimately can determine capacitor life, depends on materials purity, capacitor operating voltage, and the capacitor operating temperature. We measured the internal gas pressure and rate of gas pressure rise in spiral-wound, packaged electric double layer capacitors using an indirect and a direct approach. The indirect approach relied on physically measuring capacitor package deformation that had been caused by the internal gas pressure. This was then quantified by comparing the value with deformation caused by a known applied gas pressure. The direct approach relied on the use of an attached and calibrated solid-state pressure transducer. Internal gas pressure measurements using both approaches were made on 100-F-size electric double layer capacitors held at several temperatures with different applied voltages. Experimental details are reported with internal pressure measurements shown for 2000 hours of capacitor aging at 65 oC. Figure 1

Assessing Impact of Optimally Placed Power Factor Correction Capacitors Reckoning Transient Switching Events

Installing capacitors to correct the power factor at particular locations is one way to enhance power system reliability. This paper offers a new formulation to address the issue of optimal placing capacitors. The proposed formulation considers reliability impact, in addition to the transient switching events. This is reflected in the cost minimization objective function, where the reliability calculations are considered to gauge the impact when capacitors are installed in the power system. The formulated problem is solved using genetic algorithm (GA), to minimize costs of capacitor installation, energy loss and failure impact. The new formulation has been examined on a test network for evaluating how effective the proposed approach is. The solution also considers the impact of uncertainties as well as future growth in the system, to ensure that it is optimal. The results evidence that the proposed approach is robust and effective in enhancing system reliability in the face of uncertainties and for future growth.

Physics Based Degradation Models for Electrolytic Capacitor Prognostics under Thermal Overstress Conditions

Electronics subsystems play an increasingly important role in safety critical systems for monitoring, control, and enhanced functionality. Electrolytic capacitors are an important component in ,amy subsystems that range from power supplies on safety critical avionics equipment to power drivers for electro-mechanical actuators. These capacitors are ideal forpassing or bypassing low-frequency signals in power supplies but are known to have lower reliability compared to ceramic and tantalum capacitors, and given their criticality in electronicssubsystems they are a good candidate for component level monitoring and prognostics. Prognostics provides a way to assess remaining useful life of components and systems based on their current state of health and their anticipated future use and operating conditions. Past experiences have shown that capacitor degradation and failures are quite prevalent under high electrical and thermal stress conditions that they experience during operations. Our focus in this work is on deriving a physics-based degradation model for electrolytic capacitors under thermal stress conditions. As part of our methodology, we study the effects of accelerated aging due to thermal stress on a batch of capacitors stored at high ambient temperature conditions. This provides a framework for supplementing theoretical modeling with data collected from simultaneous experiments, which is then used to validate the derived models. This work represents a first step toward combining data driven and physics-based approaches for modeling capacitor degradation. The case study shows how the proposed technique is applied to a batch of identically manufactured capacitors.

Remaining useful life prediction based on denoising technique and deep neural network for lithium-ion capacitors

Lithium-ion capacitor is a hybrid electrochemical energy storage device which combines the merits of lithium-ion battery and electric double-layer capacitor. It is of great importance to monitor the real capacity to evaluate failures of lithium-ion capacitors. Remaining Useful Life (RUL), which is referred to remaining cycle number before reaching its End of Life (EOL) threshold, is a key part in the prognostics and health management and an important indicator of the depletion capacity of lithium-ion capacitor. In this paper, we propose a hybrid neural network which combine with the convolutional neural network and Bidirectional Long Short-Term Memory Network (Bi-LSTM), the data will be used to train this model. Finally, the verifications among different prediction horizons and other methods are discussed. According to the experimental and analysis results, the proposed approach has high reliability and prediction accuracy, which can be applied to battery monitoring and prognostics, as well as generalized to other prognostic applications. • A method for RUL prediction of lithium-ion capacitor was proposed. • CEEMDAN-ICA-thresholding method was proposed to remove noisy signal. • Utilized a hybrid neural network of CNN and BiLSTM for RUL prediction. • The efficiency of the method is verified under different parameters.

Multi‐criteria protection scheme for online element failure detection in shunt capacitor banks

This paper deals with a fault detection investigation of SCBs, and it is focused on the faulty phase detection and the number of faulty capacitor units. Unlike previous methods, the proposed method provides a relay decision making criterion which determine the faulty capacitors, and the number of capacitor failures in case of multiple faulty phase conditions. The proposed algorithm is applied on different wye configurations of SCBs considering different protection designs (i.e., fuseless, internally and externally fused units). Since the detection of capacitor failures in SCBs are based on the fundamental phasor component, there may occur a significant delay in decision making in the case of an external short circuit fault in the power system. The aforementioned condition, which will be mathematically proven, happens due to a capacitor discharge after fault clearance. To deal with this condition, a method is proposed by applying an algorithm, in which the fundamental component of the voltage signal is extracted in one cycle. Performance evaluations associated with the proposed method are provided for different fault conditions, fault locations, and different levels of harmonics and, they are further discussed through the implementation of the proposed method in MATLAB environment.

CHANCE: Capacitor Charging Management Scheme in Energy Harvesting Systems

The energy efficiency of emerging nonvolatile processors equipped with FRAM-SRAM memory makes them a promising solution for energy harvesting systems. To enable correct functionality and forward progress with an unreliable power supply, the system must accumulate sufficient energy in the capacitor to execute tasks atomically, even in the worst case scenario. Due to the large gap between the average and worst case energy consumption of tasks, state-of-the-art approaches like eM-map require a large capacitor to execute tasks on the SRAM. However, the size, cost, and charging time of the capacitor are major concerns in the energy harvesting systems. In this article, we proposed CHANCE, a capacitor charging management scheme that improves the capacitor size and average response time of an energy harvesting system. CHANCE analyses the energy consumption of tasks to set an appropriate capacitor size to make a balance between capacitor charging time and failure rate for each task. The results show that CHANCE improves the response time of state-of-the-art approaches up to 68% with a five times smaller capacitor.

Realization of fault tolerant capability in a multiphase SRM drive using wavelet transform

Switched Reluctance Motor (SRM) are widely used in drives market because of its elegant features such as simple arrangement, manufacturing cost, minimal maintenance and wide speed range. Significant investigation has been conducted to lengthen the feasibility of SRM drive technologies in various aspects such as control strategy, torque ripple minimization, an optimal winding arrangement, etc. Even though it has numerous virtues, there are few noticeable issues that occur in SRM. In this paper, the issues like phase open circuit fault, phase-phase short circuit fault, power switch failure, dc link capacitor failure, and encoder faults are discussed using Wavelet Transform (WT) with their experimental results. A multi-phase (10/8 pole) SRM motor is considered to investigate the fault tolerance proficiency and other performance parameters. Initially, a healthy condition of multi-phase SRM is simulated then faults are injected at different phases which are analyzed and validated using MATLAB simulink tool and the same is validated through experimental results. The performance parameters of SRM drive during various faults conditions are analyzed and the impacts of speed and torque are illustrated.

Probabilistic framework for vulnerability analysis of coupling capacitor voltage transformer to ferroresonance phenomenon

The performance of measurement transformers especially in transient phenomena affects the monitoring, control and protective devices. Coupling capacitor voltage transformer (CCVT) is a measurement transformer that may experience ferroresonance phenomenon due to the presence of capacitors and non-linear reactors. This study provides a probabilistic framework for investigation of ferroresonance phenomenon in CCVT. The aim of this investigation is to find out the area of the power system in which a CCVT is highly prone to experience ferroresonance phenomenon. Also through this framework the behaviour of the different types of ferroresonance suppression circuits and possible solutions to avoid or reduce the chance of ferroresonance will be discussed. The effects of several factors such as switching moment, different fault type and the fault inception angle are investigated. The investigation will be conducted considering the effects of single-pole auto-reclosing, three-pole auto-reclosing and capacitor failure in the CCVT. As shown in the simulation results, the presented framework can provide some useful information regarding the exposure level and severity of CCVT ferroresonance in the system.

AC conductivity analysis as a measure of low k dielectric capacitor reliability degradation due to moisture ingress

In this paper, we will show that AC conductivity analysis can be used as an extremely sensitive, non-destructive indicator to determine the level of degradation in low k dielectric capacitors caused by moisture ingress. We found that an increase in AC conductivity (AC loss) correlates with a decreasing capacitor failure voltage, as determined by Ramp Voltage Stress (RVS) measurements. Exposure of the low-k dielectric layers to a relative humidity (RH) as low as 9.2% for a day, was enough to cause substantial degradation in failure voltage (about 45% decrease). Comb-comb capacitor structures used as the test vehicles were fabricated in 14 nm Complementary Metal Oxide Semiconductor (CMOS) technology using low k dielectrics in the Back-End-of-the-Line (BEOL). An ultraviolet (UV) laser was used to ablate trenches through the BEOL all the way down to the silicon level in the substrate, thus creating controlled breaches in the chip moisture barrier. In this manner, moisture could diffuse in along interfaces and through the porous dielectric. The capacitors were held at constant relative humidity levels from 0 to 90% RH, over various time intervals. The AC loss percent change correlated well with measured failure voltage. It was also shown that high-temperature forming gas (FG) anneals could reverse most, if not all the effects of the moisture, demonstrating subsequent failure voltages comparable to as manufactured, unablated low k dielectric capacitor structures.

Nondestructive Acoustic Testing of Ceramic Capacitors Using One-Class Support Vector Machine With Automated Hyperparameter Selection

The energy transition and electrification across many industries place increasingly more weight on the reliability of power electronics. A significant fraction of breakdowns in electronic devices result from capacitor failures. Multilayer ceramic capacitors, the most common capacitor type, are especially prone to mechanical damage, for instance, during the assembly of a printed circuit board. Such damage may dramatically shorten the life span of the component, eventually resulting in failure of the entire electronic device. Unfortunately, current electrical production line testing methods are often unable to reveal these types of damage. While recent studies have shown that acoustic measurements can provide information about the structural condition of a capacitor, reliable detection of damage from acoustic signals remains difficult. Although supervised machine learning classifiers have been proposed as a solution, they require a large training data set containing manually inspected damaged and intact capacitor samples. In this work, acoustic identification of damaged capacitors is demonstrated without a manually labeled data set. Accurate and robust classification is achieved by using a one-class support vector machine, a machine learning model trained solely on intact capacitors. Furthermore, a new algorithm for optimizing the classification performance of the model is presented. By the proposed approach, acoustic testing can be generalized to various capacitor sizes, making it a potential tool for production line testing.

Condition Monitoring of DC-Link Capacitors Using Goertzel Algorithm for Failure Precursor Parameter and Temperature Estimation

Aluminum electrolytic capacitors are some of the weakest components in a power converter system. Therefore, condition monitoring of capacitors can prevent unexpected system downtime due to capacitor failures. This article proposes a condition monitoring system for electrolytic capacitors used as dc-link capacitors in front-end rectifier-fed three-phase inverters. The proposed methodology is based on equivalent series resistance (ESR) and capacitance estimation using the Goertzel algorithm. The ESR is used as the degradation indicator, whereas the capacitance value is used as both degradation indicator and temperature-sensitive electrical parameter to estimate core or hotspot temperature. Even though the use of capacitance to estimate hotspot temperature has already been proposed, this article tackles the practical difficulties associated with capacitor core-temperature estimation using the capacitance and demonstrates a successful implementation strategy for applying this method in power converters to estimate core temperature online. It also introduces a self-calibration procedure to mitigate ageing-related errors in temperature estimation. An experimental setup is used to verify the proposed conditioning monitoring system. The experimental results prove the effectiveness and accuracy of the proposed technique.